diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-03-25 03:53:42 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-03-25 03:53:42 -0300 |
commit | 03dd4cb26d967f9588437b0fc9cc0e8353322bb7 (patch) | |
tree | fa581f6dc1c0596391690d1f67eceef3af8246dc /arch/arm/boot/dts/r8a7778-bockw.dts | |
parent | d4e493caf788ef44982e131ff9c786546904d934 (diff) |
Linux-libre 4.5-gnu
Diffstat (limited to 'arch/arm/boot/dts/r8a7778-bockw.dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7778-bockw.dts | 33 |
1 files changed, 23 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index 90543b12d..a52b359e2 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -28,8 +28,8 @@ }; chosen { - bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw"; - stdout-path = &scif0; + bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw"; + stdout-path = "serial0:115200n8"; }; memory { @@ -137,10 +137,14 @@ }; sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", - "sdhi0_cd"; + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; renesas,function = "sdhi0"; }; + sdhi0_pup_pins: sd0_pup { + renesas,groups = "sdhi0_cd", "sdhi0_wp"; + renesas,function = "sdhi0"; + bias-pull-up; + }; hspi0_pins: hspi0 { renesas,groups = "hspi0_a"; @@ -168,8 +172,13 @@ }; }; +&rcar_sound { + /* Single DAI */ + #sound-dai-cells = <0>; +}; + &sdhi0 { - pinctrl-0 = <&sdhi0_pins>; + pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>; pinctrl-names = "default"; vmmc-supply = <&fixedregulator3v3>; @@ -184,16 +193,20 @@ status = "okay"; flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "spansion,s25fl008k", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <104000000>; m25p,fast-read; - partition@0 { - label = "data(spi)"; - reg = <0x00000000 0x00100000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "data(spi)"; + reg = <0x00000000 0x00100000>; + }; }; }; }; |