diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
commit | 57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch) | |
tree | 5e910f0e82173f4ef4f51111366a3f1299037a7b /arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h |
Initial import
Diffstat (limited to 'arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h')
-rw-r--r-- | arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h b/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h new file mode 100644 index 000000000..af3196c60 --- /dev/null +++ b/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/iop_reg_space.h @@ -0,0 +1,31 @@ +/* Autogenerated Changes here will be lost! + * generated by ./gen_sw.pl Wed Feb 14 09:27:48 2007 iop_sw.cfg + */ +#define regi_iop_version (regi_iop + 0) +#define regi_iop_fifo_in_extra (regi_iop + 64) +#define regi_iop_fifo_out_extra (regi_iop + 128) +#define regi_iop_trigger_grp0 (regi_iop + 192) +#define regi_iop_trigger_grp1 (regi_iop + 256) +#define regi_iop_trigger_grp2 (regi_iop + 320) +#define regi_iop_trigger_grp3 (regi_iop + 384) +#define regi_iop_trigger_grp4 (regi_iop + 448) +#define regi_iop_trigger_grp5 (regi_iop + 512) +#define regi_iop_trigger_grp6 (regi_iop + 576) +#define regi_iop_trigger_grp7 (regi_iop + 640) +#define regi_iop_crc_par (regi_iop + 768) +#define regi_iop_dmc_in (regi_iop + 896) +#define regi_iop_dmc_out (regi_iop + 1024) +#define regi_iop_fifo_in (regi_iop + 1152) +#define regi_iop_fifo_out (regi_iop + 1280) +#define regi_iop_scrc_in (regi_iop + 1408) +#define regi_iop_scrc_out (regi_iop + 1536) +#define regi_iop_timer_grp0 (regi_iop + 1664) +#define regi_iop_timer_grp1 (regi_iop + 1792) +#define regi_iop_sap_in (regi_iop + 2048) +#define regi_iop_sap_out (regi_iop + 2304) +#define regi_iop_spu (regi_iop + 2560) +#define regi_iop_sw_cfg (regi_iop + 2816) +#define regi_iop_sw_cpu (regi_iop + 3072) +#define regi_iop_sw_mpu (regi_iop + 3328) +#define regi_iop_sw_spu (regi_iop + 3584) +#define regi_iop_mpu (regi_iop + 4096) |