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author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
commit | 57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch) | |
tree | 5e910f0e82173f4ef4f51111366a3f1299037a7b /arch/mips/include/asm/time.h |
Initial import
Diffstat (limited to 'arch/mips/include/asm/time.h')
-rw-r--r-- | arch/mips/include/asm/time.h | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h new file mode 100644 index 000000000..8ab287422 --- /dev/null +++ b/arch/mips/include/asm/time.h @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2001, 2002, MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (c) 2003 Maciej W. Rozycki + * + * include/asm-mips/time.h + * header file for the new style time.c file and time services. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef _ASM_TIME_H +#define _ASM_TIME_H + +#include <linux/rtc.h> +#include <linux/spinlock.h> +#include <linux/clockchips.h> +#include <linux/clocksource.h> + +extern spinlock_t rtc_lock; + +/* + * RTC ops. By default, they point to weak no-op RTC functions. + * rtc_mips_set_time - reverse the above translation and set time to RTC. + * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need + * to be set. Used by RTC sync-up. + */ +extern int rtc_mips_set_time(unsigned long); +extern int rtc_mips_set_mmss(unsigned long); + +/* + * board specific routines required by time_init(). + */ +extern void plat_time_init(void); + +/* + * mips_hpt_frequency - must be set if you intend to use an R4k-compatible + * counter as a timer interrupt source. + */ +extern unsigned int mips_hpt_frequency; + +/* + * The performance counter IRQ on MIPS is a close relative to the timer IRQ + * so it lives here. + */ +extern int (*perf_irq)(void); +extern int __weak get_c0_perfcount_int(void); + +/* + * Initialize the calling CPU's compare interrupt as clockevent device + */ +extern unsigned int __weak get_c0_compare_int(void); +extern int r4k_clockevent_init(void); + +static inline int mips_clockevent_init(void) +{ +#ifdef CONFIG_CEVT_R4K + return r4k_clockevent_init(); +#else + return -ENXIO; +#endif +} + +/* + * Initialize the count register as a clocksource + */ +extern int init_r4k_clocksource(void); + +static inline int init_mips_clocksource(void) +{ +#ifdef CONFIG_CSRC_R4K + return init_r4k_clocksource(); +#else + return 0; +#endif +} + +static inline void clockevent_set_clock(struct clock_event_device *cd, + unsigned int clock) +{ + clockevents_calc_mult_shift(cd, clock, 4); +} + +#endif /* _ASM_TIME_H */ |