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authorAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-18 00:33:29 -0300
committerAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-18 00:33:29 -0300
commit6ece15cc69504348ad484564d14968c542987053 (patch)
treecd6194a333518d78edd611023f2e255e4b66c8c9 /arch/mips/mti-malta/malta-time.c
parent0a2bb03fe20f81dc4cac96d7fe0e4194ae6efffd (diff)
Linux-libre 4.1.6-gnu
Diffstat (limited to 'arch/mips/mti-malta/malta-time.c')
-rw-r--r--arch/mips/mti-malta/malta-time.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 185e68261..a7f7d9ffb 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -148,6 +148,7 @@ int get_c0_perfcount_int(void)
return mips_cpu_perf_irq;
}
+EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
unsigned int get_c0_compare_int(void)
{
@@ -165,14 +166,17 @@ unsigned int get_c0_compare_int(void)
static void __init init_rtc(void)
{
- /* stop the clock whilst setting it up */
- CMOS_WRITE(RTC_SET | RTC_24H, RTC_CONTROL);
+ unsigned char freq, ctrl;
- /* 32KHz time base */
- CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
+ /* Set 32KHz time base if not already set */
+ freq = CMOS_READ(RTC_FREQ_SELECT);
+ if ((freq & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ)
+ CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
- /* start the clock */
- CMOS_WRITE(RTC_24H, RTC_CONTROL);
+ /* Ensure SET bit is clear so RTC can run */
+ ctrl = CMOS_READ(RTC_CONTROL);
+ if (ctrl & RTC_SET)
+ CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL);
}
void __init plat_time_init(void)