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authorAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-05 17:04:01 -0300
committerAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-05 17:04:01 -0300
commit57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch)
tree5e910f0e82173f4ef4f51111366a3f1299037a7b /arch/sh/include/mach-dreamcast/mach
Initial import
Diffstat (limited to 'arch/sh/include/mach-dreamcast/mach')
-rw-r--r--arch/sh/include/mach-dreamcast/mach/dma.h32
-rw-r--r--arch/sh/include/mach-dreamcast/mach/maple.h37
-rw-r--r--arch/sh/include/mach-dreamcast/mach/pci.h27
-rw-r--r--arch/sh/include/mach-dreamcast/mach/sysasic.h48
4 files changed, 144 insertions, 0 deletions
diff --git a/arch/sh/include/mach-dreamcast/mach/dma.h b/arch/sh/include/mach-dreamcast/mach/dma.h
new file mode 100644
index 000000000..1dbfdf701
--- /dev/null
+++ b/arch/sh/include/mach-dreamcast/mach/dma.h
@@ -0,0 +1,32 @@
+/*
+ * include/asm-sh/dreamcast/dma.h
+ *
+ * Copyright (C) 2003 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_DREAMCAST_DMA_H
+#define __ASM_SH_DREAMCAST_DMA_H
+
+/* Number of DMA channels */
+#define G2_NR_DMA_CHANNELS 4
+
+/* Channels for cascading */
+#define PVR2_CASCADE_CHAN 2
+#define G2_CASCADE_CHAN 3
+
+/* PVR2 DMA Registers */
+#define PVR2_DMA_BASE 0xa05f6800
+#define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0)
+#define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4)
+#define PVR2_DMA_MODE (PVR2_DMA_BASE + 8)
+#define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132)
+#define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136)
+
+/* G2 DMA Register */
+#define G2_DMA_BASE 0xa05f7800
+
+#endif /* __ASM_SH_DREAMCAST_DMA_H */
+
diff --git a/arch/sh/include/mach-dreamcast/mach/maple.h b/arch/sh/include/mach-dreamcast/mach/maple.h
new file mode 100644
index 000000000..51f6a87f1
--- /dev/null
+++ b/arch/sh/include/mach-dreamcast/mach/maple.h
@@ -0,0 +1,37 @@
+#ifndef __ASM_MAPLE_H
+#define __ASM_MAPLE_H
+
+#define MAPLE_PORTS 4
+#define MAPLE_PNP_INTERVAL HZ
+#define MAPLE_MAXPACKETS 8
+#define MAPLE_DMA_ORDER 14
+#define MAPLE_DMA_SIZE (1 << MAPLE_DMA_ORDER)
+#define MAPLE_DMA_PAGES ((MAPLE_DMA_ORDER > PAGE_SHIFT) ? \
+ MAPLE_DMA_ORDER - PAGE_SHIFT : 0)
+
+/* Maple Bus registers */
+#define MAPLE_BASE 0xa05f6c00
+#define MAPLE_DMAADDR (MAPLE_BASE+0x04)
+#define MAPLE_TRIGTYPE (MAPLE_BASE+0x10)
+#define MAPLE_ENABLE (MAPLE_BASE+0x14)
+#define MAPLE_STATE (MAPLE_BASE+0x18)
+#define MAPLE_SPEED (MAPLE_BASE+0x80)
+#define MAPLE_RESET (MAPLE_BASE+0x8c)
+
+#define MAPLE_MAGIC 0x6155404f
+#define MAPLE_2MBPS 0
+#define MAPLE_TIMEOUT(n) ((n)<<15)
+
+/* Function codes */
+#define MAPLE_FUNC_CONTROLLER 0x001
+#define MAPLE_FUNC_MEMCARD 0x002
+#define MAPLE_FUNC_LCD 0x004
+#define MAPLE_FUNC_CLOCK 0x008
+#define MAPLE_FUNC_MICROPHONE 0x010
+#define MAPLE_FUNC_ARGUN 0x020
+#define MAPLE_FUNC_KEYBOARD 0x040
+#define MAPLE_FUNC_LIGHTGUN 0x080
+#define MAPLE_FUNC_PURUPURU 0x100
+#define MAPLE_FUNC_MOUSE 0x200
+
+#endif /* __ASM_MAPLE_H */
diff --git a/arch/sh/include/mach-dreamcast/mach/pci.h b/arch/sh/include/mach-dreamcast/mach/pci.h
new file mode 100644
index 000000000..0314d975e
--- /dev/null
+++ b/arch/sh/include/mach-dreamcast/mach/pci.h
@@ -0,0 +1,27 @@
+/*
+ * include/asm-sh/dreamcast/pci.h
+ *
+ * Copyright (C) 2001, 2002 M. R. Brown
+ * Copyright (C) 2002, 2003 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_DREAMCAST_PCI_H
+#define __ASM_SH_DREAMCAST_PCI_H
+
+#include <mach-dreamcast/mach/sysasic.h>
+
+#define GAPSPCI_REGS 0x01001400
+#define GAPSPCI_DMA_BASE 0x01840000
+#define GAPSPCI_DMA_SIZE 32768
+#define GAPSPCI_BBA_CONFIG 0x01001600
+#define GAPSPCI_BBA_CONFIG_SIZE 0x2000
+
+#define GAPSPCI_IRQ HW_EVENT_EXTERNAL
+
+extern struct pci_ops gapspci_pci_ops;
+
+#endif /* __ASM_SH_DREAMCAST_PCI_H */
+
diff --git a/arch/sh/include/mach-dreamcast/mach/sysasic.h b/arch/sh/include/mach-dreamcast/mach/sysasic.h
new file mode 100644
index 000000000..58f710e1e
--- /dev/null
+++ b/arch/sh/include/mach-dreamcast/mach/sysasic.h
@@ -0,0 +1,48 @@
+/* include/asm-sh/dreamcast/sysasic.h
+ *
+ * Definitions for the Dreamcast System ASIC and related peripherals.
+ *
+ * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
+ * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
+ *
+ * This file is part of the LinuxDC project (www.linuxdc.org)
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ *
+ */
+#ifndef __ASM_SH_DREAMCAST_SYSASIC_H
+#define __ASM_SH_DREAMCAST_SYSASIC_H
+
+#include <asm/irq.h>
+
+/* Hardware events -
+
+ Each of these events correspond to a bit within the Event Mask Registers/
+ Event Status Registers. Because of the virtual IRQ numbering scheme, a
+ base offset must be used when calculating the virtual IRQ that each event
+ takes.
+*/
+
+#define HW_EVENT_IRQ_BASE 48
+
+/* IRQ 13 */
+#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */
+#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
+#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
+#define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
+#define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
+
+/* IRQ 11 */
+#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
+#define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
+#define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
+
+#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
+
+/* arch/sh/boards/mach-dreamcast/irq.c */
+extern int systemasic_irq_demux(int);
+extern void systemasic_irq_init(void);
+extern void aica_time_init(void);
+
+#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
+