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| author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
|---|---|---|
| committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
| commit | 57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch) | |
| tree | 5e910f0e82173f4ef4f51111366a3f1299037a7b /arch/sparc/include/asm/cache.h | |
Initial import
Diffstat (limited to 'arch/sparc/include/asm/cache.h')
| -rw-r--r-- | arch/sparc/include/asm/cache.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h new file mode 100644 index 000000000..5bb6991b4 --- /dev/null +++ b/arch/sparc/include/asm/cache.h @@ -0,0 +1,25 @@ +/* cache.h: Cache specific code for the Sparc. These include flushing + * and direct tag/data line access. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC_CACHE_H +#define _SPARC_CACHE_H + +#define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) + +#define L1_CACHE_SHIFT 5 +#define L1_CACHE_BYTES 32 + +#ifdef CONFIG_SPARC32 +#define SMP_CACHE_BYTES_SHIFT 5 +#else +#define SMP_CACHE_BYTES_SHIFT 6 +#endif + +#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) + +#define __read_mostly __attribute__((__section__(".data..read_mostly"))) + +#endif /* !(_SPARC_CACHE_H) */ |