diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
---|---|---|
committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
commit | 57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch) | |
tree | 5e910f0e82173f4ef4f51111366a3f1299037a7b /arch/sparc/include/asm/pil.h |
Initial import
Diffstat (limited to 'arch/sparc/include/asm/pil.h')
-rw-r--r-- | arch/sparc/include/asm/pil.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/pil.h b/arch/sparc/include/asm/pil.h new file mode 100644 index 000000000..266937030 --- /dev/null +++ b/arch/sparc/include/asm/pil.h @@ -0,0 +1,31 @@ +#ifndef _SPARC64_PIL_H +#define _SPARC64_PIL_H + +/* To avoid some locking problems, we hard allocate certain PILs + * for SMP cross call messages that must do a etrap/rtrap. + * + * A local_irq_disable() does not block the cross call delivery, so + * when SMP locking is an issue we reschedule the event into a PIL + * interrupt which is blocked by local_irq_disable(). + * + * In fact any XCALL which has to etrap/rtrap has a problem because + * it is difficult to prevent rtrap from running BH's, and that would + * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX. + * + * Finally, in order to handle profiling events even when a + * local_irq_disable() is in progress, we only disable up to level 14 + * interrupts. Profile counter overflow interrupts arrive at level + * 15. + */ +#define PIL_SMP_CALL_FUNC 1 +#define PIL_SMP_RECEIVE_SIGNAL 2 +#define PIL_SMP_CAPTURE 3 +#define PIL_SMP_CTX_NEW_VERSION 4 +#define PIL_DEVICE_IRQ 5 +#define PIL_SMP_CALL_FUNC_SNGL 6 +#define PIL_DEFERRED_PCR_WORK 7 +#define PIL_KGDB_CAPTURE 8 +#define PIL_NORMAL_MAX 14 +#define PIL_NMI 15 + +#endif /* !(_SPARC64_PIL_H) */ |