diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-09-08 01:01:14 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-09-08 01:01:14 -0300 |
commit | e5fd91f1ef340da553f7a79da9540c3db711c937 (patch) | |
tree | b11842027dc6641da63f4bcc524f8678263304a3 /arch/x86/kernel/cpu/intel.c | |
parent | 2a9b0348e685a63d97486f6749622b61e9e3292f (diff) |
Linux-libre 4.2-gnu
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 37 |
1 files changed, 4 insertions, 33 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index ba2546f0d..50163fa90 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -27,7 +27,7 @@ static void early_init_intel(struct cpuinfo_x86 *c) { - bool allow_fast_string = true; + u64 misc_enable; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { @@ -126,28 +126,17 @@ static void early_init_intel(struct cpuinfo_x86 *c) * Ingo Molnar reported a Pentium D (model 6) and a Xeon * (model 2) with the same problem. */ - if (c->x86 == 15) { - allow_fast_string = false; - + if (c->x86 == 15) if (msr_clear_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_FAST_STRING_BIT) > 0) pr_info("kmemcheck: Disabling fast string operations\n"); - } #endif /* - * If BIOS didn't enable fast string operation, try to enable - * it ourselves. If that fails, then clear the fast string - * and enhanced fast string CPU capabilities. + * If fast string is not enabled in IA32_MISC_ENABLE for any reason, + * clear the fast string and enhanced fast string CPU capabilities. */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { - u64 misc_enable; - - if (allow_fast_string && - msr_set_bit(MSR_IA32_MISC_ENABLE, - MSR_IA32_MISC_ENABLE_FAST_STRING_BIT) > 0) - pr_info(FW_WARN "IA32_MISC_ENABLE.FAST_STRING_ENABLE was not set\n"); - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { printk(KERN_INFO "Disabled fast string operations\n"); @@ -504,24 +493,6 @@ static void init_intel(struct cpuinfo_x86 *c) wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); } } - - /* Enable monitor/mwait if BIOS didn't do it for us. */ - if (!cpu_has(c, X86_FEATURE_MWAIT) && cpu_has(c, X86_FEATURE_XMM3) - && c->x86 >= 6 && !(c->x86 == 6 && c->x86_model < 0x1c) - && !(c->x86 == 0xf && c->x86_model < 3)) { - /* - * Some non-SSE3 cpus will #GP. We check for that, - * but it can't hurt to be safe. - */ - msr_set_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_MWAIT_BIT); - - /* Re-read monitor capability. */ - if (cpuid_ecx(1) & 0x8) { - set_cpu_cap(c, X86_FEATURE_MWAIT); - - printk(KERN_WARNING FW_WARN "IA32_MISC_ENABLE.ENABLE_MONITOR_FSM was not set\n"); - } - } } #ifdef CONFIG_X86_32 |