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authorAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-13 01:32:17 -0300
committerAndré Fabian Silva Delgado <emulatorman@parabola.nu>2015-08-13 14:23:33 -0300
commit0a2bb03fe20f81dc4cac96d7fe0e4194ae6efffd (patch)
treef643c68f37c9aa9e2e0b1623b363777c125350df /arch/x86/kernel/cpu/perf_event_intel_cqm.c
parentc49e505b3486503302e30c4237821bece90b4c2d (diff)
Linux-libre 4.1.5-gnupck-4.1.5-gnu
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel_cqm.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_cqm.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index e4d1b8b73..cb77b11bc 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -934,6 +934,14 @@ static u64 intel_cqm_event_count(struct perf_event *event)
return 0;
/*
+ * Getting up-to-date values requires an SMP IPI which is not
+ * possible if we're being called in interrupt context. Return
+ * the cached values instead.
+ */
+ if (unlikely(in_interrupt()))
+ goto out;
+
+ /*
* Notice that we don't perform the reading of an RMID
* atomically, because we can't hold a spin lock across the
* IPIs.