diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-09-11 04:34:46 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-09-11 04:34:46 -0300 |
commit | 863981e96738983919de841ec669e157e6bdaeb0 (patch) | |
tree | d6d89a12e7eb8017837c057935a2271290907f76 /drivers/gpu/drm/amd/amdgpu/cz_ih.c | |
parent | 8dec7c70575785729a6a9e6719a955e9c545bcab (diff) |
Linux-libre 4.7.1-gnupck-4.7.1-gnu
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cz_ih.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cz_ih.c | 40 |
1 files changed, 3 insertions, 37 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c index c79638f8e..3d23a70b6 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c @@ -103,7 +103,6 @@ static void cz_ih_disable_interrupts(struct amdgpu_device *adev) */ static int cz_ih_irq_init(struct amdgpu_device *adev) { - int ret = 0; int rb_bufsz; u32 interrupt_cntl, ih_cntl, ih_rb_cntl; u64 wptr_off; @@ -157,7 +156,7 @@ static int cz_ih_irq_init(struct amdgpu_device *adev) /* enable interrupts */ cz_ih_enable_interrupts(adev); - return ret; + return 0; } /** @@ -222,7 +221,7 @@ static void cz_ih_decode_iv(struct amdgpu_device *adev, /* wptr/rptr are in bytes! */ u32 ring_index = adev->irq.ih.rptr >> 2; uint32_t dw[4]; - + dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]); dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]); dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); @@ -351,35 +350,6 @@ static int cz_ih_wait_for_idle(void *handle) return -ETIMEDOUT; } -static void cz_ih_print_status(void *handle) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - - dev_info(adev->dev, "CZ IH registers\n"); - dev_info(adev->dev, " SRBM_STATUS=0x%08X\n", - RREG32(mmSRBM_STATUS)); - dev_info(adev->dev, " SRBM_STATUS2=0x%08X\n", - RREG32(mmSRBM_STATUS2)); - dev_info(adev->dev, " INTERRUPT_CNTL=0x%08X\n", - RREG32(mmINTERRUPT_CNTL)); - dev_info(adev->dev, " INTERRUPT_CNTL2=0x%08X\n", - RREG32(mmINTERRUPT_CNTL2)); - dev_info(adev->dev, " IH_CNTL=0x%08X\n", - RREG32(mmIH_CNTL)); - dev_info(adev->dev, " IH_RB_CNTL=0x%08X\n", - RREG32(mmIH_RB_CNTL)); - dev_info(adev->dev, " IH_RB_BASE=0x%08X\n", - RREG32(mmIH_RB_BASE)); - dev_info(adev->dev, " IH_RB_WPTR_ADDR_LO=0x%08X\n", - RREG32(mmIH_RB_WPTR_ADDR_LO)); - dev_info(adev->dev, " IH_RB_WPTR_ADDR_HI=0x%08X\n", - RREG32(mmIH_RB_WPTR_ADDR_HI)); - dev_info(adev->dev, " IH_RB_RPTR=0x%08X\n", - RREG32(mmIH_RB_RPTR)); - dev_info(adev->dev, " IH_RB_WPTR=0x%08X\n", - RREG32(mmIH_RB_WPTR)); -} - static int cz_ih_soft_reset(void *handle) { u32 srbm_soft_reset = 0; @@ -391,8 +361,6 @@ static int cz_ih_soft_reset(void *handle) SOFT_RESET_IH, 1); if (srbm_soft_reset) { - cz_ih_print_status((void *)adev); - tmp = RREG32(mmSRBM_SOFT_RESET); tmp |= srbm_soft_reset; dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); @@ -407,8 +375,6 @@ static int cz_ih_soft_reset(void *handle) /* Wait a little for things to settle down */ udelay(50); - - cz_ih_print_status((void *)adev); } return 0; @@ -429,6 +395,7 @@ static int cz_ih_set_powergating_state(void *handle, } const struct amd_ip_funcs cz_ih_ip_funcs = { + .name = "cz_ih", .early_init = cz_ih_early_init, .late_init = NULL, .sw_init = cz_ih_sw_init, @@ -440,7 +407,6 @@ const struct amd_ip_funcs cz_ih_ip_funcs = { .is_idle = cz_ih_is_idle, .wait_for_idle = cz_ih_wait_for_idle, .soft_reset = cz_ih_soft_reset, - .print_status = cz_ih_print_status, .set_clockgating_state = cz_ih_set_clockgating_state, .set_powergating_state = cz_ih_set_powergating_state, }; |