diff options
author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-03-25 03:53:42 -0300 |
---|---|---|
committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-03-25 03:53:42 -0300 |
commit | 03dd4cb26d967f9588437b0fc9cc0e8353322bb7 (patch) | |
tree | fa581f6dc1c0596391690d1f67eceef3af8246dc /drivers/media/platform/s5p-mfc | |
parent | d4e493caf788ef44982e131ff9c786546904d934 (diff) |
Linux-libre 4.5-gnu
Diffstat (limited to 'drivers/media/platform/s5p-mfc')
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc.c | 103 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 14 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 16 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 39 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_dec.h | 2 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 47 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_enc.h | 2 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 507 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c | 94 | ||||
-rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 121 |
10 files changed, 363 insertions, 582 deletions
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index 650f10173..d83bbf529 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -85,6 +85,26 @@ void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx) spin_unlock_irqrestore(&dev->condlock, flags); } +int s5p_mfc_get_new_ctx(struct s5p_mfc_dev *dev) +{ + unsigned long flags; + int ctx; + + spin_lock_irqsave(&dev->condlock, flags); + ctx = dev->curr_ctx; + do { + ctx = (ctx + 1) % MFC_NUM_CONTEXTS; + if (ctx == dev->curr_ctx) { + if (!test_bit(ctx, &dev->ctx_work_bits)) + ctx = -EAGAIN; + break; + } + } while (!test_bit(ctx, &dev->ctx_work_bits)); + spin_unlock_irqrestore(&dev->condlock, flags); + + return ctx; +} + /* Wake up context wait_queue */ static void wake_up_ctx(struct s5p_mfc_ctx *ctx, unsigned int reason, unsigned int err) @@ -105,6 +125,20 @@ static void wake_up_dev(struct s5p_mfc_dev *dev, unsigned int reason, wake_up(&dev->queue); } +void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq) +{ + struct s5p_mfc_buf *b; + int i; + + while (!list_empty(lh)) { + b = list_entry(lh->next, struct s5p_mfc_buf, list); + for (i = 0; i < b->b->vb2_buf.num_planes; i++) + vb2_set_plane_payload(&b->b->vb2_buf, i, 0); + vb2_buffer_done(&b->b->vb2_buf, VB2_BUF_STATE_ERROR); + list_del(&b->list); + } +} + static void s5p_mfc_watchdog(unsigned long arg) { struct s5p_mfc_dev *dev = (struct s5p_mfc_dev *)arg; @@ -150,10 +184,8 @@ static void s5p_mfc_watchdog_worker(struct work_struct *work) if (!ctx) continue; ctx->state = MFCINST_ERROR; - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->dst_queue, &ctx->vq_dst); - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->src_queue, &ctx->vq_src); + s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); + s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); clear_work_bit(ctx); wake_up_ctx(ctx, S5P_MFC_R2H_CMD_ERR_RET, 0); } @@ -233,8 +265,8 @@ static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx) == dec_y_addr) { dst_buf->b->timecode = src_buf->b->timecode; - dst_buf->b->timestamp = - src_buf->b->timestamp; + dst_buf->b->vb2_buf.timestamp = + src_buf->b->vb2_buf.timestamp; dst_buf->b->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK; dst_buf->b->flags |= @@ -327,7 +359,6 @@ static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx, unsigned int dst_frame_status; unsigned int dec_frame_status; struct s5p_mfc_buf *src_buf; - unsigned long flags; unsigned int res_change; dst_frame_status = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_status, dev) @@ -343,17 +374,16 @@ static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx, if (res_change == S5P_FIMV_RES_INCREASE || res_change == S5P_FIMV_RES_DECREASE) { ctx->state = MFCINST_RES_CHANGE_INIT; - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); wake_up_ctx(ctx, reason, err); WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); s5p_mfc_clock_off(); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); return; } if (ctx->dpb_flush_flag) ctx->dpb_flush_flag = 0; - spin_lock_irqsave(&dev->irqlock, flags); /* All frames remaining in the buffer have been extracted */ if (dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_EMPTY) { if (ctx->state == MFCINST_RES_CHANGE_FLUSH) { @@ -413,11 +443,10 @@ static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx, } } leave_handle_frame: - spin_unlock_irqrestore(&dev->irqlock, flags); if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING) || ctx->dst_queue_cnt < ctx->pb_count) clear_work_bit(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); wake_up_ctx(ctx, reason, err); WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); s5p_mfc_clock_off(); @@ -425,15 +454,13 @@ leave_handle_frame: if (test_bit(0, &dev->enter_suspend)) wake_up_dev(dev, reason, err); else - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } /* Error handling for interrupt */ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx, unsigned int reason, unsigned int err) { - unsigned long flags; - mfc_err("Interrupt Error: %08x\n", err); if (ctx != NULL) { @@ -450,13 +477,9 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev, clear_work_bit(ctx); ctx->state = MFCINST_ERROR; /* Mark all dst buffers as having an error */ - spin_lock_irqsave(&dev->irqlock, flags); - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->dst_queue, &ctx->vq_dst); + s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); /* Mark all src buffers as having an error */ - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->src_queue, &ctx->vq_src); - spin_unlock_irqrestore(&dev->irqlock, flags); + s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); wake_up_ctx(ctx, reason, err); break; default: @@ -467,7 +490,7 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev, } } WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); s5p_mfc_clock_off(); wake_up_dev(dev, reason, err); return; @@ -491,7 +514,7 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx, ctx->img_height = s5p_mfc_hw_call(dev->mfc_ops, get_img_height, dev); - s5p_mfc_hw_call_void(dev->mfc_ops, dec_calc_dpb_size, ctx); + s5p_mfc_hw_call(dev->mfc_ops, dec_calc_dpb_size, ctx); ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_dpb_count, dev); @@ -518,11 +541,11 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx, ctx->head_processed = 1; } } - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); clear_work_bit(ctx); WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); s5p_mfc_clock_off(); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); wake_up_ctx(ctx, reason, err); } @@ -532,12 +555,11 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx, { struct s5p_mfc_buf *src_buf; struct s5p_mfc_dev *dev; - unsigned long flags; if (ctx == NULL) return; dev = ctx->dev; - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); ctx->int_type = reason; ctx->int_err = err; ctx->int_cond = 1; @@ -545,7 +567,6 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx, if (err == 0) { ctx->state = MFCINST_RUNNING; if (!ctx->dpb_flush_flag && ctx->head_processed) { - spin_lock_irqsave(&dev->irqlock, flags); if (!list_empty(&ctx->src_queue)) { src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); @@ -554,7 +575,6 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx, vb2_buffer_done(&src_buf->b->vb2_buf, VB2_BUF_STATE_DONE); } - spin_unlock_irqrestore(&dev->irqlock, flags); } else { ctx->dpb_flush_flag = 0; } @@ -563,7 +583,7 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx, s5p_mfc_clock_off(); wake_up(&ctx->queue); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); @@ -582,7 +602,6 @@ static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx) ctx->state = MFCINST_FINISHED; - spin_lock(&dev->irqlock); if (!list_empty(&ctx->dst_queue)) { mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); @@ -591,7 +610,6 @@ static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx) vb2_set_plane_payload(&mb_entry->b->vb2_buf, 0, 0); vb2_buffer_done(&mb_entry->b->vb2_buf, VB2_BUF_STATE_DONE); } - spin_unlock(&dev->irqlock); clear_work_bit(ctx); @@ -599,7 +617,7 @@ static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx) s5p_mfc_clock_off(); wake_up(&ctx->queue); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } /* Interrupt processing */ @@ -613,6 +631,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv) mfc_debug_enter(); /* Reset the timeout watchdog */ atomic_set(&dev->watchdog_cnt, 0); + spin_lock(&dev->irqlock); ctx = dev->ctx[dev->curr_ctx]; /* Get the reason of interrupt and the error code */ reason = s5p_mfc_hw_call(dev->mfc_ops, get_int_reason, dev); @@ -639,15 +658,15 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv) if (ctx->state == MFCINST_FINISHING && list_empty(&ctx->ref_queue)) { - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); s5p_mfc_handle_stream_complete(ctx); break; } - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); wake_up_ctx(ctx, reason, err); WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); s5p_mfc_clock_off(); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { s5p_mfc_handle_frame(ctx, reason, err); } @@ -677,7 +696,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv) case S5P_MFC_R2H_CMD_WAKEUP_RET: if (ctx) clear_work_bit(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); wake_up_dev(dev, reason, err); clear_bit(0, &dev->hw_lock); clear_bit(0, &dev->enter_suspend); @@ -688,7 +707,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv) break; case S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET: - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); ctx->int_type = reason; ctx->int_err = err; s5p_mfc_handle_stream_complete(ctx); @@ -702,12 +721,13 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv) default: mfc_debug(2, "Unknown int reason\n"); - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); } + spin_unlock(&dev->irqlock); mfc_debug_leave(); return IRQ_HANDLED; irq_cleanup_hw: - s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev); + s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); ctx->int_type = reason; ctx->int_err = err; ctx->int_cond = 1; @@ -716,7 +736,8 @@ irq_cleanup_hw: s5p_mfc_clock_off(); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); + spin_unlock(&dev->irqlock); mfc_debug(2, "Exit via irq_cleanup_hw\n"); return IRQ_HANDLED; } diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h index d1a3f9b1b..9eb2481ec 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h @@ -308,7 +308,7 @@ struct s5p_mfc_dev { struct s5p_mfc_pm pm; struct s5p_mfc_variant *variant; int num_inst; - spinlock_t irqlock; /* lock when operating on videobuf2 queues */ + spinlock_t irqlock; /* lock when operating on context */ spinlock_t condlock; /* lock when changing/checking if a context is ready to be processed */ struct mutex mfc_mutex; /* video_device lock */ @@ -653,7 +653,7 @@ struct s5p_mfc_ctx { unsigned int bits; } slice_size; - struct s5p_mfc_codec_ops *c_ops; + const struct s5p_mfc_codec_ops *c_ops; struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS]; struct v4l2_ctrl_handler ctrl_handler; @@ -694,13 +694,7 @@ struct mfc_control { /* Macro for making hardware specific calls */ #define s5p_mfc_hw_call(f, op, args...) \ - ((f && f->op) ? f->op(args) : -ENODEV) - -#define s5p_mfc_hw_call_void(f, op, args...) \ -do { \ - if (f && f->op) \ - f->op(args); \ -} while (0) + ((f && f->op) ? f->op(args) : (typeof(f->op(args)))(-ENODEV)) #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh) #define ctrl_to_ctx(__ctrl) \ @@ -710,6 +704,8 @@ void clear_work_bit(struct s5p_mfc_ctx *ctx); void set_work_bit(struct s5p_mfc_ctx *ctx); void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx); void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx); +int s5p_mfc_get_new_ctx(struct s5p_mfc_dev *dev); +void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \ (dev->variant->port_num ? 1 : 0) : 0) : 0) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c index 65ab660e9..73ba5472b 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c @@ -319,7 +319,7 @@ void s5p_mfc_deinit_hw(struct s5p_mfc_dev *dev) s5p_mfc_clock_on(); s5p_mfc_reset(dev); - s5p_mfc_hw_call_void(dev->mfc_ops, release_dev_context_buffer, dev); + s5p_mfc_hw_call(dev->mfc_ops, release_dev_context_buffer, dev); s5p_mfc_clock_off(); } @@ -468,7 +468,7 @@ int s5p_mfc_open_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx) } set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); if (s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET, 0)) { /* Error or timeout */ @@ -482,9 +482,9 @@ int s5p_mfc_open_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx) err_free_desc_buf: if (ctx->type == MFCINST_DECODER) - s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_dec_desc_buffer, ctx); err_free_inst_buf: - s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer, ctx); err: return ret; } @@ -493,17 +493,17 @@ void s5p_mfc_close_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx) { ctx->state = MFCINST_RETURN_INST; set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); /* Wait until instance is returned or timeout occurred */ if (s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0)) mfc_err("Err returning instance\n"); /* Free resources */ - s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer, ctx); if (ctx->type == MFCINST_DECODER) - s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_dec_desc_buffer, ctx); ctx->inst_no = MFC_NO_INSTANCE_SET; ctx->state = MFCINST_FREE; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c index 8c5060a75..f2d6376ce 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c @@ -252,7 +252,7 @@ static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx) return 0; } -static struct s5p_mfc_codec_ops decoder_codec_ops = { +static const struct s5p_mfc_codec_ops decoder_codec_ops = { .pre_seq_start = NULL, .post_seq_start = NULL, .pre_frame_start = NULL, @@ -523,7 +523,7 @@ static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx, ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); if (ret) goto out; - s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, ctx); + s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx); ctx->dst_bufs_cnt = 0; } else if (ctx->capture_state == QUEUE_FREE) { WARN_ON(ctx->dst_bufs_cnt != 0); @@ -551,7 +551,7 @@ static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx, if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET, 0); } else { @@ -831,7 +831,7 @@ static int vidioc_decoder_cmd(struct file *file, void *priv, if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); spin_unlock_irqrestore(&dev->irqlock, flags); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { mfc_err("EOS: marking last buffer of stream"); buf = list_entry(ctx->src_queue.prev, @@ -888,7 +888,7 @@ static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = { }; static int s5p_mfc_queue_setup(struct vb2_queue *vq, - const void *parg, unsigned int *buf_count, + unsigned int *buf_count, unsigned int *plane_count, unsigned int psize[], void *allocators[]) { @@ -1012,7 +1012,7 @@ static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count) /* If context is ready then dev = work->data;schedule it to run */ if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); return 0; } @@ -1023,42 +1023,41 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q) struct s5p_mfc_dev *dev = ctx->dev; int aborted = 0; + spin_lock_irqsave(&dev->irqlock, flags); if ((ctx->state == MFCINST_FINISHING || ctx->state == MFCINST_RUNNING) && dev->curr_ctx == ctx->num && dev->hw_lock) { ctx->state = MFCINST_ABORT; + spin_unlock_irqrestore(&dev->irqlock, flags); s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_FRAME_DONE_RET, 0); aborted = 1; + spin_lock_irqsave(&dev->irqlock, flags); } if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { - spin_lock_irqsave(&dev->irqlock, flags); - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->dst_queue, &ctx->vq_dst); + s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); INIT_LIST_HEAD(&ctx->dst_queue); ctx->dst_queue_cnt = 0; ctx->dpb_flush_flag = 1; ctx->dec_dst_flag = 0; - spin_unlock_irqrestore(&dev->irqlock, flags); if (IS_MFCV6_PLUS(dev) && (ctx->state == MFCINST_RUNNING)) { ctx->state = MFCINST_FLUSH; set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); + spin_unlock_irqrestore(&dev->irqlock, flags); if (s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0)) mfc_err("Err flushing buffers\n"); + spin_lock_irqsave(&dev->irqlock, flags); } - } - if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { - spin_lock_irqsave(&dev->irqlock, flags); - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->src_queue, &ctx->vq_src); + } else if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); INIT_LIST_HEAD(&ctx->src_queue); ctx->src_queue_cnt = 0; - spin_unlock_irqrestore(&dev->irqlock, flags); } if (aborted) ctx->state = MFCINST_RUNNING; + spin_unlock_irqrestore(&dev->irqlock, flags); } @@ -1091,7 +1090,7 @@ static void s5p_mfc_buf_queue(struct vb2_buffer *vb) } if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } static struct vb2_ops s5p_mfc_dec_qops = { @@ -1104,7 +1103,7 @@ static struct vb2_ops s5p_mfc_dec_qops = { .buf_queue = s5p_mfc_buf_queue, }; -struct s5p_mfc_codec_ops *get_dec_codec_ops(void) +const struct s5p_mfc_codec_ops *get_dec_codec_ops(void) { return &decoder_codec_ops; } @@ -1119,7 +1118,7 @@ const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void) return &s5p_mfc_dec_ioctl_ops; } -#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \ +#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) \ && V4L2_CTRL_DRIVER_PRIV(x)) int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.h b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.h index d06a7cab5..886628b15 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.h @@ -13,7 +13,7 @@ #ifndef S5P_MFC_DEC_H_ #define S5P_MFC_DEC_H_ -struct s5p_mfc_codec_ops *get_dec_codec_ops(void); +const struct s5p_mfc_codec_ops *get_dec_codec_ops(void); struct vb2_ops *get_dec_queue_ops(void); const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void); struct s5p_mfc_fmt *get_dec_def_fmt(bool src); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c index 5c678ec9c..0434f02a7 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c @@ -769,15 +769,12 @@ static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_buf *dst_mb; unsigned long dst_addr; unsigned int dst_size; - unsigned long flags; - spin_lock_irqsave(&dev->irqlock, flags); dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0); - s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, + s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); return 0; } @@ -786,11 +783,9 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_enc_params *p = &ctx->enc_params; struct s5p_mfc_buf *dst_mb; - unsigned long flags; unsigned int enc_pb_count; if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) { - spin_lock_irqsave(&dev->irqlock, flags); if (!list_empty(&ctx->dst_queue)) { dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); @@ -802,14 +797,13 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) vb2_buffer_done(&dst_mb->b->vb2_buf, VB2_BUF_STATE_DONE); } - spin_unlock_irqrestore(&dev->irqlock, flags); } if (!IS_MFCV6_PLUS(dev)) { ctx->state = MFCINST_RUNNING; if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_enc_dpb_count, dev); @@ -826,25 +820,20 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; - unsigned long flags; unsigned long src_y_addr, src_c_addr, dst_addr; unsigned int dst_size; - spin_lock_irqsave(&dev->irqlock, flags); src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0); src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1); - s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_frame_buffer, ctx, + s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, src_y_addr, src_c_addr); - spin_unlock_irqrestore(&dev->irqlock, flags); - spin_lock_irqsave(&dev->irqlock, flags); dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0); - s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, + s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); return 0; } @@ -857,7 +846,6 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) unsigned long mb_y_addr, mb_c_addr; int slice_type; unsigned int strm_size; - unsigned long flags; slice_type = s5p_mfc_hw_call(dev->mfc_ops, get_enc_slice_type, dev); strm_size = s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev); @@ -865,9 +853,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) mfc_debug(2, "Encoded stream size: %d\n", strm_size); mfc_debug(2, "Display order: %d\n", mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT)); - spin_lock_irqsave(&dev->irqlock, flags); if (slice_type >= 0) { - s5p_mfc_hw_call_void(dev->mfc_ops, get_enc_frame_buffer, ctx, + s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx, &enc_y_addr, &enc_c_addr); list_for_each_entry(mb_entry, &ctx->src_queue, list) { mb_y_addr = vb2_dma_contig_plane_dma_addr( @@ -929,14 +916,13 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) vb2_set_plane_payload(&mb_entry->b->vb2_buf, 0, strm_size); vb2_buffer_done(&mb_entry->b->vb2_buf, VB2_BUF_STATE_DONE); } - spin_unlock_irqrestore(&dev->irqlock, flags); if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0)) clear_work_bit(ctx); return 0; } -static struct s5p_mfc_codec_ops encoder_codec_ops = { +static const struct s5p_mfc_codec_ops encoder_codec_ops = { .pre_seq_start = enc_pre_seq_start, .post_seq_start = enc_post_seq_start, .pre_frame_start = enc_pre_frame_start, @@ -1120,7 +1106,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f) pix_fmt_mp->width, pix_fmt_mp->height, ctx->img_width, ctx->img_height); - s5p_mfc_hw_call_void(dev->mfc_ops, enc_calc_src_size, ctx); + s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx); pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; @@ -1178,7 +1164,7 @@ static int vidioc_reqbufs(struct file *file, void *priv, if (reqbufs->count == 0) { mfc_debug(2, "Freeing buffers\n"); ret = vb2_reqbufs(&ctx->vq_src, reqbufs); - s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, + s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx); ctx->output_state = QUEUE_FREE; return ret; @@ -1741,7 +1727,7 @@ static int vidioc_encoder_cmd(struct file *file, void *priv, if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); spin_unlock_irqrestore(&dev->irqlock, flags); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { mfc_debug(2, "EOS: marking last buffer of stream\n"); buf = list_entry(ctx->src_queue.prev, @@ -1818,7 +1804,6 @@ static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb) } static int s5p_mfc_queue_setup(struct vb2_queue *vq, - const void *parg, unsigned int *buf_count, unsigned int *plane_count, unsigned int psize[], void *allocators[]) { @@ -1969,7 +1954,7 @@ static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count) /* If context is ready then dev = work->data;schedule it to run */ if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); return 0; } @@ -1990,15 +1975,13 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q) ctx->state = MFCINST_FINISHED; spin_lock_irqsave(&dev->irqlock, flags); if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, - &ctx->dst_queue, &ctx->vq_dst); + s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); INIT_LIST_HEAD(&ctx->dst_queue); ctx->dst_queue_cnt = 0; } if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { cleanup_ref_queue(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, &ctx->src_queue, - &ctx->vq_src); + s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); INIT_LIST_HEAD(&ctx->src_queue); ctx->src_queue_cnt = 0; } @@ -2038,7 +2021,7 @@ static void s5p_mfc_buf_queue(struct vb2_buffer *vb) } if (s5p_mfc_ctx_ready(ctx)) set_work_bit_irqsave(ctx); - s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); + s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } static struct vb2_ops s5p_mfc_enc_qops = { @@ -2052,7 +2035,7 @@ static struct vb2_ops s5p_mfc_enc_qops = { .buf_queue = s5p_mfc_buf_queue, }; -struct s5p_mfc_codec_ops *get_enc_codec_ops(void) +const struct s5p_mfc_codec_ops *get_enc_codec_ops(void) { return &encoder_codec_ops; } @@ -2067,7 +2050,7 @@ const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void) return &s5p_mfc_enc_ioctl_ops; } -#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \ +#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) \ && V4L2_CTRL_DRIVER_PRIV(x)) int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.h b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.h index 5118d46b3..d0d42f818 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.h @@ -13,7 +13,7 @@ #ifndef S5P_MFC_ENC_H_ #define S5P_MFC_ENC_H_ -struct s5p_mfc_codec_ops *get_enc_codec_ops(void); +const struct s5p_mfc_codec_ops *get_enc_codec_ops(void); struct vb2_ops *get_enc_queue_ops(void); const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void); struct s5p_mfc_fmt *get_enc_def_fmt(bool src); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h index 77a08b19b..b6ac417ab 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h @@ -20,254 +20,254 @@ struct s5p_mfc_regs { /* codec common registers */ - volatile void __iomem *risc_on; - volatile void __iomem *risc2host_int; - volatile void __iomem *host2risc_int; - volatile void __iomem *risc_base_address; - volatile void __iomem *mfc_reset; - volatile void __iomem *host2risc_command; - volatile void __iomem *risc2host_command; - volatile void __iomem *mfc_bus_reset_ctrl; - volatile void __iomem *firmware_version; - volatile void __iomem *instance_id; - volatile void __iomem *codec_type; - volatile void __iomem *context_mem_addr; - volatile void __iomem *context_mem_size; - volatile void __iomem *pixel_format; - volatile void __iomem *metadata_enable; - volatile void __iomem *mfc_version; - volatile void __iomem *dbg_info_enable; - volatile void __iomem *dbg_buffer_addr; - volatile void __iomem *dbg_buffer_size; - volatile void __iomem *hed_control; - volatile void __iomem *mfc_timeout_value; - volatile void __iomem *hed_shared_mem_addr; - volatile void __iomem *dis_shared_mem_addr;/* only v7 */ - volatile void __iomem *ret_instance_id; - volatile void __iomem *error_code; - volatile void __iomem *dbg_buffer_output_size; - volatile void __iomem *metadata_status; - volatile void __iomem *metadata_addr_mb_info; - volatile void __iomem *metadata_size_mb_info; - volatile void __iomem *dbg_info_stage_counter; + void __iomem *risc_on; + void __iomem *risc2host_int; + void __iomem *host2risc_int; + void __iomem *risc_base_address; + void __iomem *mfc_reset; + void __iomem *host2risc_command; + void __iomem *risc2host_command; + void __iomem *mfc_bus_reset_ctrl; + void __iomem *firmware_version; + void __iomem *instance_id; + void __iomem *codec_type; + void __iomem *context_mem_addr; + void __iomem *context_mem_size; + void __iomem *pixel_format; + void __iomem *metadata_enable; + void __iomem *mfc_version; + void __iomem *dbg_info_enable; + void __iomem *dbg_buffer_addr; + void __iomem *dbg_buffer_size; + void __iomem *hed_control; + void __iomem *mfc_timeout_value; + void __iomem *hed_shared_mem_addr; + void __iomem *dis_shared_mem_addr;/* only v7 */ + void __iomem *ret_instance_id; + void __iomem *error_code; + void __iomem *dbg_buffer_output_size; + void __iomem *metadata_status; + void __iomem *metadata_addr_mb_info; + void __iomem *metadata_size_mb_info; + void __iomem *dbg_info_stage_counter; /* decoder registers */ - volatile void __iomem *d_crc_ctrl; - volatile void __iomem *d_dec_options; - volatile void __iomem *d_display_delay; - volatile void __iomem *d_set_frame_width; - volatile void __iomem *d_set_frame_height; - volatile void __iomem *d_sei_enable; - volatile void __iomem *d_min_num_dpb; - volatile void __iomem *d_min_first_plane_dpb_size; - volatile void __iomem *d_min_second_plane_dpb_size; - volatile void __iomem *d_min_third_plane_dpb_size;/* only v8 */ - volatile void __iomem *d_min_num_mv; - volatile void __iomem *d_mvc_num_views; - volatile void __iomem *d_min_num_dis;/* only v7 */ - volatile void __iomem *d_min_first_dis_size;/* only v7 */ - volatile void __iomem *d_min_second_dis_size;/* only v7 */ - volatile void __iomem *d_min_third_dis_size;/* only v7 */ - volatile void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */ - volatile void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */ - volatile void __iomem *d_post_filter_luma_dpb2;/* only v7 */ - volatile void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */ - volatile void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */ - volatile void __iomem *d_post_filter_chroma_dpb2;/* only v7 */ - volatile void __iomem *d_num_dpb; - volatile void __iomem *d_num_mv; - volatile void __iomem *d_init_buffer_options; - volatile void __iomem *d_first_plane_dpb_stride_size;/* only v8 */ - volatile void __iomem *d_second_plane_dpb_stride_size;/* only v8 */ - volatile void __iomem *d_third_plane_dpb_stride_size;/* only v8 */ - volatile void __iomem *d_first_plane_dpb_size; - volatile void __iomem *d_second_plane_dpb_size; - volatile void __iomem *d_third_plane_dpb_size;/* only v8 */ - volatile void __iomem *d_mv_buffer_size; - volatile void __iomem *d_first_plane_dpb; - volatile void __iomem *d_second_plane_dpb; - volatile void __iomem *d_third_plane_dpb; - volatile void __iomem *d_mv_buffer; - volatile void __iomem *d_scratch_buffer_addr; - volatile void __iomem *d_scratch_buffer_size; - volatile void __iomem *d_metadata_buffer_addr; - volatile void __iomem *d_metadata_buffer_size; - volatile void __iomem *d_nal_start_options;/* v7 and v8 */ - volatile void __iomem *d_cpb_buffer_addr; - volatile void __iomem *d_cpb_buffer_size; - volatile void __iomem *d_available_dpb_flag_upper; - volatile void __iomem *d_available_dpb_flag_lower; - volatile void __iomem *d_cpb_buffer_offset; - volatile void __iomem *d_slice_if_enable; - volatile void __iomem *d_picture_tag; - volatile void __iomem *d_stream_data_size; - volatile void __iomem *d_dynamic_dpb_flag_upper;/* v7 and v8 */ - volatile void __iomem *d_dynamic_dpb_flag_lower;/* v7 and v8 */ - volatile void __iomem *d_display_frame_width; - volatile void __iomem *d_display_frame_height; - volatile void __iomem *d_display_status; - volatile void __iomem *d_display_first_plane_addr; - volatile void __iomem *d_display_second_plane_addr; - volatile void __iomem *d_display_third_plane_addr;/* only v8 */ - volatile void __iomem *d_display_frame_type; - volatile void __iomem *d_display_crop_info1; - volatile void __iomem *d_display_crop_info2; - volatile void __iomem *d_display_picture_profile; - volatile void __iomem *d_display_luma_crc;/* v7 and v8 */ - volatile void __iomem *d_display_chroma0_crc;/* v7 and v8 */ - volatile void __iomem *d_display_chroma1_crc;/* only v8 */ - volatile void __iomem *d_display_luma_crc_top;/* only v6 */ - volatile void __iomem *d_display_chroma_crc_top;/* only v6 */ - volatile void __iomem *d_display_luma_crc_bot;/* only v6 */ - volatile void __iomem *d_display_chroma_crc_bot;/* only v6 */ - volatile void __iomem *d_display_aspect_ratio; - volatile void __iomem *d_display_extended_ar; - volatile void __iomem *d_decoded_frame_width; - volatile void __iomem *d_decoded_frame_height; - volatile void __iomem *d_decoded_status; - volatile void __iomem *d_decoded_first_plane_addr; - volatile void __iomem *d_decoded_second_plane_addr; - volatile void __iomem *d_decoded_third_plane_addr;/* only v8 */ - volatile void __iomem *d_decoded_frame_type; - volatile void __iomem *d_decoded_crop_info1; - volatile void __iomem *d_decoded_crop_info2; - volatile void __iomem *d_decoded_picture_profile; - volatile void __iomem *d_decoded_nal_size; - volatile void __iomem *d_decoded_luma_crc; - volatile void __iomem *d_decoded_chroma0_crc; - volatile void __iomem *d_decoded_chroma1_crc;/* only v8 */ - volatile void __iomem *d_ret_picture_tag_top; - volatile void __iomem *d_ret_picture_tag_bot; - volatile void __iomem *d_ret_picture_time_top; - volatile void __iomem *d_ret_picture_time_bot; - volatile void __iomem *d_chroma_format; - volatile void __iomem *d_vc1_info;/* v7 and v8 */ - volatile void __iomem *d_mpeg4_info; - volatile void __iomem *d_h264_info; - volatile void __iomem *d_metadata_addr_concealed_mb; - volatile void __iomem *d_metadata_size_concealed_mb; - volatile void __iomem *d_metadata_addr_vc1_param; - volatile void __iomem *d_metadata_size_vc1_param; - volatile void __iomem *d_metadata_addr_sei_nal; - volatile void __iomem *d_metadata_size_sei_nal; - volatile void __iomem *d_metadata_addr_vui; - volatile void __iomem *d_metadata_size_vui; - volatile void __iomem *d_metadata_addr_mvcvui;/* v7 and v8 */ - volatile void __iomem *d_metadata_size_mvcvui;/* v7 and v8 */ - volatile void __iomem *d_mvc_view_id; - volatile void __iomem *d_frame_pack_sei_avail; - volatile void __iomem *d_frame_pack_arrgment_id; - volatile void __iomem *d_frame_pack_sei_info; - volatile void __iomem *d_frame_pack_grid_pos; - volatile void __iomem *d_display_recovery_sei_info;/* v7 and v8 */ - volatile void __iomem *d_decoded_recovery_sei_info;/* v7 and v8 */ - volatile void __iomem *d_display_first_addr;/* only v7 */ - volatile void __iomem *d_display_second_addr;/* only v7 */ - volatile void __iomem *d_display_third_addr;/* only v7 */ - volatile void __iomem *d_decoded_first_addr;/* only v7 */ - volatile void __iomem *d_decoded_second_addr;/* only v7 */ - volatile void __iomem *d_decoded_third_addr;/* only v7 */ - volatile void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ - volatile void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ + void __iomem *d_crc_ctrl; + void __iomem *d_dec_options; + void __iomem *d_display_delay; + void __iomem *d_set_frame_width; + void __iomem *d_set_frame_height; + void __iomem *d_sei_enable; + void __iomem *d_min_num_dpb; + void __iomem *d_min_first_plane_dpb_size; + void __iomem *d_min_second_plane_dpb_size; + void __iomem *d_min_third_plane_dpb_size;/* only v8 */ + void __iomem *d_min_num_mv; + void __iomem *d_mvc_num_views; + void __iomem *d_min_num_dis;/* only v7 */ + void __iomem *d_min_first_dis_size;/* only v7 */ + void __iomem *d_min_second_dis_size;/* only v7 */ + void __iomem *d_min_third_dis_size;/* only v7 */ + void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */ + void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */ + void __iomem *d_post_filter_luma_dpb2;/* only v7 */ + void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */ + void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */ + void __iomem *d_post_filter_chroma_dpb2;/* only v7 */ + void __iomem *d_num_dpb; + void __iomem *d_num_mv; + void __iomem *d_init_buffer_options; + void __iomem *d_first_plane_dpb_stride_size;/* only v8 */ + void __iomem *d_second_plane_dpb_stride_size;/* only v8 */ + void __iomem *d_third_plane_dpb_stride_size;/* only v8 */ + void __iomem *d_first_plane_dpb_size; + void __iomem *d_second_plane_dpb_size; + void __iomem *d_third_plane_dpb_size;/* only v8 */ + void __iomem *d_mv_buffer_size; + void __iomem *d_first_plane_dpb; + void __iomem *d_second_plane_dpb; + void __iomem *d_third_plane_dpb; + void __iomem *d_mv_buffer; + void __iomem *d_scratch_buffer_addr; + void __iomem *d_scratch_buffer_size; + void __iomem *d_metadata_buffer_addr; + void __iomem *d_metadata_buffer_size; + void __iomem *d_nal_start_options;/* v7 and v8 */ + void __iomem *d_cpb_buffer_addr; + void __iomem *d_cpb_buffer_size; + void __iomem *d_available_dpb_flag_upper; + void __iomem *d_available_dpb_flag_lower; + void __iomem *d_cpb_buffer_offset; + void __iomem *d_slice_if_enable; + void __iomem *d_picture_tag; + void __iomem *d_stream_data_size; + void __iomem *d_dynamic_dpb_flag_upper;/* v7 and v8 */ + void __iomem *d_dynamic_dpb_flag_lower;/* v7 and v8 */ + void __iomem *d_display_frame_width; + void __iomem *d_display_frame_height; + void __iomem *d_display_status; + void __iomem *d_display_first_plane_addr; + void __iomem *d_display_second_plane_addr; + void __iomem *d_display_third_plane_addr;/* only v8 */ + void __iomem *d_display_frame_type; + void __iomem *d_display_crop_info1; + void __iomem *d_display_crop_info2; + void __iomem *d_display_picture_profile; + void __iomem *d_display_luma_crc;/* v7 and v8 */ + void __iomem *d_display_chroma0_crc;/* v7 and v8 */ + void __iomem *d_display_chroma1_crc;/* only v8 */ + void __iomem *d_display_luma_crc_top;/* only v6 */ + void __iomem *d_display_chroma_crc_top;/* only v6 */ + void __iomem *d_display_luma_crc_bot;/* only v6 */ + void __iomem *d_display_chroma_crc_bot;/* only v6 */ + void __iomem *d_display_aspect_ratio; + void __iomem *d_display_extended_ar; + void __iomem *d_decoded_frame_width; + void __iomem *d_decoded_frame_height; + void __iomem *d_decoded_status; + void __iomem *d_decoded_first_plane_addr; + void __iomem *d_decoded_second_plane_addr; + void __iomem *d_decoded_third_plane_addr;/* only v8 */ + void __iomem *d_decoded_frame_type; + void __iomem *d_decoded_crop_info1; + void __iomem *d_decoded_crop_info2; + void __iomem *d_decoded_picture_profile; + void __iomem *d_decoded_nal_size; + void __iomem *d_decoded_luma_crc; + void __iomem *d_decoded_chroma0_crc; + void __iomem *d_decoded_chroma1_crc;/* only v8 */ + void __iomem *d_ret_picture_tag_top; + void __iomem *d_ret_picture_tag_bot; + void __iomem *d_ret_picture_time_top; + void __iomem *d_ret_picture_time_bot; + void __iomem *d_chroma_format; + void __iomem *d_vc1_info;/* v7 and v8 */ + void __iomem *d_mpeg4_info; + void __iomem *d_h264_info; + void __iomem *d_metadata_addr_concealed_mb; + void __iomem *d_metadata_size_concealed_mb; + void __iomem *d_metadata_addr_vc1_param; + void __iomem *d_metadata_size_vc1_param; + void __iomem *d_metadata_addr_sei_nal; + void __iomem *d_metadata_size_sei_nal; + void __iomem *d_metadata_addr_vui; + void __iomem *d_metadata_size_vui; + void __iomem *d_metadata_addr_mvcvui;/* v7 and v8 */ + void __iomem *d_metadata_size_mvcvui;/* v7 and v8 */ + void __iomem *d_mvc_view_id; + void __iomem *d_frame_pack_sei_avail; + void __iomem *d_frame_pack_arrgment_id; + void __iomem *d_frame_pack_sei_info; + void __iomem *d_frame_pack_grid_pos; + void __iomem *d_display_recovery_sei_info;/* v7 and v8 */ + void __iomem *d_decoded_recovery_sei_info;/* v7 and v8 */ + void __iomem *d_display_first_addr;/* only v7 */ + void __iomem *d_display_second_addr;/* only v7 */ + void __iomem *d_display_third_addr;/* only v7 */ + void __iomem *d_decoded_first_addr;/* only v7 */ + void __iomem *d_decoded_second_addr;/* only v7 */ + void __iomem *d_decoded_third_addr;/* only v7 */ + void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ + void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ /* encoder registers */ - volatile void __iomem *e_frame_width; - volatile void __iomem *e_frame_height; - volatile void __iomem *e_cropped_frame_width; - volatile void __iomem *e_cropped_frame_height; - volatile void __iomem *e_frame_crop_offset; - volatile void __iomem *e_enc_options; - volatile void __iomem *e_picture_profile; - volatile void __iomem *e_vbv_buffer_size; - volatile void __iomem *e_vbv_init_delay; - volatile void __iomem *e_fixed_picture_qp; - volatile void __iomem *e_rc_config; - volatile void __iomem *e_rc_qp_bound; - volatile void __iomem *e_rc_qp_bound_pb;/* v7 and v8 */ - volatile void __iomem *e_rc_mode; - volatile void __iomem *e_mb_rc_config; - volatile void __iomem *e_padding_ctrl; - volatile void __iomem *e_air_threshold; - volatile void __iomem *e_mv_hor_range; - volatile void __iomem *e_mv_ver_range; - volatile void __iomem *e_num_dpb; - volatile void __iomem *e_luma_dpb; - volatile void __iomem *e_chroma_dpb; - volatile void __iomem *e_me_buffer; - volatile void __iomem *e_scratch_buffer_addr; - volatile void __iomem *e_scratch_buffer_size; - volatile void __iomem *e_tmv_buffer0; - volatile void __iomem *e_tmv_buffer1; - volatile void __iomem *e_ir_buffer_addr;/* v7 and v8 */ - volatile void __iomem *e_source_first_plane_addr; - volatile void __iomem *e_source_second_plane_addr; - volatile void __iomem *e_source_third_plane_addr;/* v7 and v8 */ - volatile void __iomem *e_source_first_plane_stride;/* v7 and v8 */ - volatile void __iomem *e_source_second_plane_stride;/* v7 and v8 */ - volatile void __iomem *e_source_third_plane_stride;/* v7 and v8 */ - volatile void __iomem *e_stream_buffer_addr; - volatile void __iomem *e_stream_buffer_size; - volatile void __iomem *e_roi_buffer_addr; - volatile void __iomem *e_param_change; - volatile void __iomem *e_ir_size; - volatile void __iomem *e_gop_config; - volatile void __iomem *e_mslice_mode; - volatile void __iomem *e_mslice_size_mb; - volatile void __iomem *e_mslice_size_bits; - volatile void __iomem *e_frame_insertion; - volatile void __iomem *e_rc_frame_rate; - volatile void __iomem *e_rc_bit_rate; - volatile void __iomem *e_rc_roi_ctrl; - volatile void __iomem *e_picture_tag; - volatile void __iomem *e_bit_count_enable; - volatile void __iomem *e_max_bit_count; - volatile void __iomem *e_min_bit_count; - volatile void __iomem *e_metadata_buffer_addr; - volatile void __iomem *e_metadata_buffer_size; - volatile void __iomem *e_encoded_source_first_plane_addr; - volatile void __iomem *e_encoded_source_second_plane_addr; - volatile void __iomem *e_encoded_source_third_plane_addr;/* v7 and v8 */ - volatile void __iomem *e_stream_size; - volatile void __iomem *e_slice_type; - volatile void __iomem *e_picture_count; - volatile void __iomem *e_ret_picture_tag; - volatile void __iomem *e_stream_buffer_write_pointer; /* only v6 */ - volatile void __iomem *e_recon_luma_dpb_addr; - volatile void __iomem *e_recon_chroma_dpb_addr; - volatile void __iomem *e_metadata_addr_enc_slice; - volatile void __iomem *e_metadata_size_enc_slice; - volatile void __iomem *e_mpeg4_options; - volatile void __iomem *e_mpeg4_hec_period; - volatile void __iomem *e_aspect_ratio; - volatile void __iomem *e_extended_sar; - volatile void __iomem *e_h264_options; - volatile void __iomem *e_h264_options_2;/* v7 and v8 */ - volatile void __iomem *e_h264_lf_alpha_offset; - volatile void __iomem *e_h264_lf_beta_offset; - volatile void __iomem *e_h264_i_period; - volatile void __iomem *e_h264_fmo_slice_grp_map_type; - volatile void __iomem *e_h264_fmo_num_slice_grp_minus1; - volatile void __iomem *e_h264_fmo_slice_grp_change_dir; - volatile void __iomem *e_h264_fmo_slice_grp_change_rate_minus1; - volatile void __iomem *e_h264_fmo_run_length_minus1_0; - volatile void __iomem *e_h264_aso_slice_order_0; - volatile void __iomem *e_h264_chroma_qp_offset; - volatile void __iomem *e_h264_num_t_layer; - volatile void __iomem *e_h264_hierarchical_qp_layer0; - volatile void __iomem *e_h264_frame_packing_sei_info; - volatile void __iomem *e_h264_nal_control;/* v7 and v8 */ - volatile void __iomem *e_mvc_frame_qp_view1; - volatile void __iomem *e_mvc_rc_bit_rate_view1; - volatile void __iomem *e_mvc_rc_qbound_view1; - volatile void __iomem *e_mvc_rc_mode_view1; - volatile void __iomem *e_mvc_inter_view_prediction_on; - volatile void __iomem *e_vp8_options;/* v7 and v8 */ - volatile void __iomem *e_vp8_filter_options;/* v7 and v8 */ - volatile void __iomem *e_vp8_golden_frame_option;/* v7 and v8 */ - volatile void __iomem *e_vp8_num_t_layer;/* v7 and v8 */ - volatile void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ - volatile void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ - volatile void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ + void __iomem *e_frame_width; + void __iomem *e_frame_height; + void __iomem *e_cropped_frame_width; + void __iomem *e_cropped_frame_height; + void __iomem *e_frame_crop_offset; + void __iomem *e_enc_options; + void __iomem *e_picture_profile; + void __iomem *e_vbv_buffer_size; + void __iomem *e_vbv_init_delay; + void __iomem *e_fixed_picture_qp; + void __iomem *e_rc_config; + void __iomem *e_rc_qp_bound; + void __iomem *e_rc_qp_bound_pb;/* v7 and v8 */ + void __iomem *e_rc_mode; + void __iomem *e_mb_rc_config; + void __iomem *e_padding_ctrl; + void __iomem *e_air_threshold; + void __iomem *e_mv_hor_range; + void __iomem *e_mv_ver_range; + void __iomem *e_num_dpb; + void __iomem *e_luma_dpb; + void __iomem *e_chroma_dpb; + void __iomem *e_me_buffer; + void __iomem *e_scratch_buffer_addr; + void __iomem *e_scratch_buffer_size; + void __iomem *e_tmv_buffer0; + void __iomem *e_tmv_buffer1; + void __iomem *e_ir_buffer_addr;/* v7 and v8 */ + void __iomem *e_source_first_plane_addr; + void __iomem *e_source_second_plane_addr; + void __iomem *e_source_third_plane_addr;/* v7 and v8 */ + void __iomem *e_source_first_plane_stride;/* v7 and v8 */ + void __iomem *e_source_second_plane_stride;/* v7 and v8 */ + void __iomem *e_source_third_plane_stride;/* v7 and v8 */ + void __iomem *e_stream_buffer_addr; + void __iomem *e_stream_buffer_size; + void __iomem *e_roi_buffer_addr; + void __iomem *e_param_change; + void __iomem *e_ir_size; + void __iomem *e_gop_config; + void __iomem *e_mslice_mode; + void __iomem *e_mslice_size_mb; + void __iomem *e_mslice_size_bits; + void __iomem *e_frame_insertion; + void __iomem *e_rc_frame_rate; + void __iomem *e_rc_bit_rate; + void __iomem *e_rc_roi_ctrl; + void __iomem *e_picture_tag; + void __iomem *e_bit_count_enable; + void __iomem *e_max_bit_count; + void __iomem *e_min_bit_count; + void __iomem *e_metadata_buffer_addr; + void __iomem *e_metadata_buffer_size; + void __iomem *e_encoded_source_first_plane_addr; + void __iomem *e_encoded_source_second_plane_addr; + void __iomem *e_encoded_source_third_plane_addr;/* v7 and v8 */ + void __iomem *e_stream_size; + void __iomem *e_slice_type; + void __iomem *e_picture_count; + void __iomem *e_ret_picture_tag; + void __iomem *e_stream_buffer_write_pointer; /* only v6 */ + void __iomem *e_recon_luma_dpb_addr; + void __iomem *e_recon_chroma_dpb_addr; + void __iomem *e_metadata_addr_enc_slice; + void __iomem *e_metadata_size_enc_slice; + void __iomem *e_mpeg4_options; + void __iomem *e_mpeg4_hec_period; + void __iomem *e_aspect_ratio; + void __iomem *e_extended_sar; + void __iomem *e_h264_options; + void __iomem *e_h264_options_2;/* v7 and v8 */ + void __iomem *e_h264_lf_alpha_offset; + void __iomem *e_h264_lf_beta_offset; + void __iomem *e_h264_i_period; + void __iomem *e_h264_fmo_slice_grp_map_type; + void __iomem *e_h264_fmo_num_slice_grp_minus1; + void __iomem *e_h264_fmo_slice_grp_change_dir; + void __iomem *e_h264_fmo_slice_grp_change_rate_minus1; + void __iomem *e_h264_fmo_run_length_minus1_0; + void __iomem *e_h264_aso_slice_order_0; + void __iomem *e_h264_chroma_qp_offset; + void __iomem *e_h264_num_t_layer; + void __iomem *e_h264_hierarchical_qp_layer0; + void __iomem *e_h264_frame_packing_sei_info; + void __iomem *e_h264_nal_control;/* v7 and v8 */ + void __iomem *e_mvc_frame_qp_view1; + void __iomem *e_mvc_rc_bit_rate_view1; + void __iomem *e_mvc_rc_qbound_view1; + void __iomem *e_mvc_rc_mode_view1; + void __iomem *e_mvc_inter_view_prediction_on; + void __iomem *e_vp8_options;/* v7 and v8 */ + void __iomem *e_vp8_filter_options;/* v7 and v8 */ + void __iomem *e_vp8_golden_frame_option;/* v7 and v8 */ + void __iomem *e_vp8_num_t_layer;/* v7 and v8 */ + void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ + void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ + void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ }; struct s5p_mfc_hw_ops { @@ -281,28 +281,14 @@ struct s5p_mfc_hw_ops { void (*release_dev_context_buffer)(struct s5p_mfc_dev *dev); void (*dec_calc_dpb_size)(struct s5p_mfc_ctx *ctx); void (*enc_calc_src_size)(struct s5p_mfc_ctx *ctx); - int (*set_dec_stream_buffer)(struct s5p_mfc_ctx *ctx, - int buf_addr, unsigned int start_num_byte, - unsigned int buf_size); - int (*set_dec_frame_buffer)(struct s5p_mfc_ctx *ctx); int (*set_enc_stream_buffer)(struct s5p_mfc_ctx *ctx, unsigned long addr, unsigned int size); void (*set_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, unsigned long y_addr, unsigned long c_addr); void (*get_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, unsigned long *y_addr, unsigned long *c_addr); - int (*set_enc_ref_buffer)(struct s5p_mfc_ctx *ctx); - int (*init_decode)(struct s5p_mfc_ctx *ctx); - int (*init_encode)(struct s5p_mfc_ctx *ctx); - int (*encode_one_frame)(struct s5p_mfc_ctx *ctx); void (*try_run)(struct s5p_mfc_dev *dev); - void (*cleanup_queue)(struct list_head *lh, - struct vb2_queue *vq); void (*clear_int_flags)(struct s5p_mfc_dev *dev); - void (*write_info)(struct s5p_mfc_ctx *ctx, unsigned int data, - unsigned int ofs); - unsigned int (*read_info)(struct s5p_mfc_ctx *ctx, - unsigned long ofs); int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev); int (*get_dec_y_adr)(struct s5p_mfc_dev *dev); int (*get_dspl_status)(struct s5p_mfc_dev *dev); @@ -313,7 +299,6 @@ struct s5p_mfc_hw_ops { int (*get_int_reason)(struct s5p_mfc_dev *dev); int (*get_int_err)(struct s5p_mfc_dev *dev); int (*err_dec)(unsigned int err); - int (*err_dspl)(unsigned int err); int (*get_img_width)(struct s5p_mfc_dev *dev); int (*get_img_height)(struct s5p_mfc_dev *dev); int (*get_dpb_count)(struct s5p_mfc_dev *dev); @@ -322,10 +307,6 @@ struct s5p_mfc_hw_ops { int (*get_enc_strm_size)(struct s5p_mfc_dev *dev); int (*get_enc_slice_type)(struct s5p_mfc_dev *dev); int (*get_enc_dpb_count)(struct s5p_mfc_dev *dev); - int (*get_enc_pic_count)(struct s5p_mfc_dev *dev); - int (*get_sei_avail_status)(struct s5p_mfc_ctx *ctx); - int (*get_mvc_num_views)(struct s5p_mfc_dev *dev); - int (*get_mvc_view_id)(struct s5p_mfc_dev *dev); unsigned int (*get_pic_type_top)(struct s5p_mfc_ctx *ctx); unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx); unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c index 873c933bc..81e1e4ce6 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c @@ -1153,27 +1153,6 @@ static int s5p_mfc_encode_one_frame_v5(struct s5p_mfc_ctx *ctx) return 0; } -static int s5p_mfc_get_new_ctx(struct s5p_mfc_dev *dev) -{ - unsigned long flags; - int new_ctx; - int cnt; - - spin_lock_irqsave(&dev->condlock, flags); - new_ctx = (dev->curr_ctx + 1) % MFC_NUM_CONTEXTS; - cnt = 0; - while (!test_bit(new_ctx, &dev->ctx_work_bits)) { - new_ctx = (new_ctx + 1) % MFC_NUM_CONTEXTS; - if (++cnt > MFC_NUM_CONTEXTS) { - /* No contexts to run */ - spin_unlock_irqrestore(&dev->condlock, flags); - return -EAGAIN; - } - } - spin_unlock_irqrestore(&dev->condlock, flags); - return new_ctx; -} - static void s5p_mfc_run_res_change(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; @@ -1187,7 +1166,6 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame) { struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *temp_vb; - unsigned long flags; if (ctx->state == MFCINST_FINISHING) { last_frame = MFC_DEC_LAST_FRAME; @@ -1197,11 +1175,9 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame) return 0; } - spin_lock_irqsave(&dev->irqlock, flags); /* Frames are being decoded */ if (list_empty(&ctx->src_queue)) { mfc_debug(2, "No src buffers\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } /* Get the next source buffer */ @@ -1210,7 +1186,6 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame) s5p_mfc_set_dec_stream_buffer_v5(ctx, vb2_dma_contig_plane_dma_addr(&temp_vb->b->vb2_buf, 0), ctx->consumed_stream, temp_vb->b->vb2_buf.planes[0].bytesused); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; if (temp_vb->b->vb2_buf.planes[0].bytesused == 0) { last_frame = MFC_DEC_LAST_FRAME; @@ -1224,21 +1199,17 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame) static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; unsigned long src_y_addr, src_c_addr, dst_addr; unsigned int dst_size; - spin_lock_irqsave(&dev->irqlock, flags); if (list_empty(&ctx->src_queue) && ctx->state != MFCINST_FINISHING) { mfc_debug(2, "no src buffers\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } if (list_empty(&ctx->dst_queue)) { mfc_debug(2, "no dst buffers\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } if (list_empty(&ctx->src_queue)) { @@ -1270,7 +1241,6 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0); s5p_mfc_set_enc_stream_buffer_v5(ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; mfc_debug(2, "encoding buffer with index=%d state=%d\n", src_mb ? src_mb->b->vb2_buf.index : -1, ctx->state); @@ -1281,11 +1251,9 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) static void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *temp_vb; /* Initializing decoding - parsing header */ - spin_lock_irqsave(&dev->irqlock, flags); mfc_debug(2, "Preparing to init decoding\n"); temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); s5p_mfc_set_dec_desc_buffer(ctx); @@ -1294,7 +1262,6 @@ static void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) s5p_mfc_set_dec_stream_buffer_v5(ctx, vb2_dma_contig_plane_dma_addr(&temp_vb->b->vb2_buf, 0), 0, temp_vb->b->vb2_buf.planes[0].bytesused); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; s5p_mfc_init_decode_v5(ctx); } @@ -1302,18 +1269,15 @@ static void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) static void s5p_mfc_run_init_enc(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *dst_mb; unsigned long dst_addr; unsigned int dst_size; s5p_mfc_set_enc_ref_buffer_v5(ctx); - spin_lock_irqsave(&dev->irqlock, flags); dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0); s5p_mfc_set_enc_stream_buffer_v5(ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; s5p_mfc_init_encode_v5(ctx); } @@ -1321,7 +1285,6 @@ static void s5p_mfc_run_init_enc(struct s5p_mfc_ctx *ctx) static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *temp_vb; int ret; @@ -1335,11 +1298,9 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) "before starting processing\n"); return -EAGAIN; } - spin_lock_irqsave(&dev->irqlock, flags); if (list_empty(&ctx->src_queue)) { mfc_err("Header has been deallocated in the middle of" " initialization\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EIO; } temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); @@ -1348,7 +1309,6 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) s5p_mfc_set_dec_stream_buffer_v5(ctx, vb2_dma_contig_plane_dma_addr(&temp_vb->b->vb2_buf, 0), 0, temp_vb->b->vb2_buf.planes[0].bytesused); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; ret = s5p_mfc_set_dec_frame_buffer_v5(ctx); if (ret) { @@ -1472,21 +1432,6 @@ static void s5p_mfc_try_run_v5(struct s5p_mfc_dev *dev) } } - -static void s5p_mfc_cleanup_queue_v5(struct list_head *lh, struct vb2_queue *vq) -{ - struct s5p_mfc_buf *b; - int i; - - while (!list_empty(lh)) { - b = list_entry(lh->next, struct s5p_mfc_buf, list); - for (i = 0; i < b->b->vb2_buf.num_planes; i++) - vb2_set_plane_payload(&b->b->vb2_buf, i, 0); - vb2_buffer_done(&b->b->vb2_buf, VB2_BUF_STATE_ERROR); - list_del(&b->list); - } -} - static void s5p_mfc_clear_int_flags_v5(struct s5p_mfc_dev *dev) { mfc_write(dev, 0, S5P_FIMV_RISC_HOST_INT); @@ -1590,11 +1535,6 @@ static int s5p_mfc_err_dec_v5(unsigned int err) return (err & S5P_FIMV_ERR_DEC_MASK) >> S5P_FIMV_ERR_DEC_SHIFT; } -static int s5p_mfc_err_dspl_v5(unsigned int err) -{ - return (err & S5P_FIMV_ERR_DSPL_MASK) >> S5P_FIMV_ERR_DSPL_SHIFT; -} - static int s5p_mfc_get_img_width_v5(struct s5p_mfc_dev *dev) { return mfc_read(dev, S5P_FIMV_SI_HRESOL); @@ -1636,26 +1576,6 @@ static int s5p_mfc_get_enc_dpb_count_v5(struct s5p_mfc_dev *dev) return -1; } -static int s5p_mfc_get_enc_pic_count_v5(struct s5p_mfc_dev *dev) -{ - return mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT); -} - -static int s5p_mfc_get_sei_avail_status_v5(struct s5p_mfc_ctx *ctx) -{ - return s5p_mfc_read_info_v5(ctx, FRAME_PACK_SEI_AVAIL); -} - -static int s5p_mfc_get_mvc_num_views_v5(struct s5p_mfc_dev *dev) -{ - return -1; -} - -static int s5p_mfc_get_mvc_view_id_v5(struct s5p_mfc_dev *dev) -{ - return -1; -} - static unsigned int s5p_mfc_get_pic_type_top_v5(struct s5p_mfc_ctx *ctx) { return s5p_mfc_read_info_v5(ctx, PIC_TIME_TOP); @@ -1688,20 +1608,11 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v5 = { .release_dev_context_buffer = s5p_mfc_release_dev_context_buffer_v5, .dec_calc_dpb_size = s5p_mfc_dec_calc_dpb_size_v5, .enc_calc_src_size = s5p_mfc_enc_calc_src_size_v5, - .set_dec_stream_buffer = s5p_mfc_set_dec_stream_buffer_v5, - .set_dec_frame_buffer = s5p_mfc_set_dec_frame_buffer_v5, .set_enc_stream_buffer = s5p_mfc_set_enc_stream_buffer_v5, .set_enc_frame_buffer = s5p_mfc_set_enc_frame_buffer_v5, .get_enc_frame_buffer = s5p_mfc_get_enc_frame_buffer_v5, - .set_enc_ref_buffer = s5p_mfc_set_enc_ref_buffer_v5, - .init_decode = s5p_mfc_init_decode_v5, - .init_encode = s5p_mfc_init_encode_v5, - .encode_one_frame = s5p_mfc_encode_one_frame_v5, .try_run = s5p_mfc_try_run_v5, - .cleanup_queue = s5p_mfc_cleanup_queue_v5, .clear_int_flags = s5p_mfc_clear_int_flags_v5, - .write_info = s5p_mfc_write_info_v5, - .read_info = s5p_mfc_read_info_v5, .get_dspl_y_adr = s5p_mfc_get_dspl_y_adr_v5, .get_dec_y_adr = s5p_mfc_get_dec_y_adr_v5, .get_dspl_status = s5p_mfc_get_dspl_status_v5, @@ -1712,7 +1623,6 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v5 = { .get_int_reason = s5p_mfc_get_int_reason_v5, .get_int_err = s5p_mfc_get_int_err_v5, .err_dec = s5p_mfc_err_dec_v5, - .err_dspl = s5p_mfc_err_dspl_v5, .get_img_width = s5p_mfc_get_img_width_v5, .get_img_height = s5p_mfc_get_img_height_v5, .get_dpb_count = s5p_mfc_get_dpb_count_v5, @@ -1721,10 +1631,6 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v5 = { .get_enc_strm_size = s5p_mfc_get_enc_strm_size_v5, .get_enc_slice_type = s5p_mfc_get_enc_slice_type_v5, .get_enc_dpb_count = s5p_mfc_get_enc_dpb_count_v5, - .get_enc_pic_count = s5p_mfc_get_enc_pic_count_v5, - .get_sei_avail_status = s5p_mfc_get_sei_avail_status_v5, - .get_mvc_num_views = s5p_mfc_get_mvc_num_views_v5, - .get_mvc_view_id = s5p_mfc_get_mvc_view_id_v5, .get_pic_type_top = s5p_mfc_get_pic_type_top_v5, .get_pic_type_bot = s5p_mfc_get_pic_type_bot_v5, .get_crop_info_h = s5p_mfc_get_crop_info_h_v5, diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c index b95845347..d6f207e85 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c @@ -505,7 +505,7 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) } writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_INIT_BUFS_V6, NULL); mfc_debug(2, "After setting buffers.\n"); @@ -603,7 +603,7 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx) } writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_INIT_BUFS_V6, NULL); mfc_debug_leave(); @@ -1378,7 +1378,7 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) writel(ctx->sei_fp_parse & 0x1, mfc_regs->d_sei_enable); writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_SEQ_HEADER_V6, NULL); mfc_debug_leave(); @@ -1393,7 +1393,7 @@ static inline void s5p_mfc_set_flush(struct s5p_mfc_ctx *ctx, int flush) if (flush) { dev->curr_ctx = ctx->num; writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_H2R_CMD_FLUSH_V6, NULL); } } @@ -1413,11 +1413,11 @@ static int s5p_mfc_decode_one_frame_v6(struct s5p_mfc_ctx *ctx, * is the last frame or not. */ switch (last_frame) { case 0: - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_FRAME_START_V6, NULL); break; case 1: - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_LAST_FRAME_V6, NULL); break; default: @@ -1455,7 +1455,7 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx) } writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_SEQ_HEADER_V6, NULL); return 0; @@ -1500,37 +1500,13 @@ static int s5p_mfc_encode_one_frame_v6(struct s5p_mfc_ctx *ctx) cmd = S5P_FIMV_CH_LAST_FRAME_V6; writel(ctx->inst_no, mfc_regs->instance_id); - s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev, cmd, NULL); + s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, cmd, NULL); mfc_debug(2, "--\n"); return 0; } -static inline int s5p_mfc_get_new_ctx(struct s5p_mfc_dev *dev) -{ - unsigned long flags; - int new_ctx; - int cnt; - - spin_lock_irqsave(&dev->condlock, flags); - mfc_debug(2, "Previous context: %d (bits %08lx)\n", dev->curr_ctx, - dev->ctx_work_bits); - new_ctx = (dev->curr_ctx + 1) % MFC_NUM_CONTEXTS; - cnt = 0; - while (!test_bit(new_ctx, &dev->ctx_work_bits)) { - new_ctx = (new_ctx + 1) % MFC_NUM_CONTEXTS; - cnt++; - if (cnt > MFC_NUM_CONTEXTS) { - /* No contexts to run */ - spin_unlock_irqrestore(&dev->condlock, flags); - return -EAGAIN; - } - } - spin_unlock_irqrestore(&dev->condlock, flags); - return new_ctx; -} - static inline void s5p_mfc_run_dec_last_frames(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; @@ -1544,7 +1520,6 @@ static inline int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *temp_vb; - unsigned long flags; int last_frame = 0; if (ctx->state == MFCINST_FINISHING) { @@ -1556,11 +1531,9 @@ static inline int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx) return 0; } - spin_lock_irqsave(&dev->irqlock, flags); /* Frames are being decoded */ if (list_empty(&ctx->src_queue)) { mfc_debug(2, "No src buffers.\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } /* Get the next source buffer */ @@ -1570,7 +1543,6 @@ static inline int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx) vb2_dma_contig_plane_dma_addr(&temp_vb->b->vb2_buf, 0), ctx->consumed_stream, temp_vb->b->vb2_buf.planes[0].bytesused); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; if (temp_vb->b->vb2_buf.planes[0].bytesused == 0) { @@ -1586,7 +1558,6 @@ static inline int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx) static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; unsigned long src_y_addr, src_c_addr, dst_addr; @@ -1595,17 +1566,13 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) */ unsigned int dst_size; - spin_lock_irqsave(&dev->irqlock, flags); - if (list_empty(&ctx->src_queue) && ctx->state != MFCINST_FINISHING) { mfc_debug(2, "no src buffers.\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } if (list_empty(&ctx->dst_queue)) { mfc_debug(2, "no dst buffers.\n"); - spin_unlock_irqrestore(&dev->irqlock, flags); return -EAGAIN; } @@ -1639,8 +1606,6 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) s5p_mfc_set_enc_stream_buffer_v6(ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); - dev->curr_ctx = ctx->num; s5p_mfc_encode_one_frame_v6(ctx); @@ -1650,18 +1615,15 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) static inline void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *temp_vb; /* Initializing decoding - parsing header */ - spin_lock_irqsave(&dev->irqlock, flags); mfc_debug(2, "Preparing to init decoding.\n"); temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); mfc_debug(2, "Header size: %d\n", temp_vb->b->vb2_buf.planes[0].bytesused); s5p_mfc_set_dec_stream_buffer_v6(ctx, vb2_dma_contig_plane_dma_addr(&temp_vb->b->vb2_buf, 0), 0, temp_vb->b->vb2_buf.planes[0].bytesused); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; s5p_mfc_init_decode_v6(ctx); } @@ -1669,18 +1631,14 @@ static inline void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) static inline void s5p_mfc_run_init_enc(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned long flags; struct s5p_mfc_buf *dst_mb; unsigned long dst_addr; unsigned int dst_size; - spin_lock_irqsave(&dev->irqlock, flags); - dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0); s5p_mfc_set_enc_stream_buffer_v6(ctx, dst_addr, dst_size); - spin_unlock_irqrestore(&dev->irqlock, flags); dev->curr_ctx = ctx->num; s5p_mfc_init_encode_v6(ctx); } @@ -1846,21 +1804,6 @@ static void s5p_mfc_try_run_v6(struct s5p_mfc_dev *dev) } } - -static void s5p_mfc_cleanup_queue_v6(struct list_head *lh, struct vb2_queue *vq) -{ - struct s5p_mfc_buf *b; - int i; - - while (!list_empty(lh)) { - b = list_entry(lh->next, struct s5p_mfc_buf, list); - for (i = 0; i < b->b->vb2_buf.num_planes; i++) - vb2_set_plane_payload(&b->b->vb2_buf, i, 0); - vb2_buffer_done(&b->b->vb2_buf, VB2_BUF_STATE_ERROR); - list_del(&b->list); - } -} - static void s5p_mfc_clear_int_flags_v6(struct s5p_mfc_dev *dev) { const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; @@ -1868,14 +1811,6 @@ static void s5p_mfc_clear_int_flags_v6(struct s5p_mfc_dev *dev) writel(0, mfc_regs->risc2host_int); } -static void s5p_mfc_write_info_v6(struct s5p_mfc_ctx *ctx, unsigned int data, - unsigned int ofs) -{ - s5p_mfc_clock_on(); - writel(data, (void __iomem *)((unsigned long)ofs)); - s5p_mfc_clock_off(); -} - static unsigned int s5p_mfc_read_info_v6(struct s5p_mfc_ctx *ctx, unsigned long ofs) { @@ -1942,11 +1877,6 @@ static int s5p_mfc_err_dec_v6(unsigned int err) return (err & S5P_FIMV_ERR_DEC_MASK_V6) >> S5P_FIMV_ERR_DEC_SHIFT_V6; } -static int s5p_mfc_err_dspl_v6(unsigned int err) -{ - return (err & S5P_FIMV_ERR_DSPL_MASK_V6) >> S5P_FIMV_ERR_DSPL_SHIFT_V6; -} - static int s5p_mfc_get_img_width_v6(struct s5p_mfc_dev *dev) { return readl(dev->mfc_regs->d_display_frame_width); @@ -1987,27 +1917,6 @@ static int s5p_mfc_get_enc_slice_type_v6(struct s5p_mfc_dev *dev) return readl(dev->mfc_regs->e_slice_type); } -static int s5p_mfc_get_enc_pic_count_v6(struct s5p_mfc_dev *dev) -{ - return readl(dev->mfc_regs->e_picture_count); -} - -static int s5p_mfc_get_sei_avail_status_v6(struct s5p_mfc_ctx *ctx) -{ - struct s5p_mfc_dev *dev = ctx->dev; - return readl(dev->mfc_regs->d_frame_pack_sei_avail); -} - -static int s5p_mfc_get_mvc_num_views_v6(struct s5p_mfc_dev *dev) -{ - return readl(dev->mfc_regs->d_mvc_num_views); -} - -static int s5p_mfc_get_mvc_view_id_v6(struct s5p_mfc_dev *dev) -{ - return readl(dev->mfc_regs->d_mvc_view_id); -} - static unsigned int s5p_mfc_get_pic_type_top_v6(struct s5p_mfc_ctx *ctx) { return s5p_mfc_read_info_v6(ctx, @@ -2282,20 +2191,11 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = { s5p_mfc_release_dev_context_buffer_v6, .dec_calc_dpb_size = s5p_mfc_dec_calc_dpb_size_v6, .enc_calc_src_size = s5p_mfc_enc_calc_src_size_v6, - .set_dec_stream_buffer = s5p_mfc_set_dec_stream_buffer_v6, - .set_dec_frame_buffer = s5p_mfc_set_dec_frame_buffer_v6, .set_enc_stream_buffer = s5p_mfc_set_enc_stream_buffer_v6, .set_enc_frame_buffer = s5p_mfc_set_enc_frame_buffer_v6, .get_enc_frame_buffer = s5p_mfc_get_enc_frame_buffer_v6, - .set_enc_ref_buffer = s5p_mfc_set_enc_ref_buffer_v6, - .init_decode = s5p_mfc_init_decode_v6, - .init_encode = s5p_mfc_init_encode_v6, - .encode_one_frame = s5p_mfc_encode_one_frame_v6, .try_run = s5p_mfc_try_run_v6, - .cleanup_queue = s5p_mfc_cleanup_queue_v6, .clear_int_flags = s5p_mfc_clear_int_flags_v6, - .write_info = s5p_mfc_write_info_v6, - .read_info = s5p_mfc_read_info_v6, .get_dspl_y_adr = s5p_mfc_get_dspl_y_adr_v6, .get_dec_y_adr = s5p_mfc_get_dec_y_adr_v6, .get_dspl_status = s5p_mfc_get_dspl_status_v6, @@ -2306,7 +2206,6 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = { .get_int_reason = s5p_mfc_get_int_reason_v6, .get_int_err = s5p_mfc_get_int_err_v6, .err_dec = s5p_mfc_err_dec_v6, - .err_dspl = s5p_mfc_err_dspl_v6, .get_img_width = s5p_mfc_get_img_width_v6, .get_img_height = s5p_mfc_get_img_height_v6, .get_dpb_count = s5p_mfc_get_dpb_count_v6, @@ -2315,10 +2214,6 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = { .get_enc_strm_size = s5p_mfc_get_enc_strm_size_v6, .get_enc_slice_type = s5p_mfc_get_enc_slice_type_v6, .get_enc_dpb_count = s5p_mfc_get_enc_dpb_count_v6, - .get_enc_pic_count = s5p_mfc_get_enc_pic_count_v6, - .get_sei_avail_status = s5p_mfc_get_sei_avail_status_v6, - .get_mvc_num_views = s5p_mfc_get_mvc_num_views_v6, - .get_mvc_view_id = s5p_mfc_get_mvc_view_id_v6, .get_pic_type_top = s5p_mfc_get_pic_type_top_v6, .get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6, .get_crop_info_h = s5p_mfc_get_crop_info_h_v6, |