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authorAndré Fabian Silva Delgado <emulatorman@parabola.nu>2016-01-20 14:01:31 -0300
committerAndré Fabian Silva Delgado <emulatorman@parabola.nu>2016-01-20 14:01:31 -0300
commitb4b7ff4b08e691656c9d77c758fc355833128ac0 (patch)
tree82fcb00e6b918026dc9f2d1f05ed8eee83874cc0 /drivers/net/wireless/rtl818x/rtl8180
parent35acfa0fc609f2a2cd95cef4a6a9c3a5c38f1778 (diff)
Linux-libre 4.4-gnupck-4.4-gnu
Diffstat (limited to 'drivers/net/wireless/rtl818x/rtl8180')
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/Makefile5
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/dev.c1991
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/grf5101.c190
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/grf5101.h28
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/max2820.c168
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/max2820.h28
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/rtl8180.h185
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/rtl8225.c770
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/rtl8225.h23
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/rtl8225se.c475
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/rtl8225se.h61
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/sa2400.c228
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/sa2400.h36
13 files changed, 0 insertions, 4188 deletions
diff --git a/drivers/net/wireless/rtl818x/rtl8180/Makefile b/drivers/net/wireless/rtl818x/rtl8180/Makefile
deleted file mode 100644
index 21005bd8b..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-rtl818x_pci-objs := dev.o rtl8225.o sa2400.o max2820.o grf5101.o rtl8225se.o
-
-obj-$(CONFIG_RTL8180) += rtl818x_pci.o
-
-ccflags-y += -Idrivers/net/wireless/rtl818x
diff --git a/drivers/net/wireless/rtl818x/rtl8180/dev.c b/drivers/net/wireless/rtl818x/rtl8180/dev.c
deleted file mode 100644
index a43a16fde..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/dev.c
+++ /dev/null
@@ -1,1991 +0,0 @@
-
-/* Linux device driver for RTL8180 / RTL8185 / RTL8187SE
- *
- * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
- * Copyright 2007,2014 Andrea Merello <andrea.merello@gmail.com>
- *
- * Based on the r8180 driver, which is:
- * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
- *
- * Thanks to Realtek for their support!
- *
- ************************************************************************
- *
- * The driver was extended to the RTL8187SE in 2014 by
- * Andrea Merello <andrea.merello@gmail.com>
- *
- * based also on:
- * - portions of rtl8187se Linux staging driver, Copyright Realtek corp.
- * (available in drivers/staging/rtl8187se directory of Linux 3.14)
- * - other GPL, unpublished (until now), Linux driver code,
- * Copyright Larry Finger <Larry.Finger@lwfinger.net>
- *
- * A huge thanks goes to Sara V. Nari who forgives me when I'm
- * sitting in front of my laptop at evening, week-end, night...
- *
- * A special thanks goes to Antonio Cuni, who helped me with
- * some python userspace stuff I used to debug RTL8187SE code, and who
- * bought a laptop with an unsupported Wi-Fi card some years ago...
- *
- * Thanks to Larry Finger for writing some code for rtl8187se and for
- * his suggestions.
- *
- * Thanks to Dan Carpenter for reviewing my initial patch and for his
- * suggestions.
- *
- * Thanks to Bernhard Schiffner for his help in testing and for his
- * suggestions.
- *
- ************************************************************************
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/etherdevice.h>
-#include <linux/eeprom_93cx6.h>
-#include <linux/module.h>
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "rtl8225.h"
-#include "sa2400.h"
-#include "max2820.h"
-#include "grf5101.h"
-#include "rtl8225se.h"
-
-MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
-MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
-MODULE_DESCRIPTION("RTL8180 / RTL8185 / RTL8187SE PCI wireless driver");
-MODULE_LICENSE("GPL");
-
-static const struct pci_device_id rtl8180_table[] = {
-
- /* rtl8187se */
- { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8199) },
-
- /* rtl8185 */
- { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
- { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
- { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
-
- /* rtl8180 */
- { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
- { PCI_DEVICE(0x1799, 0x6001) },
- { PCI_DEVICE(0x1799, 0x6020) },
- { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
- { PCI_DEVICE(0x1186, 0x3301) },
- { PCI_DEVICE(0x1432, 0x7106) },
- { }
-};
-
-MODULE_DEVICE_TABLE(pci, rtl8180_table);
-
-static const struct ieee80211_rate rtl818x_rates[] = {
- { .bitrate = 10, .hw_value = 0, },
- { .bitrate = 20, .hw_value = 1, },
- { .bitrate = 55, .hw_value = 2, },
- { .bitrate = 110, .hw_value = 3, },
- { .bitrate = 60, .hw_value = 4, },
- { .bitrate = 90, .hw_value = 5, },
- { .bitrate = 120, .hw_value = 6, },
- { .bitrate = 180, .hw_value = 7, },
- { .bitrate = 240, .hw_value = 8, },
- { .bitrate = 360, .hw_value = 9, },
- { .bitrate = 480, .hw_value = 10, },
- { .bitrate = 540, .hw_value = 11, },
-};
-
-static const struct ieee80211_channel rtl818x_channels[] = {
- { .center_freq = 2412 },
- { .center_freq = 2417 },
- { .center_freq = 2422 },
- { .center_freq = 2427 },
- { .center_freq = 2432 },
- { .center_freq = 2437 },
- { .center_freq = 2442 },
- { .center_freq = 2447 },
- { .center_freq = 2452 },
- { .center_freq = 2457 },
- { .center_freq = 2462 },
- { .center_freq = 2467 },
- { .center_freq = 2472 },
- { .center_freq = 2484 },
-};
-
-/* Queues for rtl8187se card
- *
- * name | reg | queue
- * BC | 7 | 6
- * MG | 1 | 0
- * HI | 6 | 1
- * VO | 5 | 2
- * VI | 4 | 3
- * BE | 3 | 4
- * BK | 2 | 5
- *
- * The complete map for DMA kick reg using use all queue is:
- * static const int rtl8187se_queues_map[RTL8187SE_NR_TX_QUEUES] =
- * {1, 6, 5, 4, 3, 2, 7};
- *
- * .. but.. Because for mac80211 4 queues are enough for QoS we use this
- *
- * name | reg | queue
- * BC | 7 | 4 <- currently not used yet
- * MG | 1 | x <- Not used
- * HI | 6 | x <- Not used
- * VO | 5 | 0 <- used
- * VI | 4 | 1 <- used
- * BE | 3 | 2 <- used
- * BK | 2 | 3 <- used
- *
- * Beacon queue could be used, but this is not finished yet.
- *
- * I thougth about using the other two queues but I decided not to do this:
- *
- * - I'm unsure whether the mac80211 will ever try to use more than 4 queues
- * by itself.
- *
- * - I could route MGMT frames (currently sent over VO queue) to the MGMT
- * queue but since mac80211 will do not know about it, I will probably gain
- * some HW priority whenever the VO queue is not empty, but this gain is
- * limited by the fact that I had to stop the mac80211 queue whenever one of
- * the VO or MGMT queues is full, stopping also submitting of MGMT frame
- * to the driver.
- *
- * - I don't know how to set in the HW the contention window params for MGMT
- * and HI-prio queues.
- */
-
-static const int rtl8187se_queues_map[RTL8187SE_NR_TX_QUEUES] = {5, 4, 3, 2, 7};
-
-/* Queues for rtl8180/rtl8185 cards
- *
- * name | reg | prio
- * BC | 7 | 3
- * HI | 6 | 0
- * NO | 5 | 1
- * LO | 4 | 2
- *
- * The complete map for DMA kick reg using all queue is:
- * static const int rtl8180_queues_map[RTL8180_NR_TX_QUEUES] = {6, 5, 4, 7};
- *
- * .. but .. Because the mac80211 needs at least 4 queues for QoS or
- * otherwise QoS can't be done, we use just one.
- * Beacon queue could be used, but this is not finished yet.
- * Actual map is:
- *
- * name | reg | prio
- * BC | 7 | 1 <- currently not used yet.
- * HI | 6 | x <- not used
- * NO | 5 | x <- not used
- * LO | 4 | 0 <- used
- */
-
-static const int rtl8180_queues_map[RTL8180_NR_TX_QUEUES] = {4, 7};
-
-/* LNA gain table for rtl8187se */
-static const u8 rtl8187se_lna_gain[4] = {02, 17, 29, 39};
-
-void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
-{
- struct rtl8180_priv *priv = dev->priv;
- int i = 10;
- u32 buf;
-
- buf = (data << 8) | addr;
-
- rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
- while (i--) {
- rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
- if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
- return;
- }
-}
-
-static void rtl8180_handle_rx(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl818x_rx_cmd_desc *cmd_desc;
- unsigned int count = 32;
- u8 agc, sq;
- s8 signal = 1;
- dma_addr_t mapping;
-
- while (count--) {
- void *entry = priv->rx_ring + priv->rx_idx * priv->rx_ring_sz;
- struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
- u32 flags, flags2, flags3 = 0;
- u64 tsft;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- struct rtl8187se_rx_desc *desc = entry;
-
- flags = le32_to_cpu(desc->flags);
- /* if ownership flag is set, then we can trust the
- * HW has written other fields. We must not trust
- * other descriptor data read before we checked (read)
- * the ownership flag
- */
- rmb();
- flags3 = le32_to_cpu(desc->flags3);
- flags2 = le32_to_cpu(desc->flags2);
- tsft = le64_to_cpu(desc->tsft);
- } else {
- struct rtl8180_rx_desc *desc = entry;
-
- flags = le32_to_cpu(desc->flags);
- /* same as above */
- rmb();
- flags2 = le32_to_cpu(desc->flags2);
- tsft = le64_to_cpu(desc->tsft);
- }
-
- if (flags & RTL818X_RX_DESC_FLAG_OWN)
- return;
-
- if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
- RTL818X_RX_DESC_FLAG_FOF |
- RTL818X_RX_DESC_FLAG_RX_ERR)))
- goto done;
- else {
- struct ieee80211_rx_status rx_status = {0};
- struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
-
- if (unlikely(!new_skb))
- goto done;
-
- mapping = pci_map_single(priv->pdev,
- skb_tail_pointer(new_skb),
- MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
-
- if (pci_dma_mapping_error(priv->pdev, mapping)) {
- kfree_skb(new_skb);
- dev_err(&priv->pdev->dev, "RX DMA map error\n");
-
- goto done;
- }
-
- pci_unmap_single(priv->pdev,
- *((dma_addr_t *)skb->cb),
- MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
- skb_put(skb, flags & 0xFFF);
-
- rx_status.antenna = (flags2 >> 15) & 1;
- rx_status.rate_idx = (flags >> 20) & 0xF;
- agc = (flags2 >> 17) & 0x7F;
-
- switch (priv->chip_family) {
- case RTL818X_CHIP_FAMILY_RTL8185:
- if (rx_status.rate_idx > 3)
- signal = -clamp_t(u8, agc, 25, 90) - 9;
- else
- signal = -clamp_t(u8, agc, 30, 95);
- break;
- case RTL818X_CHIP_FAMILY_RTL8180:
- sq = flags2 & 0xff;
- signal = priv->rf->calc_rssi(agc, sq);
- break;
- case RTL818X_CHIP_FAMILY_RTL8187SE:
- /* OFDM measure reported by HW is signed,
- * in 0.5dBm unit, with zero centered @ -41dBm
- * input signal.
- */
- if (rx_status.rate_idx > 3) {
- signal = (s8)((flags3 >> 16) & 0xff);
- signal = signal / 2 - 41;
- } else {
- int idx, bb;
-
- idx = (agc & 0x60) >> 5;
- bb = (agc & 0x1F) * 2;
- /* bias + BB gain + LNA gain */
- signal = 4 - bb - rtl8187se_lna_gain[idx];
- }
- break;
- }
- rx_status.signal = signal;
- rx_status.freq = dev->conf.chandef.chan->center_freq;
- rx_status.band = dev->conf.chandef.chan->band;
- rx_status.mactime = tsft;
- rx_status.flag |= RX_FLAG_MACTIME_START;
- if (flags & RTL818X_RX_DESC_FLAG_SPLCP)
- rx_status.flag |= RX_FLAG_SHORTPRE;
- if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
- rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
-
- memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
- ieee80211_rx_irqsafe(dev, skb);
-
- skb = new_skb;
- priv->rx_buf[priv->rx_idx] = skb;
- *((dma_addr_t *) skb->cb) = mapping;
- }
-
- done:
- cmd_desc = entry;
- cmd_desc->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
- cmd_desc->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
- MAX_RX_SIZE);
- if (priv->rx_idx == 31)
- cmd_desc->flags |=
- cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
- priv->rx_idx = (priv->rx_idx + 1) % 32;
- }
-}
-
-static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
-
- while (skb_queue_len(&ring->queue)) {
- struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
- struct sk_buff *skb;
- struct ieee80211_tx_info *info;
- u32 flags = le32_to_cpu(entry->flags);
-
- if (flags & RTL818X_TX_DESC_FLAG_OWN)
- return;
-
- ring->idx = (ring->idx + 1) % ring->entries;
- skb = __skb_dequeue(&ring->queue);
- pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
- skb->len, PCI_DMA_TODEVICE);
-
- info = IEEE80211_SKB_CB(skb);
- ieee80211_tx_info_clear_status(info);
-
- if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
- (flags & RTL818X_TX_DESC_FLAG_TX_OK))
- info->flags |= IEEE80211_TX_STAT_ACK;
-
- info->status.rates[0].count = (flags & 0xFF) + 1;
-
- ieee80211_tx_status_irqsafe(dev, skb);
- if (ring->entries - skb_queue_len(&ring->queue) == 2)
- ieee80211_wake_queue(dev, prio);
- }
-}
-
-static irqreturn_t rtl8187se_interrupt(int irq, void *dev_id)
-{
- struct ieee80211_hw *dev = dev_id;
- struct rtl8180_priv *priv = dev->priv;
- u32 reg;
- unsigned long flags;
- static int desc_err;
-
- spin_lock_irqsave(&priv->lock, flags);
- /* Note: 32-bit interrupt status */
- reg = rtl818x_ioread32(priv, &priv->map->INT_STATUS_SE);
- if (unlikely(reg == 0xFFFFFFFF)) {
- spin_unlock_irqrestore(&priv->lock, flags);
- return IRQ_HANDLED;
- }
-
- rtl818x_iowrite32(priv, &priv->map->INT_STATUS_SE, reg);
-
- if (reg & IMR_TIMEOUT1)
- rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
-
- if (reg & (IMR_TBDOK | IMR_TBDER))
- rtl8180_handle_tx(dev, 4);
-
- if (reg & (IMR_TVODOK | IMR_TVODER))
- rtl8180_handle_tx(dev, 0);
-
- if (reg & (IMR_TVIDOK | IMR_TVIDER))
- rtl8180_handle_tx(dev, 1);
-
- if (reg & (IMR_TBEDOK | IMR_TBEDER))
- rtl8180_handle_tx(dev, 2);
-
- if (reg & (IMR_TBKDOK | IMR_TBKDER))
- rtl8180_handle_tx(dev, 3);
-
- if (reg & (IMR_ROK | IMR_RER | RTL818X_INT_SE_RX_DU | IMR_RQOSOK))
- rtl8180_handle_rx(dev);
- /* The interface sometimes generates several RX DMA descriptor errors
- * at startup. Do not report these.
- */
- if ((reg & RTL818X_INT_SE_RX_DU) && desc_err++ > 2)
- if (net_ratelimit())
- wiphy_err(dev->wiphy, "No RX DMA Descriptor avail\n");
-
- spin_unlock_irqrestore(&priv->lock, flags);
- return IRQ_HANDLED;
-}
-
-static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
-{
- struct ieee80211_hw *dev = dev_id;
- struct rtl8180_priv *priv = dev->priv;
- u16 reg;
-
- spin_lock(&priv->lock);
- reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
- if (unlikely(reg == 0xFFFF)) {
- spin_unlock(&priv->lock);
- return IRQ_HANDLED;
- }
-
- rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
-
- if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
- rtl8180_handle_tx(dev, 1);
-
- if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
- rtl8180_handle_tx(dev, 0);
-
- if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
- rtl8180_handle_rx(dev);
-
- spin_unlock(&priv->lock);
-
- return IRQ_HANDLED;
-}
-
-static void rtl8180_tx(struct ieee80211_hw *dev,
- struct ieee80211_tx_control *control,
- struct sk_buff *skb)
-{
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_tx_ring *ring;
- struct rtl8180_tx_desc *entry;
- unsigned long flags;
- unsigned int idx, prio, hw_prio;
- dma_addr_t mapping;
- u32 tx_flags;
- u8 rc_flags;
- u16 plcp_len = 0;
- __le16 rts_duration = 0;
- /* do arithmetic and then convert to le16 */
- u16 frame_duration = 0;
-
- prio = skb_get_queue_mapping(skb);
- ring = &priv->tx_ring[prio];
-
- mapping = pci_map_single(priv->pdev, skb->data,
- skb->len, PCI_DMA_TODEVICE);
-
- if (pci_dma_mapping_error(priv->pdev, mapping)) {
- kfree_skb(skb);
- dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
- return;
- }
-
- tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
- RTL818X_TX_DESC_FLAG_LS |
- (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
- skb->len;
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180)
- tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
- RTL818X_TX_DESC_FLAG_NO_ENC;
-
- rc_flags = info->control.rates[0].flags;
-
- /* HW will perform RTS-CTS when only RTS flags is set.
- * HW will perform CTS-to-self when both RTS and CTS flags are set.
- * RTS rate and RTS duration will be used also for CTS-to-self.
- */
- if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
- tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
- tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
- rts_duration = ieee80211_rts_duration(dev, priv->vif,
- skb->len, info);
- } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
- tx_flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS;
- tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
- rts_duration = ieee80211_ctstoself_duration(dev, priv->vif,
- skb->len, info);
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) {
- unsigned int remainder;
-
- plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
- (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
- remainder = (16 * (skb->len + 4)) %
- ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
- if (remainder <= 6)
- plcp_len |= 1 << 15;
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- __le16 duration;
- /* SIFS time (required by HW) is already included by
- * ieee80211_generic_frame_duration
- */
- duration = ieee80211_generic_frame_duration(dev, priv->vif,
- IEEE80211_BAND_2GHZ, skb->len,
- ieee80211_get_tx_rate(dev, info));
-
- frame_duration = priv->ack_time + le16_to_cpu(duration);
- }
-
- spin_lock_irqsave(&priv->lock, flags);
-
- if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
- if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
- priv->seqno += 0x10;
- hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
- hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
- }
-
- idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
- entry = &ring->desc[idx];
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- entry->frame_duration = cpu_to_le16(frame_duration);
- entry->frame_len_se = cpu_to_le16(skb->len);
-
- /* tpc polarity */
- entry->flags3 = cpu_to_le16(1<<4);
- } else
- entry->frame_len = cpu_to_le32(skb->len);
-
- entry->rts_duration = rts_duration;
- entry->plcp_len = cpu_to_le16(plcp_len);
- entry->tx_buf = cpu_to_le32(mapping);
-
- entry->retry_limit = info->control.rates[0].count - 1;
-
- /* We must be sure that tx_flags is written last because the HW
- * looks at it to check if the rest of data is valid or not
- */
- wmb();
- entry->flags = cpu_to_le32(tx_flags);
- /* We must be sure this has been written before followings HW
- * register write, because this write will made the HW attempts
- * to DMA the just-written data
- */
- wmb();
-
- __skb_queue_tail(&ring->queue, skb);
- if (ring->entries - skb_queue_len(&ring->queue) < 2)
- ieee80211_stop_queue(dev, prio);
-
- spin_unlock_irqrestore(&priv->lock, flags);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- /* just poll: rings are stopped with TPPollStop reg */
- hw_prio = rtl8187se_queues_map[prio];
- rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING,
- (1 << hw_prio));
- } else {
- hw_prio = rtl8180_queues_map[prio];
- rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING,
- (1 << hw_prio) | /* ring to poll */
- (1<<1) | (1<<2));/* stopped rings */
- }
-}
-
-static void rtl8180_set_anaparam3(struct rtl8180_priv *priv, u16 anaparam3)
-{
- u8 reg;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_CONFIG);
-
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
-
- rtl818x_iowrite16(priv, &priv->map->ANAPARAM3, anaparam3);
-
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_NORMAL);
-}
-
-void rtl8180_set_anaparam2(struct rtl8180_priv *priv, u32 anaparam2)
-{
- u8 reg;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_CONFIG);
-
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
-
- rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
-
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_NORMAL);
-}
-
-void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
-{
- u8 reg;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3,
- reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-}
-
-static void rtl8187se_mac_config(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 reg;
-
- rtl818x_iowrite32(priv, REG_ADDR4(0x1F0), 0);
- rtl818x_ioread32(priv, REG_ADDR4(0x1F0));
- rtl818x_iowrite32(priv, REG_ADDR4(0x1F4), 0);
- rtl818x_ioread32(priv, REG_ADDR4(0x1F4));
- rtl818x_iowrite8(priv, REG_ADDR1(0x1F8), 0);
- rtl818x_ioread8(priv, REG_ADDR1(0x1F8));
- /* Enable DA10 TX power saving */
- reg = rtl818x_ioread8(priv, &priv->map->PHY_PR);
- rtl818x_iowrite8(priv, &priv->map->PHY_PR, reg | 0x04);
- /* Power */
- rtl818x_iowrite16(priv, PI_DATA_REG, 0x1000);
- rtl818x_iowrite16(priv, SI_DATA_REG, 0x1000);
- /* AFE - default to power ON */
- rtl818x_iowrite16(priv, REG_ADDR2(0x370), 0x0560);
- rtl818x_iowrite16(priv, REG_ADDR2(0x372), 0x0560);
- rtl818x_iowrite16(priv, REG_ADDR2(0x374), 0x0DA4);
- rtl818x_iowrite16(priv, REG_ADDR2(0x376), 0x0DA4);
- rtl818x_iowrite16(priv, REG_ADDR2(0x378), 0x0560);
- rtl818x_iowrite16(priv, REG_ADDR2(0x37A), 0x0560);
- rtl818x_iowrite16(priv, REG_ADDR2(0x37C), 0x00EC);
- rtl818x_iowrite16(priv, REG_ADDR2(0x37E), 0x00EC);
- rtl818x_iowrite8(priv, REG_ADDR1(0x24E), 0x01);
- /* unknown, needed for suspend to RAM resume */
- rtl818x_iowrite8(priv, REG_ADDR1(0x0A), 0x72);
-}
-
-static void rtl8187se_set_antenna_config(struct ieee80211_hw *dev, u8 def_ant,
- bool diversity)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- rtl8225_write_phy_cck(dev, 0x0C, 0x09);
- if (diversity) {
- if (def_ant == 1) {
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
- rtl8225_write_phy_cck(dev, 0x11, 0xBB);
- rtl8225_write_phy_cck(dev, 0x01, 0xC7);
- rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
- rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
- } else { /* main antenna */
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
- rtl8225_write_phy_cck(dev, 0x11, 0x9B);
- rtl8225_write_phy_cck(dev, 0x01, 0xC7);
- rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
- rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
- }
- } else { /* disable antenna diversity */
- if (def_ant == 1) {
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
- rtl8225_write_phy_cck(dev, 0x11, 0xBB);
- rtl8225_write_phy_cck(dev, 0x01, 0x47);
- rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
- rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
- } else { /* main antenna */
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
- rtl8225_write_phy_cck(dev, 0x11, 0x9B);
- rtl8225_write_phy_cck(dev, 0x01, 0x47);
- rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
- rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
- }
- }
- /* priv->curr_ant = def_ant; */
-}
-
-static void rtl8180_int_enable(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- rtl818x_iowrite32(priv, &priv->map->IMR,
- IMR_TBDER | IMR_TBDOK |
- IMR_TVODER | IMR_TVODOK |
- IMR_TVIDER | IMR_TVIDOK |
- IMR_TBEDER | IMR_TBEDOK |
- IMR_TBKDER | IMR_TBKDOK |
- IMR_RDU | IMR_RER |
- IMR_ROK | IMR_RQOSOK);
- } else {
- rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
- }
-}
-
-static void rtl8180_int_disable(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- rtl818x_iowrite32(priv, &priv->map->IMR, 0);
- } else {
- rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
- }
-}
-
-static void rtl8180_conf_basic_rates(struct ieee80211_hw *dev,
- u32 basic_mask)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg;
- u32 resp_mask;
- u8 basic_max;
- u8 resp_max, resp_min;
-
- resp_mask = basic_mask;
- /* IEEE80211 says the response rate should be equal to the highest basic
- * rate that is not faster than received frame. But it says also that if
- * the basic rate set does not contains any rate for the current
- * modulation class then mandatory rate set must be used for that
- * modulation class. Eventually add OFDM mandatory rates..
- */
- if ((resp_mask & 0xf) == resp_mask)
- resp_mask |= 0x150; /* 6, 12, 24Mbps */
-
- switch (priv->chip_family) {
-
- case RTL818X_CHIP_FAMILY_RTL8180:
- /* in 8180 this is NOT a BITMAP */
- basic_max = fls(basic_mask) - 1;
- reg = rtl818x_ioread16(priv, &priv->map->BRSR);
- reg &= ~3;
- reg |= basic_max;
- rtl818x_iowrite16(priv, &priv->map->BRSR, reg);
- break;
-
- case RTL818X_CHIP_FAMILY_RTL8185:
- resp_max = fls(resp_mask) - 1;
- resp_min = ffs(resp_mask) - 1;
- /* in 8185 this is a BITMAP */
- rtl818x_iowrite16(priv, &priv->map->BRSR, basic_mask);
- rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (resp_max << 4) |
- resp_min);
- break;
-
- case RTL818X_CHIP_FAMILY_RTL8187SE:
- /* in 8187se this is a BITMAP. BRSR reg actually sets
- * response rates.
- */
- rtl818x_iowrite16(priv, &priv->map->BRSR_8187SE, resp_mask);
- break;
- }
-}
-
-static void rtl8180_config_cardbus(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg16;
- u8 reg8;
-
- reg8 = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- reg8 |= 1 << 1;
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg8);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- rtl818x_iowrite16(priv, FEMR_SE, 0xffff);
- } else {
- reg16 = rtl818x_ioread16(priv, &priv->map->FEMR);
- reg16 |= (1 << 15) | (1 << 14) | (1 << 4);
- rtl818x_iowrite16(priv, &priv->map->FEMR, reg16);
- }
-
-}
-
-static int rtl8180_init_hw(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg;
- u32 reg32;
-
- rtl818x_iowrite8(priv, &priv->map->CMD, 0);
- rtl818x_ioread8(priv, &priv->map->CMD);
- msleep(10);
-
- /* reset */
- rtl8180_int_disable(dev);
- rtl818x_ioread8(priv, &priv->map->CMD);
-
- reg = rtl818x_ioread8(priv, &priv->map->CMD);
- reg &= (1 << 1);
- reg |= RTL818X_CMD_RESET;
- rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
- rtl818x_ioread8(priv, &priv->map->CMD);
- msleep(200);
-
- /* check success of reset */
- if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
- wiphy_err(dev->wiphy, "reset timeout!\n");
- return -ETIMEDOUT;
- }
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
- rtl818x_ioread8(priv, &priv->map->CMD);
- msleep(200);
-
- if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
- rtl8180_config_cardbus(dev);
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
- else
- rtl818x_iowrite8(priv, &priv->map->MSR, 0);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
- rtl8180_set_anaparam(priv, priv->anaparam);
-
- rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
- /* mac80211 queue have higher prio for lower index. The last queue
- * (that mac80211 is not aware of) is reserved for beacons (and have
- * the highest priority on the NIC)
- */
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8187SE) {
- rtl818x_iowrite32(priv, &priv->map->TBDA,
- priv->tx_ring[1].dma);
- rtl818x_iowrite32(priv, &priv->map->TLPDA,
- priv->tx_ring[0].dma);
- } else {
- rtl818x_iowrite32(priv, &priv->map->TBDA,
- priv->tx_ring[4].dma);
- rtl818x_iowrite32(priv, &priv->map->TVODA,
- priv->tx_ring[0].dma);
- rtl818x_iowrite32(priv, &priv->map->TVIDA,
- priv->tx_ring[1].dma);
- rtl818x_iowrite32(priv, &priv->map->TBEDA,
- priv->tx_ring[2].dma);
- rtl818x_iowrite32(priv, &priv->map->TBKDA,
- priv->tx_ring[3].dma);
- }
-
- /* TODO: necessary? specs indicate not */
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
- rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) {
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
- rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
- }
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
-
- /* TODO: turn off hw wep on rtl8180 */
-
- rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
- rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
- rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
- } else {
- rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
-
- rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
- rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) {
- /* TODO: set ClkRun enable? necessary? */
- reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
- rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
- /* fix eccessive IFS after CTS-to-self */
- if (priv->map_pio) {
- u8 reg;
-
- reg = rtl818x_ioread8(priv, &priv->map->PGSELECT);
- rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
- rtl818x_iowrite8(priv, REG_ADDR1(0xff), 0x35);
- rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
- } else
- rtl818x_iowrite8(priv, REG_ADDR1(0x1ff), 0x35);
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
-
- /* the set auto rate fallback bitmask from 1M to 54 Mb/s */
- rtl818x_iowrite16(priv, ARFR, 0xFFF);
- rtl818x_ioread16(priv, ARFR);
-
- /* stop unused queus (no dma alloc) */
- rtl818x_iowrite8(priv, &priv->map->TPPOLL_STOP,
- RTL818x_TPPOLL_STOP_MG | RTL818x_TPPOLL_STOP_HI);
-
- rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0x00);
- rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
-
- rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
-
- /* some black magic here.. */
- rtl8187se_mac_config(dev);
-
- rtl818x_iowrite16(priv, RFSW_CTRL, 0x569A);
- rtl818x_ioread16(priv, RFSW_CTRL);
-
- rtl8180_set_anaparam(priv, RTL8225SE_ANAPARAM_ON);
- rtl8180_set_anaparam2(priv, RTL8225SE_ANAPARAM2_ON);
- rtl8180_set_anaparam3(priv, RTL8225SE_ANAPARAM3);
-
-
- rtl818x_iowrite8(priv, &priv->map->CONFIG5,
- rtl818x_ioread8(priv, &priv->map->CONFIG5) & 0x7F);
-
- /*probably this switch led on */
- rtl818x_iowrite8(priv, &priv->map->PGSELECT,
- rtl818x_ioread8(priv, &priv->map->PGSELECT) | 0x08);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1BFF);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
-
- rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x4003);
-
- /* the reference code mac hardcode table write
- * this reg by doing byte-wide accesses.
- * It does it just for lowest and highest byte..
- */
- reg32 = rtl818x_ioread32(priv, &priv->map->RF_PARA);
- reg32 &= 0x00ffff00;
- reg32 |= 0xb8000054;
- rtl818x_iowrite32(priv, &priv->map->RF_PARA, reg32);
- } else
- /* stop unused queus (no dma alloc) */
- rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING,
- (1<<1) | (1<<2));
-
- priv->rf->init(dev);
-
- /* default basic rates are 1,2 Mbps for rtl8180. 1,2,6,9,12,18,24 Mbps
- * otherwise. bitmask 0x3 and 0x01f3 respectively.
- * NOTE: currenty rtl8225 RF code changes basic rates, so we need to do
- * this after rf init.
- * TODO: try to find out whether RF code really needs to do this..
- */
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
- rtl8180_conf_basic_rates(dev, 0x3);
- else
- rtl8180_conf_basic_rates(dev, 0x1f3);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- rtl8187se_set_antenna_config(dev,
- priv->antenna_diversity_default,
- priv->antenna_diversity_en);
- return 0;
-}
-
-static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl818x_rx_cmd_desc *entry;
- int i;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- priv->rx_ring_sz = sizeof(struct rtl8187se_rx_desc);
- else
- priv->rx_ring_sz = sizeof(struct rtl8180_rx_desc);
-
- priv->rx_ring = pci_zalloc_consistent(priv->pdev, priv->rx_ring_sz * 32,
- &priv->rx_ring_dma);
- if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
- wiphy_err(dev->wiphy, "Cannot allocate RX ring\n");
- return -ENOMEM;
- }
-
- priv->rx_idx = 0;
-
- for (i = 0; i < 32; i++) {
- struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
- dma_addr_t *mapping;
- entry = priv->rx_ring + priv->rx_ring_sz*i;
- if (!skb) {
- wiphy_err(dev->wiphy, "Cannot allocate RX skb\n");
- return -ENOMEM;
- }
- priv->rx_buf[i] = skb;
- mapping = (dma_addr_t *)skb->cb;
- *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
- MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
-
- if (pci_dma_mapping_error(priv->pdev, *mapping)) {
- kfree_skb(skb);
- wiphy_err(dev->wiphy, "Cannot map DMA for RX skb\n");
- return -ENOMEM;
- }
-
- entry->rx_buf = cpu_to_le32(*mapping);
- entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
- MAX_RX_SIZE);
- }
- entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
- return 0;
-}
-
-static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- int i;
-
- for (i = 0; i < 32; i++) {
- struct sk_buff *skb = priv->rx_buf[i];
- if (!skb)
- continue;
-
- pci_unmap_single(priv->pdev,
- *((dma_addr_t *)skb->cb),
- MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
- kfree_skb(skb);
- }
-
- pci_free_consistent(priv->pdev, priv->rx_ring_sz * 32,
- priv->rx_ring, priv->rx_ring_dma);
- priv->rx_ring = NULL;
-}
-
-static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
- unsigned int prio, unsigned int entries)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_tx_desc *ring;
- dma_addr_t dma;
- int i;
-
- ring = pci_zalloc_consistent(priv->pdev, sizeof(*ring) * entries,
- &dma);
- if (!ring || (unsigned long)ring & 0xFF) {
- wiphy_err(dev->wiphy, "Cannot allocate TX ring (prio = %d)\n",
- prio);
- return -ENOMEM;
- }
-
- priv->tx_ring[prio].desc = ring;
- priv->tx_ring[prio].dma = dma;
- priv->tx_ring[prio].idx = 0;
- priv->tx_ring[prio].entries = entries;
- skb_queue_head_init(&priv->tx_ring[prio].queue);
-
- for (i = 0; i < entries; i++)
- ring[i].next_tx_desc =
- cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
-
- return 0;
-}
-
-static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
-
- while (skb_queue_len(&ring->queue)) {
- struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
- struct sk_buff *skb = __skb_dequeue(&ring->queue);
-
- pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
- skb->len, PCI_DMA_TODEVICE);
- kfree_skb(skb);
- ring->idx = (ring->idx + 1) % ring->entries;
- }
-
- pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
- ring->desc, ring->dma);
- ring->desc = NULL;
-}
-
-static int rtl8180_start(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- int ret, i;
- u32 reg;
-
- ret = rtl8180_init_rx_ring(dev);
- if (ret)
- return ret;
-
- for (i = 0; i < (dev->queues + 1); i++)
- if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
- goto err_free_rings;
-
- ret = rtl8180_init_hw(dev);
- if (ret)
- goto err_free_rings;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- ret = request_irq(priv->pdev->irq, rtl8187se_interrupt,
- IRQF_SHARED, KBUILD_MODNAME, dev);
- } else {
- ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
- IRQF_SHARED, KBUILD_MODNAME, dev);
- }
-
- if (ret) {
- wiphy_err(dev->wiphy, "failed to register IRQ handler\n");
- goto err_free_rings;
- }
-
- rtl8180_int_enable(dev);
-
- /* in rtl8187se at MAR regs offset there is the management
- * TX descriptor DMA addres..
- */
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8187SE) {
- rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
- rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
- }
-
- reg = RTL818X_RX_CONF_ONLYERLPKT |
- RTL818X_RX_CONF_RX_AUTORESETPHY |
- RTL818X_RX_CONF_MGMT |
- RTL818X_RX_CONF_DATA |
- (7 << 8 /* MAX RX DMA */) |
- RTL818X_RX_CONF_BROADCAST |
- RTL818X_RX_CONF_NICMAC;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185)
- reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
- else if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) {
- reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
- ? RTL818X_RX_CONF_CSDM1 : 0;
- reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
- ? RTL818X_RX_CONF_CSDM2 : 0;
- } else {
- reg &= ~(RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2);
- }
-
- priv->rx_conf = reg;
- rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
- reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
-
- /* CW is not on per-packet basis.
- * in rtl8185 the CW_VALUE reg is used.
- * in rtl8187se the AC param regs are used.
- */
- reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
- /* retry limit IS on per-packet basis.
- * the short and long retry limit in TX_CONF
- * reg are ignored
- */
- reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
- rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
-
- reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
- /* TX antenna and TX gain are not on per-packet basis.
- * TX Antenna is selected by ANTSEL reg (RX in BB regs).
- * TX gain is selected with CCK_TX_AGC and OFDM_TX_AGC regs
- */
- reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
- reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
- reg |= RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
- rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
-
- /* disable early TX */
- rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
- }
-
- reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
- reg |= (6 << 21 /* MAX TX DMA */) |
- RTL818X_TX_CONF_NO_ICV;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- reg |= 1<<30; /* "duration procedure mode" */
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180)
- reg &= ~RTL818X_TX_CONF_PROBE_DTS;
- else
- reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
-
- reg &= ~RTL818X_TX_CONF_DISCW;
-
- /* different meaning, same value on both rtl8185 and rtl8180 */
- reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
-
- rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
-
- reg = rtl818x_ioread8(priv, &priv->map->CMD);
- reg |= RTL818X_CMD_RX_ENABLE;
- reg |= RTL818X_CMD_TX_ENABLE;
- rtl818x_iowrite8(priv, &priv->map->CMD, reg);
-
- return 0;
-
- err_free_rings:
- rtl8180_free_rx_ring(dev);
- for (i = 0; i < (dev->queues + 1); i++)
- if (priv->tx_ring[i].desc)
- rtl8180_free_tx_ring(dev, i);
-
- return ret;
-}
-
-static void rtl8180_stop(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 reg;
- int i;
-
- rtl8180_int_disable(dev);
-
- reg = rtl818x_ioread8(priv, &priv->map->CMD);
- reg &= ~RTL818X_CMD_TX_ENABLE;
- reg &= ~RTL818X_CMD_RX_ENABLE;
- rtl818x_iowrite8(priv, &priv->map->CMD, reg);
-
- priv->rf->stop(dev);
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
- rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- free_irq(priv->pdev->irq, dev);
-
- rtl8180_free_rx_ring(dev);
- for (i = 0; i < (dev->queues + 1); i++)
- rtl8180_free_tx_ring(dev, i);
-}
-
-static u64 rtl8180_get_tsf(struct ieee80211_hw *dev,
- struct ieee80211_vif *vif)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
- (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
-}
-
-static void rtl8180_beacon_work(struct work_struct *work)
-{
- struct rtl8180_vif *vif_priv =
- container_of(work, struct rtl8180_vif, beacon_work.work);
- struct ieee80211_vif *vif =
- container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
- struct ieee80211_hw *dev = vif_priv->dev;
- struct ieee80211_mgmt *mgmt;
- struct sk_buff *skb;
-
- /* don't overflow the tx ring */
- if (ieee80211_queue_stopped(dev, 0))
- goto resched;
-
- /* grab a fresh beacon */
- skb = ieee80211_beacon_get(dev, vif);
- if (!skb)
- goto resched;
-
- /*
- * update beacon timestamp w/ TSF value
- * TODO: make hardware update beacon timestamp
- */
- mgmt = (struct ieee80211_mgmt *)skb->data;
- mgmt->u.beacon.timestamp = cpu_to_le64(rtl8180_get_tsf(dev, vif));
-
- /* TODO: use actual beacon queue */
- skb_set_queue_mapping(skb, 0);
-
- rtl8180_tx(dev, NULL, skb);
-
-resched:
- /*
- * schedule next beacon
- * TODO: use hardware support for beacon timing
- */
- schedule_delayed_work(&vif_priv->beacon_work,
- usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
-}
-
-static int rtl8180_add_interface(struct ieee80211_hw *dev,
- struct ieee80211_vif *vif)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_vif *vif_priv;
-
- /*
- * We only support one active interface at a time.
- */
- if (priv->vif)
- return -EBUSY;
-
- switch (vif->type) {
- case NL80211_IFTYPE_STATION:
- case NL80211_IFTYPE_ADHOC:
- break;
- default:
- return -EOPNOTSUPP;
- }
-
- priv->vif = vif;
-
- /* Initialize driver private area */
- vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
- vif_priv->dev = dev;
- INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8180_beacon_work);
- vif_priv->enable_beacon = false;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
- le32_to_cpu(*(__le32 *)vif->addr));
- rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
- le16_to_cpu(*(__le16 *)(vif->addr + 4)));
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- return 0;
-}
-
-static void rtl8180_remove_interface(struct ieee80211_hw *dev,
- struct ieee80211_vif *vif)
-{
- struct rtl8180_priv *priv = dev->priv;
- priv->vif = NULL;
-}
-
-static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct ieee80211_conf *conf = &dev->conf;
-
- priv->rf->set_chan(dev, conf);
-
- return 0;
-}
-
-static void rtl8187se_conf_ac_parm(struct ieee80211_hw *dev, u8 queue)
-{
- const struct ieee80211_tx_queue_params *params;
- struct rtl8180_priv *priv = dev->priv;
-
- /* hw value */
- u32 ac_param;
-
- u8 aifs;
- u8 txop;
- u8 cw_min, cw_max;
-
- params = &priv->queue_param[queue];
-
- cw_min = fls(params->cw_min);
- cw_max = fls(params->cw_max);
-
- aifs = 10 + params->aifs * priv->slot_time;
-
- /* TODO: check if txop HW is in us (mult by 32) */
- txop = params->txop;
-
- ac_param = txop << AC_PARAM_TXOP_LIMIT_SHIFT |
- cw_max << AC_PARAM_ECW_MAX_SHIFT |
- cw_min << AC_PARAM_ECW_MIN_SHIFT |
- aifs << AC_PARAM_AIFS_SHIFT;
-
- switch (queue) {
- case IEEE80211_AC_BK:
- rtl818x_iowrite32(priv, &priv->map->AC_BK_PARAM, ac_param);
- break;
- case IEEE80211_AC_BE:
- rtl818x_iowrite32(priv, &priv->map->AC_BE_PARAM, ac_param);
- break;
- case IEEE80211_AC_VI:
- rtl818x_iowrite32(priv, &priv->map->AC_VI_PARAM, ac_param);
- break;
- case IEEE80211_AC_VO:
- rtl818x_iowrite32(priv, &priv->map->AC_VO_PARAM, ac_param);
- break;
- }
-}
-
-static int rtl8180_conf_tx(struct ieee80211_hw *dev,
- struct ieee80211_vif *vif, u16 queue,
- const struct ieee80211_tx_queue_params *params)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 cw_min, cw_max;
-
- /* nothing to do ? */
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
- return 0;
-
- cw_min = fls(params->cw_min);
- cw_max = fls(params->cw_max);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- priv->queue_param[queue] = *params;
- rtl8187se_conf_ac_parm(dev, queue);
- } else
- rtl818x_iowrite8(priv, &priv->map->CW_VAL,
- (cw_max << 4) | cw_min);
- return 0;
-}
-
-static void rtl8180_conf_erp(struct ieee80211_hw *dev,
- struct ieee80211_bss_conf *info)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 sifs, difs;
- int eifs;
- u8 hw_eifs;
-
- /* TODO: should we do something ? */
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
- return;
-
- /* I _hope_ this means 10uS for the HW.
- * In reference code it is 0x22 for
- * both rtl8187L and rtl8187SE
- */
- sifs = 0x22;
-
- if (info->use_short_slot)
- priv->slot_time = 9;
- else
- priv->slot_time = 20;
-
- /* 10 is SIFS time in uS */
- difs = 10 + 2 * priv->slot_time;
- eifs = 10 + difs + priv->ack_time;
-
- /* HW should use 4uS units for EIFS (I'm sure for rtl8185)*/
- hw_eifs = DIV_ROUND_UP(eifs, 4);
-
-
- rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
- rtl818x_iowrite8(priv, &priv->map->SIFS, sifs);
- rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
-
- /* from reference code. set ack timeout reg = eifs reg */
- rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, hw_eifs);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- rtl818x_iowrite8(priv, &priv->map->EIFS_8187SE, hw_eifs);
- else if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) {
- /* rtl8187/rtl8185 HW bug. After EIFS is elapsed,
- * the HW still wait for DIFS.
- * HW uses 4uS units for EIFS.
- */
- hw_eifs = DIV_ROUND_UP(eifs - difs, 4);
-
- rtl818x_iowrite8(priv, &priv->map->EIFS, hw_eifs);
- }
-}
-
-static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
- struct ieee80211_vif *vif,
- struct ieee80211_bss_conf *info,
- u32 changed)
-{
- struct rtl8180_priv *priv = dev->priv;
- struct rtl8180_vif *vif_priv;
- int i;
- u8 reg;
-
- vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
-
- if (changed & BSS_CHANGED_BSSID) {
- rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->BSSID[0],
- le16_to_cpu(*(__le16 *)info->bssid));
- rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->BSSID[2],
- le32_to_cpu(*(__le32 *)(info->bssid + 2)));
-
- if (is_valid_ether_addr(info->bssid)) {
- if (vif->type == NL80211_IFTYPE_ADHOC)
- reg = RTL818X_MSR_ADHOC;
- else
- reg = RTL818X_MSR_INFRA;
- } else
- reg = RTL818X_MSR_NO_LINK;
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- reg |= RTL818X_MSR_ENEDCA;
-
- rtl818x_iowrite8(priv, &priv->map->MSR, reg);
- }
-
- if (changed & BSS_CHANGED_BASIC_RATES)
- rtl8180_conf_basic_rates(dev, info->basic_rates);
-
- if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) {
-
- /* when preamble changes, acktime duration changes, and erp must
- * be recalculated. ACK time is calculated at lowest rate.
- * Since mac80211 include SIFS time we remove it (-10)
- */
- priv->ack_time =
- le16_to_cpu(ieee80211_generic_frame_duration(dev,
- priv->vif,
- IEEE80211_BAND_2GHZ, 10,
- &priv->rates[0])) - 10;
-
- rtl8180_conf_erp(dev, info);
-
- /* mac80211 supplies aifs_n to driver and calls
- * conf_tx callback whether aifs_n changes, NOT
- * when aifs changes.
- * Aifs should be recalculated if slot changes.
- */
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- for (i = 0; i < 4; i++)
- rtl8187se_conf_ac_parm(dev, i);
- }
- }
-
- if (changed & BSS_CHANGED_BEACON_ENABLED)
- vif_priv->enable_beacon = info->enable_beacon;
-
- if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
- cancel_delayed_work_sync(&vif_priv->beacon_work);
- if (vif_priv->enable_beacon)
- schedule_work(&vif_priv->beacon_work.work);
- }
-}
-
-static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev,
- struct netdev_hw_addr_list *mc_list)
-{
- return netdev_hw_addr_list_count(mc_list);
-}
-
-static void rtl8180_configure_filter(struct ieee80211_hw *dev,
- unsigned int changed_flags,
- unsigned int *total_flags,
- u64 multicast)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- if (changed_flags & FIF_FCSFAIL)
- priv->rx_conf ^= RTL818X_RX_CONF_FCS;
- if (changed_flags & FIF_CONTROL)
- priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
- if (changed_flags & FIF_OTHER_BSS)
- priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
- if (*total_flags & FIF_ALLMULTI || multicast > 0)
- priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
- else
- priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
-
- *total_flags = 0;
-
- if (priv->rx_conf & RTL818X_RX_CONF_FCS)
- *total_flags |= FIF_FCSFAIL;
- if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
- *total_flags |= FIF_CONTROL;
- if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
- *total_flags |= FIF_OTHER_BSS;
- if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
- *total_flags |= FIF_ALLMULTI;
-
- rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
-}
-
-static const struct ieee80211_ops rtl8180_ops = {
- .tx = rtl8180_tx,
- .start = rtl8180_start,
- .stop = rtl8180_stop,
- .add_interface = rtl8180_add_interface,
- .remove_interface = rtl8180_remove_interface,
- .config = rtl8180_config,
- .bss_info_changed = rtl8180_bss_info_changed,
- .conf_tx = rtl8180_conf_tx,
- .prepare_multicast = rtl8180_prepare_multicast,
- .configure_filter = rtl8180_configure_filter,
- .get_tsf = rtl8180_get_tsf,
-};
-
-static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
-{
- struct rtl8180_priv *priv = eeprom->data;
- u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
-
- eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
- eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
- eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
- eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
-}
-
-static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
-{
- struct rtl8180_priv *priv = eeprom->data;
- u8 reg = 2 << 6;
-
- if (eeprom->reg_data_in)
- reg |= RTL818X_EEPROM_CMD_WRITE;
- if (eeprom->reg_data_out)
- reg |= RTL818X_EEPROM_CMD_READ;
- if (eeprom->reg_data_clock)
- reg |= RTL818X_EEPROM_CMD_CK;
- if (eeprom->reg_chip_select)
- reg |= RTL818X_EEPROM_CMD_CS;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(10);
-}
-
-static void rtl8180_eeprom_read(struct rtl8180_priv *priv)
-{
- struct eeprom_93cx6 eeprom;
- int eeprom_cck_table_adr;
- u16 eeprom_val;
- int i;
-
- eeprom.data = priv;
- eeprom.register_read = rtl8180_eeprom_register_read;
- eeprom.register_write = rtl8180_eeprom_register_write;
- if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
- eeprom.width = PCI_EEPROM_WIDTH_93C66;
- else
- eeprom.width = PCI_EEPROM_WIDTH_93C46;
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_PROGRAM);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(10);
-
- eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
- eeprom_val &= 0xFF;
- priv->rf_type = eeprom_val;
-
- eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
- priv->csthreshold = eeprom_val >> 8;
-
- eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)priv->mac_addr, 3);
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- eeprom_cck_table_adr = 0x30;
- else
- eeprom_cck_table_adr = 0x10;
-
- /* CCK TX power */
- for (i = 0; i < 14; i += 2) {
- u16 txpwr;
- eeprom_93cx6_read(&eeprom, eeprom_cck_table_adr + (i >> 1),
- &txpwr);
- priv->channels[i].hw_value = txpwr & 0xFF;
- priv->channels[i + 1].hw_value = txpwr >> 8;
- }
-
- /* OFDM TX power */
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
- for (i = 0; i < 14; i += 2) {
- u16 txpwr;
- eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
- priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
- priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
- }
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) {
- __le32 anaparam;
- eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
- priv->anaparam = le32_to_cpu(anaparam);
- eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
- }
-
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
- eeprom_93cx6_read(&eeprom, 0x3F, &eeprom_val);
- priv->antenna_diversity_en = !!(eeprom_val & 0x100);
- priv->antenna_diversity_default = (eeprom_val & 0xC00) == 0x400;
-
- eeprom_93cx6_read(&eeprom, 0x7C, &eeprom_val);
- priv->xtal_out = eeprom_val & 0xF;
- priv->xtal_in = (eeprom_val & 0xF0) >> 4;
- priv->xtal_cal = !!(eeprom_val & 0x1000);
- priv->thermal_meter_val = (eeprom_val & 0xF00) >> 8;
- priv->thermal_meter_en = !!(eeprom_val & 0x2000);
- }
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
- RTL818X_EEPROM_CMD_NORMAL);
-}
-
-static int rtl8180_probe(struct pci_dev *pdev,
- const struct pci_device_id *id)
-{
- struct ieee80211_hw *dev;
- struct rtl8180_priv *priv;
- unsigned long mem_addr, mem_len;
- unsigned int io_addr, io_len;
- int err;
- const char *chip_name, *rf_name = NULL;
- u32 reg;
-
- err = pci_enable_device(pdev);
- if (err) {
- printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
- pci_name(pdev));
- return err;
- }
-
- err = pci_request_regions(pdev, KBUILD_MODNAME);
- if (err) {
- printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
- pci_name(pdev));
- return err;
- }
-
- io_addr = pci_resource_start(pdev, 0);
- io_len = pci_resource_len(pdev, 0);
- mem_addr = pci_resource_start(pdev, 1);
- mem_len = pci_resource_len(pdev, 1);
-
- if (mem_len < sizeof(struct rtl818x_csr) ||
- io_len < sizeof(struct rtl818x_csr)) {
- printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
- pci_name(pdev));
- err = -ENOMEM;
- goto err_free_reg;
- }
-
- if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) ||
- (err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))) {
- printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
- pci_name(pdev));
- goto err_free_reg;
- }
-
- pci_set_master(pdev);
-
- dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
- if (!dev) {
- printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
- pci_name(pdev));
- err = -ENOMEM;
- goto err_free_reg;
- }
-
- priv = dev->priv;
- priv->pdev = pdev;
-
- dev->max_rates = 1;
- SET_IEEE80211_DEV(dev, &pdev->dev);
- pci_set_drvdata(pdev, dev);
-
- priv->map_pio = false;
- priv->map = pci_iomap(pdev, 1, mem_len);
- if (!priv->map) {
- priv->map = pci_iomap(pdev, 0, io_len);
- priv->map_pio = true;
- }
-
- if (!priv->map) {
- dev_err(&pdev->dev, "Cannot map device memory/PIO\n");
- err = -ENOMEM;
- goto err_free_dev;
- }
-
- BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
- BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
-
- memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
- memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
-
- priv->band.band = IEEE80211_BAND_2GHZ;
- priv->band.channels = priv->channels;
- priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
- priv->band.bitrates = priv->rates;
- priv->band.n_bitrates = 4;
- dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
-
- ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING);
- ieee80211_hw_set(dev, RX_INCLUDES_FCS);
-
- dev->vif_data_size = sizeof(struct rtl8180_vif);
- dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
- BIT(NL80211_IFTYPE_ADHOC);
- dev->max_signal = 65;
-
- reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
- reg &= RTL818X_TX_CONF_HWVER_MASK;
- switch (reg) {
- case RTL818X_TX_CONF_R8180_ABCD:
- chip_name = "RTL8180";
- priv->chip_family = RTL818X_CHIP_FAMILY_RTL8180;
- break;
-
- case RTL818X_TX_CONF_R8180_F:
- chip_name = "RTL8180vF";
- priv->chip_family = RTL818X_CHIP_FAMILY_RTL8180;
- break;
-
- case RTL818X_TX_CONF_R8185_ABC:
- chip_name = "RTL8185";
- priv->chip_family = RTL818X_CHIP_FAMILY_RTL8185;
- break;
-
- case RTL818X_TX_CONF_R8185_D:
- chip_name = "RTL8185vD";
- priv->chip_family = RTL818X_CHIP_FAMILY_RTL8185;
- break;
-
- case RTL818X_TX_CONF_RTL8187SE:
- chip_name = "RTL8187SE";
- if (priv->map_pio) {
- dev_err(&pdev->dev,
- "MMIO failed. PIO not supported on RTL8187SE\n");
- err = -ENOMEM;
- goto err_iounmap;
- }
- priv->chip_family = RTL818X_CHIP_FAMILY_RTL8187SE;
- break;
-
- default:
- printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
- pci_name(pdev), reg >> 25);
- err = -ENODEV;
- goto err_iounmap;
- }
-
- /* we declare to MAC80211 all the queues except for beacon queue
- * that will be eventually handled by DRV.
- * TX rings are arranged in such a way that lower is the IDX,
- * higher is the priority, in order to achieve direct mapping
- * with mac80211, however the beacon queue is an exception and it
- * is mapped on the highst tx ring IDX.
- */
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- dev->queues = RTL8187SE_NR_TX_QUEUES - 1;
- else
- dev->queues = RTL8180_NR_TX_QUEUES - 1;
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
- priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
- pci_try_set_mwi(pdev);
- }
-
- if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180)
- ieee80211_hw_set(dev, SIGNAL_DBM);
- else
- ieee80211_hw_set(dev, SIGNAL_UNSPEC);
-
- rtl8180_eeprom_read(priv);
-
- switch (priv->rf_type) {
- case 1: rf_name = "Intersil";
- break;
- case 2: rf_name = "RFMD";
- break;
- case 3: priv->rf = &sa2400_rf_ops;
- break;
- case 4: priv->rf = &max2820_rf_ops;
- break;
- case 5: priv->rf = &grf5101_rf_ops;
- break;
- case 9:
- if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
- priv->rf = rtl8187se_detect_rf(dev);
- else
- priv->rf = rtl8180_detect_rf(dev);
- break;
- case 10:
- rf_name = "RTL8255";
- break;
- default:
- printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
- pci_name(pdev), priv->rf_type);
- err = -ENODEV;
- goto err_iounmap;
- }
-
- if (!priv->rf) {
- printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
- pci_name(pdev), rf_name);
- err = -ENODEV;
- goto err_iounmap;
- }
-
- if (!is_valid_ether_addr(priv->mac_addr)) {
- printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
- " randomly generated MAC addr\n", pci_name(pdev));
- eth_random_addr(priv->mac_addr);
- }
- SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr);
-
- spin_lock_init(&priv->lock);
-
- err = ieee80211_register_hw(dev);
- if (err) {
- printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
- pci_name(pdev));
- goto err_iounmap;
- }
-
- wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n",
- priv->mac_addr, chip_name, priv->rf->name);
-
- return 0;
-
- err_iounmap:
- pci_iounmap(pdev, priv->map);
-
- err_free_dev:
- ieee80211_free_hw(dev);
-
- err_free_reg:
- pci_release_regions(pdev);
- pci_disable_device(pdev);
- return err;
-}
-
-static void rtl8180_remove(struct pci_dev *pdev)
-{
- struct ieee80211_hw *dev = pci_get_drvdata(pdev);
- struct rtl8180_priv *priv;
-
- if (!dev)
- return;
-
- ieee80211_unregister_hw(dev);
-
- priv = dev->priv;
-
- pci_iounmap(pdev, priv->map);
- pci_release_regions(pdev);
- pci_disable_device(pdev);
- ieee80211_free_hw(dev);
-}
-
-#ifdef CONFIG_PM
-static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
-{
- pci_save_state(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
- return 0;
-}
-
-static int rtl8180_resume(struct pci_dev *pdev)
-{
- pci_set_power_state(pdev, PCI_D0);
- pci_restore_state(pdev);
- return 0;
-}
-
-#endif /* CONFIG_PM */
-
-static struct pci_driver rtl8180_driver = {
- .name = KBUILD_MODNAME,
- .id_table = rtl8180_table,
- .probe = rtl8180_probe,
- .remove = rtl8180_remove,
-#ifdef CONFIG_PM
- .suspend = rtl8180_suspend,
- .resume = rtl8180_resume,
-#endif /* CONFIG_PM */
-};
-
-module_pci_driver(rtl8180_driver);
diff --git a/drivers/net/wireless/rtl818x/rtl8180/grf5101.c b/drivers/net/wireless/rtl818x/rtl8180/grf5101.c
deleted file mode 100644
index b1bfee738..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/grf5101.c
+++ /dev/null
@@ -1,190 +0,0 @@
-
-/*
- * Radio tuning for GCT GRF5101 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "grf5101.h"
-
-static const int grf5101_encode[] = {
- 0x0, 0x8, 0x4, 0xC,
- 0x2, 0xA, 0x6, 0xE,
- 0x1, 0x9, 0x5, 0xD,
- 0x3, 0xB, 0x7, 0xF
-};
-
-static void write_grf5101(struct ieee80211_hw *dev, u8 addr, u32 data)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 phy_config;
-
- phy_config = grf5101_encode[(data >> 8) & 0xF];
- phy_config |= grf5101_encode[(data >> 4) & 0xF] << 4;
- phy_config |= grf5101_encode[data & 0xF] << 8;
- phy_config |= grf5101_encode[(addr >> 1) & 0xF] << 12;
- phy_config |= (addr & 1) << 16;
- phy_config |= grf5101_encode[(data & 0xf000) >> 12] << 24;
-
- /* MAC will bang bits to the chip */
- phy_config |= 0x90000000;
-
- rtl818x_iowrite32(priv,
- (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
-
- msleep(3);
-}
-
-static void grf5101_write_phy_antenna(struct ieee80211_hw *dev, short chan)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 ant = GRF5101_ANTENNA;
-
- if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
- ant |= BB_ANTENNA_B;
-
- if (chan == 14)
- ant |= BB_ANTATTEN_CHAN14;
-
- rtl8180_write_phy(dev, 0x10, ant);
-}
-
-static u8 grf5101_rf_calc_rssi(u8 agc, u8 sq)
-{
- if (agc > 60)
- return 65;
-
- /* TODO(?): just return agc (or agc + 5) to avoid mult / div */
- return 65 * agc / 60;
-}
-
-static void grf5101_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf)
-{
- struct rtl8180_priv *priv = dev->priv;
- int channel =
- ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
- u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
- u32 chan = channel - 1;
-
- /* set TX power */
- write_grf5101(dev, 0x15, 0x0);
- write_grf5101(dev, 0x06, txpw);
- write_grf5101(dev, 0x15, 0x10);
- write_grf5101(dev, 0x15, 0x0);
-
- /* set frequency */
- write_grf5101(dev, 0x07, 0x0);
- write_grf5101(dev, 0x0B, chan);
- write_grf5101(dev, 0x07, 0x1000);
-
- grf5101_write_phy_antenna(dev, channel);
-}
-
-static void grf5101_rf_stop(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 anaparam;
-
- anaparam = priv->anaparam;
- anaparam &= 0x000fffff;
- anaparam |= 0x3f900000;
- rtl8180_set_anaparam(priv, anaparam);
-
- write_grf5101(dev, 0x07, 0x0);
- write_grf5101(dev, 0x1f, 0x45);
- write_grf5101(dev, 0x1f, 0x5);
- write_grf5101(dev, 0x00, 0x8e4);
-}
-
-static void grf5101_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- rtl8180_set_anaparam(priv, priv->anaparam);
-
- write_grf5101(dev, 0x1f, 0x0);
- write_grf5101(dev, 0x1f, 0x0);
- write_grf5101(dev, 0x1f, 0x40);
- write_grf5101(dev, 0x1f, 0x60);
- write_grf5101(dev, 0x1f, 0x61);
- write_grf5101(dev, 0x1f, 0x61);
- write_grf5101(dev, 0x00, 0xae4);
- write_grf5101(dev, 0x1f, 0x1);
- write_grf5101(dev, 0x1f, 0x41);
- write_grf5101(dev, 0x1f, 0x61);
-
- write_grf5101(dev, 0x01, 0x1a23);
- write_grf5101(dev, 0x02, 0x4971);
- write_grf5101(dev, 0x03, 0x41de);
- write_grf5101(dev, 0x04, 0x2d80);
- write_grf5101(dev, 0x05, 0x68ff); /* 0x61ff original value */
- write_grf5101(dev, 0x06, 0x0);
- write_grf5101(dev, 0x07, 0x0);
- write_grf5101(dev, 0x08, 0x7533);
- write_grf5101(dev, 0x09, 0xc401);
- write_grf5101(dev, 0x0a, 0x0);
- write_grf5101(dev, 0x0c, 0x1c7);
- write_grf5101(dev, 0x0d, 0x29d3);
- write_grf5101(dev, 0x0e, 0x2e8);
- write_grf5101(dev, 0x10, 0x192);
- write_grf5101(dev, 0x11, 0x248);
- write_grf5101(dev, 0x12, 0x0);
- write_grf5101(dev, 0x13, 0x20c4);
- write_grf5101(dev, 0x14, 0xf4fc);
- write_grf5101(dev, 0x15, 0x0);
- write_grf5101(dev, 0x16, 0x1500);
-
- write_grf5101(dev, 0x07, 0x1000);
-
- /* baseband configuration */
- rtl8180_write_phy(dev, 0, 0xa8);
- rtl8180_write_phy(dev, 3, 0x0);
- rtl8180_write_phy(dev, 4, 0xc0);
- rtl8180_write_phy(dev, 5, 0x90);
- rtl8180_write_phy(dev, 6, 0x1e);
- rtl8180_write_phy(dev, 7, 0x64);
-
- grf5101_write_phy_antenna(dev, 1);
-
- rtl8180_write_phy(dev, 0x11, 0x88);
-
- if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
- RTL818X_CONFIG2_ANTENNA_DIV)
- rtl8180_write_phy(dev, 0x12, 0xc0); /* enable ant diversity */
- else
- rtl8180_write_phy(dev, 0x12, 0x40); /* disable ant diversity */
-
- rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
-
- rtl8180_write_phy(dev, 0x19, 0x0);
- rtl8180_write_phy(dev, 0x1a, 0xa0);
- rtl8180_write_phy(dev, 0x1b, 0x44);
-}
-
-const struct rtl818x_rf_ops grf5101_rf_ops = {
- .name = "GCT",
- .init = grf5101_rf_init,
- .stop = grf5101_rf_stop,
- .set_chan = grf5101_rf_set_channel,
- .calc_rssi = grf5101_rf_calc_rssi,
-};
diff --git a/drivers/net/wireless/rtl818x/rtl8180/grf5101.h b/drivers/net/wireless/rtl818x/rtl8180/grf5101.h
deleted file mode 100644
index 4d80a2785..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/grf5101.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef RTL8180_GRF5101_H
-#define RTL8180_GRF5101_H
-
-/*
- * Radio tuning for GCT GRF5101 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define GRF5101_ANTENNA 0xA3
-
-extern const struct rtl818x_rf_ops grf5101_rf_ops;
-
-#endif /* RTL8180_GRF5101_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8180/max2820.c b/drivers/net/wireless/rtl818x/rtl8180/max2820.c
deleted file mode 100644
index eebf23976..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/max2820.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Radio tuning for Maxim max2820 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "max2820.h"
-
-static const u32 max2820_chan[] = {
- 12, /* CH 1 */
- 17,
- 22,
- 27,
- 32,
- 37,
- 42,
- 47,
- 52,
- 57,
- 62,
- 67,
- 72,
- 84, /* CH 14 */
-};
-
-static void write_max2820(struct ieee80211_hw *dev, u8 addr, u32 data)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 phy_config;
-
- phy_config = 0x90 + (data & 0xf);
- phy_config <<= 16;
- phy_config += addr;
- phy_config <<= 8;
- phy_config += (data >> 4) & 0xff;
-
- rtl818x_iowrite32(priv,
- (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
-
- msleep(1);
-}
-
-static void max2820_write_phy_antenna(struct ieee80211_hw *dev, short chan)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 ant;
-
- ant = MAXIM_ANTENNA;
- if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
- ant |= BB_ANTENNA_B;
- if (chan == 14)
- ant |= BB_ANTATTEN_CHAN14;
-
- rtl8180_write_phy(dev, 0x10, ant);
-}
-
-static u8 max2820_rf_calc_rssi(u8 agc, u8 sq)
-{
- bool odd;
-
- odd = !!(agc & 1);
-
- agc >>= 1;
- if (odd)
- agc += 76;
- else
- agc += 66;
-
- /* TODO: change addends above to avoid mult / div below */
- return 65 * agc / 100;
-}
-
-static void max2820_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf)
-{
- struct rtl8180_priv *priv = dev->priv;
- int channel = conf ?
- ieee80211_frequency_to_channel(conf->chandef.chan->center_freq) : 1;
- unsigned int chan_idx = channel - 1;
- u32 txpw = priv->channels[chan_idx].hw_value & 0xFF;
- u32 chan = max2820_chan[chan_idx];
-
- /* While philips SA2400 drive the PA bias from
- * sa2400, for MAXIM we do this directly from BB */
- rtl8180_write_phy(dev, 3, txpw);
-
- max2820_write_phy_antenna(dev, channel);
- write_max2820(dev, 3, chan);
-}
-
-static void max2820_rf_stop(struct ieee80211_hw *dev)
-{
- rtl8180_write_phy(dev, 3, 0x8);
- write_max2820(dev, 1, 0);
-}
-
-
-static void max2820_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
-
- /* MAXIM from netbsd driver */
- write_max2820(dev, 0, 0x007); /* test mode as indicated in datasheet */
- write_max2820(dev, 1, 0x01e); /* enable register */
- write_max2820(dev, 2, 0x001); /* synt register */
-
- max2820_rf_set_channel(dev, NULL);
-
- write_max2820(dev, 4, 0x313); /* rx register */
-
- /* PA is driven directly by the BB, we keep the MAXIM bias
- * at the highest value in case that setting it to lower
- * values may introduce some further attenuation somewhere..
- */
- write_max2820(dev, 5, 0x00f);
-
- /* baseband configuration */
- rtl8180_write_phy(dev, 0, 0x88); /* sys1 */
- rtl8180_write_phy(dev, 3, 0x08); /* txagc */
- rtl8180_write_phy(dev, 4, 0xf8); /* lnadet */
- rtl8180_write_phy(dev, 5, 0x90); /* ifagcinit */
- rtl8180_write_phy(dev, 6, 0x1a); /* ifagclimit */
- rtl8180_write_phy(dev, 7, 0x64); /* ifagcdet */
-
- max2820_write_phy_antenna(dev, 1);
-
- rtl8180_write_phy(dev, 0x11, 0x88); /* trl */
-
- if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
- RTL818X_CONFIG2_ANTENNA_DIV)
- rtl8180_write_phy(dev, 0x12, 0xc7);
- else
- rtl8180_write_phy(dev, 0x12, 0x47);
-
- rtl8180_write_phy(dev, 0x13, 0x9b);
-
- rtl8180_write_phy(dev, 0x19, 0x0); /* CHESTLIM */
- rtl8180_write_phy(dev, 0x1a, 0x9f); /* CHSQLIM */
-
- max2820_rf_set_channel(dev, NULL);
-}
-
-const struct rtl818x_rf_ops max2820_rf_ops = {
- .name = "Maxim",
- .init = max2820_rf_init,
- .stop = max2820_rf_stop,
- .set_chan = max2820_rf_set_channel,
- .calc_rssi = max2820_rf_calc_rssi,
-};
diff --git a/drivers/net/wireless/rtl818x/rtl8180/max2820.h b/drivers/net/wireless/rtl818x/rtl8180/max2820.h
deleted file mode 100644
index 8e982b72b..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/max2820.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef RTL8180_MAX2820_H
-#define RTL8180_MAX2820_H
-
-/*
- * Radio tuning for Maxim max2820 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define MAXIM_ANTENNA 0xb3
-
-extern const struct rtl818x_rf_ops max2820_rf_ops;
-
-#endif /* RTL8180_MAX2820_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8180/rtl8180.h b/drivers/net/wireless/rtl818x/rtl8180/rtl8180.h
deleted file mode 100644
index e8243a44d..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/rtl8180.h
+++ /dev/null
@@ -1,185 +0,0 @@
-#ifndef RTL8180_H
-#define RTL8180_H
-
-#include "rtl818x.h"
-
-#define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD
-
-#define RF_PARAM_ANALOGPHY (1 << 0)
-#define RF_PARAM_ANTBDEFAULT (1 << 1)
-#define RF_PARAM_CARRIERSENSE1 (1 << 2)
-#define RF_PARAM_CARRIERSENSE2 (1 << 3)
-
-#define BB_ANTATTEN_CHAN14 0x0C
-#define BB_ANTENNA_B 0x40
-
-#define BB_HOST_BANG (1 << 30)
-#define BB_HOST_BANG_EN (1 << 2)
-#define BB_HOST_BANG_CLK (1 << 1)
-#define BB_HOST_BANG_DATA 1
-
-#define ANAPARAM_TXDACOFF_SHIFT 27
-#define ANAPARAM_PWR0_SHIFT 28
-#define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
-#define ANAPARAM_PWR1_SHIFT 20
-#define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
-
-/* rtl8180/rtl8185 have 3 queue + beacon queue.
- * mac80211 can use just one, + beacon = 2 tot.
- */
-#define RTL8180_NR_TX_QUEUES 2
-
-/* rtl8187SE have 6 queues + beacon queues
- * mac80211 can use 4 QoS data queue, + beacon = 5 tot
- */
-#define RTL8187SE_NR_TX_QUEUES 5
-
-/* for array static allocation, it is the max of above */
-#define RTL818X_NR_TX_QUEUES 5
-
-struct rtl8180_tx_desc {
- __le32 flags;
- __le16 rts_duration;
- __le16 plcp_len;
- __le32 tx_buf;
- union{
- __le32 frame_len;
- struct {
- __le16 frame_len_se;
- __le16 frame_duration;
- } __packed;
- } __packed;
- __le32 next_tx_desc;
- u8 cw;
- u8 retry_limit;
- u8 agc;
- u8 flags2;
- /* rsvd for 8180/8185.
- * valid for 8187se but we dont use it
- */
- u32 reserved;
- /* all rsvd for 8180/8185 */
- __le16 flags3;
- __le16 frag_qsize;
-} __packed;
-
-struct rtl818x_rx_cmd_desc {
- __le32 flags;
- u32 reserved;
- __le32 rx_buf;
-} __packed;
-
-struct rtl8180_rx_desc {
- __le32 flags;
- __le32 flags2;
- __le64 tsft;
-
-} __packed;
-
-struct rtl8187se_rx_desc {
- __le32 flags;
- __le64 tsft;
- __le32 flags2;
- __le32 flags3;
- u32 reserved[3];
-} __packed;
-
-struct rtl8180_tx_ring {
- struct rtl8180_tx_desc *desc;
- dma_addr_t dma;
- unsigned int idx;
- unsigned int entries;
- struct sk_buff_head queue;
-};
-
-struct rtl8180_vif {
- struct ieee80211_hw *dev;
-
- /* beaconing */
- struct delayed_work beacon_work;
- bool enable_beacon;
-};
-
-struct rtl8180_priv {
- /* common between rtl818x drivers */
- struct rtl818x_csr __iomem *map;
- const struct rtl818x_rf_ops *rf;
- struct ieee80211_vif *vif;
-
- /* rtl8180 driver specific */
- bool map_pio;
- spinlock_t lock;
- void *rx_ring;
- u8 rx_ring_sz;
- dma_addr_t rx_ring_dma;
- unsigned int rx_idx;
- struct sk_buff *rx_buf[32];
- struct rtl8180_tx_ring tx_ring[RTL818X_NR_TX_QUEUES];
- struct ieee80211_channel channels[14];
- struct ieee80211_rate rates[12];
- struct ieee80211_supported_band band;
- struct ieee80211_tx_queue_params queue_param[4];
- struct pci_dev *pdev;
- u32 rx_conf;
- u8 slot_time;
- u16 ack_time;
-
- enum {
- RTL818X_CHIP_FAMILY_RTL8180,
- RTL818X_CHIP_FAMILY_RTL8185,
- RTL818X_CHIP_FAMILY_RTL8187SE,
- } chip_family;
- u32 anaparam;
- u16 rfparam;
- u8 csthreshold;
- u8 mac_addr[ETH_ALEN];
- u8 rf_type;
- u8 xtal_out;
- u8 xtal_in;
- u8 xtal_cal;
- u8 thermal_meter_val;
- u8 thermal_meter_en;
- u8 antenna_diversity_en;
- u8 antenna_diversity_default;
- /* sequence # */
- u16 seqno;
-};
-
-void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
-void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);
-void rtl8180_set_anaparam2(struct rtl8180_priv *priv, u32 anaparam2);
-
-static inline u8 rtl818x_ioread8(struct rtl8180_priv *priv, u8 __iomem *addr)
-{
- return ioread8(addr);
-}
-
-static inline u16 rtl818x_ioread16(struct rtl8180_priv *priv, __le16 __iomem *addr)
-{
- return ioread16(addr);
-}
-
-static inline u32 rtl818x_ioread32(struct rtl8180_priv *priv, __le32 __iomem *addr)
-{
- return ioread32(addr);
-}
-
-static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
- u8 __iomem *addr, u8 val)
-{
- iowrite8(val, addr);
-}
-
-static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
- __le16 __iomem *addr, u16 val)
-{
- iowrite16(val, addr);
-}
-
-static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
- __le32 __iomem *addr, u32 val)
-{
- iowrite32(val, addr);
-}
-
-#endif /* RTL8180_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8180/rtl8225.c b/drivers/net/wireless/rtl818x/rtl8180/rtl8225.c
deleted file mode 100644
index 9bda5bc78..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/rtl8225.c
+++ /dev/null
@@ -1,770 +0,0 @@
-
-/*
- * Radio tuning for RTL8225 on RTL8180
- *
- * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Based on the r8180 driver, which is:
- * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
- *
- * Thanks to Realtek for their support!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "rtl8225.h"
-
-static void rtl8225_write(struct ieee80211_hw *dev, u8 addr, u16 data)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg80, reg84, reg82;
- u32 bangdata;
- int i;
-
- bangdata = (data << 4) | (addr & 0xf);
-
- reg80 = rtl818x_ioread16(priv, &priv->map->RFPinsOutput) & 0xfff3;
- reg82 = rtl818x_ioread16(priv, &priv->map->RFPinsEnable);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82 | 0x7);
-
- reg84 = rtl818x_ioread16(priv, &priv->map->RFPinsSelect);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x7 | 0x400);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(10);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(10);
-
- for (i = 15; i >= 0; i--) {
- u16 reg = reg80;
-
- if (bangdata & (1 << i))
- reg |= 1;
-
- if (i & 1)
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg | (1 << 1));
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg | (1 << 1));
-
- if (!(i & 1))
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg);
- }
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(10);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2));
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x400);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-}
-
-static u16 rtl8225_read(struct ieee80211_hw *dev, u8 addr)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg80, reg82, reg84, out;
- int i;
-
- reg80 = rtl818x_ioread16(priv, &priv->map->RFPinsOutput);
- reg82 = rtl818x_ioread16(priv, &priv->map->RFPinsEnable);
- reg84 = rtl818x_ioread16(priv, &priv->map->RFPinsSelect) | 0x400;
-
- reg80 &= ~0xF;
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82 | 0x000F);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x000F);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(4);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(5);
-
- for (i = 4; i >= 0; i--) {
- u16 reg = reg80 | ((addr >> i) & 1);
-
- if (!(i & 1)) {
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(1);
- }
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
-
- if (i & 1) {
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(1);
- }
- }
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x000E);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x040E);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3) | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
-
- out = 0;
- for (i = 11; i >= 0; i--) {
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(1);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3) | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3) | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3) | (1 << 1));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
-
- if (rtl818x_ioread16(priv, &priv->map->RFPinsInput) & (1 << 1))
- out |= 1 << i;
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
- }
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput,
- reg80 | (1 << 3) | (1 << 2));
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- udelay(2);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84);
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x03A0);
-
- return out;
-}
-
-static const u16 rtl8225bcd_rxgain[] = {
- 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
- 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
- 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
- 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
- 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
- 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
- 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
- 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
- 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
- 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
- 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
- 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
-};
-
-static const u8 rtl8225_agc[] = {
- 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e,
- 0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96,
- 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 0x8f, 0x8e,
- 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86,
- 0x85, 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e,
- 0x3d, 0x3c, 0x3b, 0x3a, 0x39, 0x38, 0x37, 0x36,
- 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 0x2e,
- 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26,
- 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e,
- 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 0x17, 0x16,
- 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
- 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06,
- 0x05, 0x04, 0x03, 0x02, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
-};
-
-static const u8 rtl8225_gain[] = {
- 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */
- 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */
- 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */
- 0x33, 0x80, 0x79, 0xc5, /* -78dbm */
- 0x43, 0x78, 0x76, 0xc5, /* -74dbm */
- 0x53, 0x60, 0x73, 0xc5, /* -70dbm */
- 0x63, 0x58, 0x70, 0xc5, /* -66dbm */
-};
-
-static const u8 rtl8225_threshold[] = {
- 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd
-};
-
-static const u8 rtl8225_tx_gain_cck_ofdm[] = {
- 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
-};
-
-static const u8 rtl8225_tx_power_cck[] = {
- 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
- 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
- 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
- 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
- 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
- 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
-};
-
-static const u8 rtl8225_tx_power_cck_ch14[] = {
- 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
- 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
- 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
- 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
- 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
- 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
-};
-
-static const u8 rtl8225_tx_power_ofdm[] = {
- 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
-};
-
-static const u32 rtl8225_chan[] = {
- 0x085c, 0x08dc, 0x095c, 0x09dc, 0x0a5c, 0x0adc, 0x0b5c,
- 0x0bdc, 0x0c5c, 0x0cdc, 0x0d5c, 0x0ddc, 0x0e5c, 0x0f72
-};
-
-static void rtl8225_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 cck_power, ofdm_power;
- const u8 *tmp;
- u32 reg;
- int i;
-
- cck_power = priv->channels[channel - 1].hw_value & 0xFF;
- ofdm_power = priv->channels[channel - 1].hw_value >> 8;
-
- cck_power = min(cck_power, (u8)35);
- ofdm_power = min(ofdm_power, (u8)35);
-
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK,
- rtl8225_tx_gain_cck_ofdm[cck_power / 6] >> 1);
-
- if (channel == 14)
- tmp = &rtl8225_tx_power_cck_ch14[(cck_power % 6) * 8];
- else
- tmp = &rtl8225_tx_power_cck[(cck_power % 6) * 8];
-
- for (i = 0; i < 8; i++)
- rtl8225_write_phy_cck(dev, 0x44 + i, *tmp++);
-
- msleep(1); /* FIXME: optional? */
-
- /* TODO: use set_anaparam2 dev.c_func*/
- /* anaparam2 on */
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM,
- rtl8225_tx_gain_cck_ofdm[ofdm_power/6] >> 1);
-
- tmp = &rtl8225_tx_power_ofdm[ofdm_power % 6];
-
- rtl8225_write_phy_ofdm(dev, 5, *tmp);
- rtl8225_write_phy_ofdm(dev, 7, *tmp);
-
- msleep(1);
-}
-
-static void rtl8225_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- int i;
-
- rtl8180_set_anaparam(priv, RTL8225_ANAPARAM_ON);
-
- /* host_pci_init */
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488);
- rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- msleep(200); /* FIXME: ehh?? */
- rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0xFF & ~(1 << 6));
-
- rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
-
- /* TODO: check if we need really to change BRSR to do RF config */
- rtl818x_ioread16(priv, &priv->map->BRSR);
- rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
- rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- rtl8225_write(dev, 0x0, 0x067);
- rtl8225_write(dev, 0x1, 0xFE0);
- rtl8225_write(dev, 0x2, 0x44D);
- rtl8225_write(dev, 0x3, 0x441);
- rtl8225_write(dev, 0x4, 0x8BE);
- rtl8225_write(dev, 0x5, 0xBF0); /* TODO: minipci */
- rtl8225_write(dev, 0x6, 0xAE6);
- rtl8225_write(dev, 0x7, rtl8225_chan[0]);
- rtl8225_write(dev, 0x8, 0x01F);
- rtl8225_write(dev, 0x9, 0x334);
- rtl8225_write(dev, 0xA, 0xFD4);
- rtl8225_write(dev, 0xB, 0x391);
- rtl8225_write(dev, 0xC, 0x050);
- rtl8225_write(dev, 0xD, 0x6DB);
- rtl8225_write(dev, 0xE, 0x029);
- rtl8225_write(dev, 0xF, 0x914); msleep(1);
-
- rtl8225_write(dev, 0x2, 0xC4D); msleep(100);
-
- rtl8225_write(dev, 0x0, 0x127);
-
- for (i = 0; i < ARRAY_SIZE(rtl8225bcd_rxgain); i++) {
- rtl8225_write(dev, 0x1, i + 1);
- rtl8225_write(dev, 0x2, rtl8225bcd_rxgain[i]);
- }
-
- rtl8225_write(dev, 0x0, 0x027);
- rtl8225_write(dev, 0x0, 0x22F);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-
- for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) {
- rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]);
- msleep(1);
- rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i);
- msleep(1);
- }
-
- msleep(1);
-
- rtl8225_write_phy_ofdm(dev, 0x00, 0x01); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x01, 0x02); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x02, 0x62); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x03, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x04, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x05, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x06, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x07, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x08, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0a, 0x09); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x10, 0x84); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x11, 0x03); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x12, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x13, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x14, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x15, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x16, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x17, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x19, 0x19); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1b, 0x76); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1e, 0x95); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x21, 0x27); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x22, 0x16); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x24, 0x46); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x25, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x27, 0x88); msleep(1);
-
- rtl8225_write_phy_cck(dev, 0x00, 0x98); msleep(1);
- rtl8225_write_phy_cck(dev, 0x03, 0x20); msleep(1);
- rtl8225_write_phy_cck(dev, 0x04, 0x7e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x05, 0x12); msleep(1);
- rtl8225_write_phy_cck(dev, 0x06, 0xfc); msleep(1);
- rtl8225_write_phy_cck(dev, 0x07, 0x78); msleep(1);
- rtl8225_write_phy_cck(dev, 0x08, 0x2e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x10, 0x93); msleep(1);
- rtl8225_write_phy_cck(dev, 0x11, 0x88); msleep(1);
- rtl8225_write_phy_cck(dev, 0x12, 0x47); msleep(1);
- rtl8225_write_phy_cck(dev, 0x13, 0xd0);
- rtl8225_write_phy_cck(dev, 0x19, 0x00);
- rtl8225_write_phy_cck(dev, 0x1a, 0xa0);
- rtl8225_write_phy_cck(dev, 0x1b, 0x08);
- rtl8225_write_phy_cck(dev, 0x40, 0x86);
- rtl8225_write_phy_cck(dev, 0x41, 0x8d); msleep(1);
- rtl8225_write_phy_cck(dev, 0x42, 0x15); msleep(1);
- rtl8225_write_phy_cck(dev, 0x43, 0x18); msleep(1);
- rtl8225_write_phy_cck(dev, 0x44, 0x1f); msleep(1);
- rtl8225_write_phy_cck(dev, 0x45, 0x1e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x46, 0x1a); msleep(1);
- rtl8225_write_phy_cck(dev, 0x47, 0x15); msleep(1);
- rtl8225_write_phy_cck(dev, 0x48, 0x10); msleep(1);
- rtl8225_write_phy_cck(dev, 0x49, 0x0a); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4a, 0x05); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4b, 0x02); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4c, 0x05); msleep(1);
-
- rtl818x_iowrite8(priv, &priv->map->TESTR, 0x0D); msleep(1);
-
- rtl8225_rf_set_tx_power(dev, 1);
-
- /* RX antenna default to A */
- rtl8225_write_phy_cck(dev, 0x10, 0x9b); msleep(1); /* B: 0xDB */
- rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); /* B: 0x10 */
-
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03); /* B: 0x00 */
- msleep(1);
- rtl818x_iowrite32(priv, (__le32 __iomem *)((void __iomem *)priv->map + 0x94), 0x15c00002);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-
- rtl8225_write(dev, 0x0c, 0x50);
- /* set OFDM initial gain */
- rtl8225_write_phy_ofdm(dev, 0x0d, rtl8225_gain[4 * 4]);
- rtl8225_write_phy_ofdm(dev, 0x23, rtl8225_gain[4 * 4 + 1]);
- rtl8225_write_phy_ofdm(dev, 0x1b, rtl8225_gain[4 * 4 + 2]);
- rtl8225_write_phy_ofdm(dev, 0x1d, rtl8225_gain[4 * 4 + 3]);
- /* set CCK threshold */
- rtl8225_write_phy_cck(dev, 0x41, rtl8225_threshold[0]);
-}
-
-static const u8 rtl8225z2_tx_power_cck_ch14[] = {
- 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
-};
-
-static const u8 rtl8225z2_tx_power_cck_B[] = {
- 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x04
-};
-
-static const u8 rtl8225z2_tx_power_cck_A[] = {
- 0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04
-};
-
-static const u8 rtl8225z2_tx_power_cck[] = {
- 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
-};
-
-static void rtl8225z2_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 cck_power, ofdm_power;
- const u8 *tmp;
- int i;
-
- cck_power = priv->channels[channel - 1].hw_value & 0xFF;
- ofdm_power = priv->channels[channel - 1].hw_value >> 8;
-
- if (channel == 14)
- tmp = rtl8225z2_tx_power_cck_ch14;
- else if (cck_power == 12)
- tmp = rtl8225z2_tx_power_cck_B;
- else if (cck_power == 13)
- tmp = rtl8225z2_tx_power_cck_A;
- else
- tmp = rtl8225z2_tx_power_cck;
-
- for (i = 0; i < 8; i++)
- rtl8225_write_phy_cck(dev, 0x44 + i, *tmp++);
-
- cck_power = min(cck_power, (u8)35);
- if (cck_power == 13 || cck_power == 14)
- cck_power = 12;
- if (cck_power >= 15)
- cck_power -= 2;
-
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK, cck_power);
- rtl818x_ioread8(priv, &priv->map->TX_GAIN_CCK);
- msleep(1);
-
- ofdm_power = min(ofdm_power, (u8)35);
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM, ofdm_power);
-
- rtl8225_write_phy_ofdm(dev, 2, 0x62);
- rtl8225_write_phy_ofdm(dev, 5, 0x00);
- rtl8225_write_phy_ofdm(dev, 6, 0x40);
- rtl8225_write_phy_ofdm(dev, 7, 0x00);
- rtl8225_write_phy_ofdm(dev, 8, 0x40);
-
- msleep(1);
-}
-
-static const u16 rtl8225z2_rxgain[] = {
- 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009,
- 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141,
- 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183,
- 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244,
- 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288,
- 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345,
- 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389,
- 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393,
- 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d,
- 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
- 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
- 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
-};
-
-static void rtl8225z2_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- int i;
-
- rtl8180_set_anaparam(priv, RTL8225_ANAPARAM_ON);
-
- /* host_pci_init */
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488);
- rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- msleep(200); /* FIXME: ehh?? */
- rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0xFF & ~(1 << 6));
-
- rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00088008);
-
- /* TODO: check if we need really to change BRSR to do RF config */
- rtl818x_ioread16(priv, &priv->map->BRSR);
- rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
- rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-
- rtl8225_write(dev, 0x0, 0x0B7); msleep(1);
- rtl8225_write(dev, 0x1, 0xEE0); msleep(1);
- rtl8225_write(dev, 0x2, 0x44D); msleep(1);
- rtl8225_write(dev, 0x3, 0x441); msleep(1);
- rtl8225_write(dev, 0x4, 0x8C3); msleep(1);
- rtl8225_write(dev, 0x5, 0xC72); msleep(1);
- rtl8225_write(dev, 0x6, 0x0E6); msleep(1);
- rtl8225_write(dev, 0x7, 0x82A); msleep(1);
- rtl8225_write(dev, 0x8, 0x03F); msleep(1);
- rtl8225_write(dev, 0x9, 0x335); msleep(1);
- rtl8225_write(dev, 0xa, 0x9D4); msleep(1);
- rtl8225_write(dev, 0xb, 0x7BB); msleep(1);
- rtl8225_write(dev, 0xc, 0x850); msleep(1);
- rtl8225_write(dev, 0xd, 0xCDF); msleep(1);
- rtl8225_write(dev, 0xe, 0x02B); msleep(1);
- rtl8225_write(dev, 0xf, 0x114); msleep(100);
-
- if (!(rtl8225_read(dev, 6) & (1 << 7))) {
- rtl8225_write(dev, 0x02, 0x0C4D);
- msleep(200);
- rtl8225_write(dev, 0x02, 0x044D);
- msleep(100);
- /* TODO: readd calibration failure message when the calibration
- check works */
- }
-
- rtl8225_write(dev, 0x0, 0x1B7);
- rtl8225_write(dev, 0x3, 0x002);
- rtl8225_write(dev, 0x5, 0x004);
-
- for (i = 0; i < ARRAY_SIZE(rtl8225z2_rxgain); i++) {
- rtl8225_write(dev, 0x1, i + 1);
- rtl8225_write(dev, 0x2, rtl8225z2_rxgain[i]);
- }
-
- rtl8225_write(dev, 0x0, 0x0B7); msleep(100);
- rtl8225_write(dev, 0x2, 0xC4D);
-
- msleep(200);
- rtl8225_write(dev, 0x2, 0x44D);
- msleep(100);
-
- rtl8225_write(dev, 0x00, 0x2BF);
- rtl8225_write(dev, 0xFF, 0xFFFF);
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-
- for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) {
- rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]);
- msleep(1);
- rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i);
- msleep(1);
- }
-
- msleep(1);
-
- rtl8225_write_phy_ofdm(dev, 0x00, 0x01); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x01, 0x02); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x02, 0x62); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x03, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x04, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x05, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x06, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x07, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x08, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0a, 0x09); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0d, 0x43);
- rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x10, 0x84); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x11, 0x06); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x12, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x13, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x14, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x15, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x16, 0x00); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x17, 0x40); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x19, 0x19); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1b, 0x11); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1d, 0xc5); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1e, 0xb3); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x21, 0x27); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x22, 0x16); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x23, 0x80); msleep(1); /* FIXME: not needed? */
- rtl8225_write_phy_ofdm(dev, 0x24, 0x46); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x25, 0x20); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1);
- rtl8225_write_phy_ofdm(dev, 0x27, 0x88); msleep(1);
-
- rtl8225_write_phy_cck(dev, 0x00, 0x98); msleep(1);
- rtl8225_write_phy_cck(dev, 0x03, 0x20); msleep(1);
- rtl8225_write_phy_cck(dev, 0x04, 0x7e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x05, 0x12); msleep(1);
- rtl8225_write_phy_cck(dev, 0x06, 0xfc); msleep(1);
- rtl8225_write_phy_cck(dev, 0x07, 0x78); msleep(1);
- rtl8225_write_phy_cck(dev, 0x08, 0x2e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x10, 0x93); msleep(1);
- rtl8225_write_phy_cck(dev, 0x11, 0x88); msleep(1);
- rtl8225_write_phy_cck(dev, 0x12, 0x47); msleep(1);
- rtl8225_write_phy_cck(dev, 0x13, 0xd0);
- rtl8225_write_phy_cck(dev, 0x19, 0x00);
- rtl8225_write_phy_cck(dev, 0x1a, 0xa0);
- rtl8225_write_phy_cck(dev, 0x1b, 0x08);
- rtl8225_write_phy_cck(dev, 0x40, 0x86);
- rtl8225_write_phy_cck(dev, 0x41, 0x8a); msleep(1);
- rtl8225_write_phy_cck(dev, 0x42, 0x15); msleep(1);
- rtl8225_write_phy_cck(dev, 0x43, 0x18); msleep(1);
- rtl8225_write_phy_cck(dev, 0x44, 0x36); msleep(1);
- rtl8225_write_phy_cck(dev, 0x45, 0x35); msleep(1);
- rtl8225_write_phy_cck(dev, 0x46, 0x2e); msleep(1);
- rtl8225_write_phy_cck(dev, 0x47, 0x25); msleep(1);
- rtl8225_write_phy_cck(dev, 0x48, 0x1c); msleep(1);
- rtl8225_write_phy_cck(dev, 0x49, 0x12); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4a, 0x09); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4b, 0x04); msleep(1);
- rtl8225_write_phy_cck(dev, 0x4c, 0x05); msleep(1);
-
- rtl818x_iowrite8(priv, (u8 __iomem *)((void __iomem *)priv->map + 0x5B), 0x0D); msleep(1);
-
- rtl8225z2_rf_set_tx_power(dev, 1);
-
- /* RX antenna default to A */
- rtl8225_write_phy_cck(dev, 0x10, 0x9b); msleep(1); /* B: 0xDB */
- rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); /* B: 0x10 */
-
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03); /* B: 0x00 */
- msleep(1);
- rtl818x_iowrite32(priv, (__le32 __iomem *)((void __iomem *)priv->map + 0x94), 0x15c00002);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
-}
-
-static void rtl8225_rf_stop(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 reg;
-
- rtl8225_write(dev, 0x4, 0x1f); msleep(1);
-
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
- reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_OFF);
- rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_OFF);
- rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
- rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
-}
-
-static void rtl8225_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf)
-{
- struct rtl8180_priv *priv = dev->priv;
- int chan =
- ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
-
- if (priv->rf->init == rtl8225_rf_init)
- rtl8225_rf_set_tx_power(dev, chan);
- else
- rtl8225z2_rf_set_tx_power(dev, chan);
-
- rtl8225_write(dev, 0x7, rtl8225_chan[chan - 1]);
- msleep(10);
-}
-
-static const struct rtl818x_rf_ops rtl8225_ops = {
- .name = "rtl8225",
- .init = rtl8225_rf_init,
- .stop = rtl8225_rf_stop,
- .set_chan = rtl8225_rf_set_channel,
-};
-
-static const struct rtl818x_rf_ops rtl8225z2_ops = {
- .name = "rtl8225z2",
- .init = rtl8225z2_rf_init,
- .stop = rtl8225_rf_stop,
- .set_chan = rtl8225_rf_set_channel,
-};
-
-const struct rtl818x_rf_ops * rtl8180_detect_rf(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u16 reg8, reg9;
-
- rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
- rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488);
- rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
- rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
- msleep(100);
-
- rtl8225_write(dev, 0, 0x1B7);
-
- reg8 = rtl8225_read(dev, 8);
- reg9 = rtl8225_read(dev, 9);
-
- rtl8225_write(dev, 0, 0x0B7);
-
- if (reg8 != 0x588 || reg9 != 0x700)
- return &rtl8225_ops;
-
- return &rtl8225z2_ops;
-}
diff --git a/drivers/net/wireless/rtl818x/rtl8180/rtl8225.h b/drivers/net/wireless/rtl818x/rtl8180/rtl8225.h
deleted file mode 100644
index 310013a2d..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/rtl8225.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef RTL8180_RTL8225_H
-#define RTL8180_RTL8225_H
-
-#define RTL8225_ANAPARAM_ON 0xa0000b59
-#define RTL8225_ANAPARAM2_ON 0x860dec11
-#define RTL8225_ANAPARAM_OFF 0xa00beb59
-#define RTL8225_ANAPARAM2_OFF 0x840dec11
-
-const struct rtl818x_rf_ops * rtl8180_detect_rf(struct ieee80211_hw *);
-
-static inline void rtl8225_write_phy_ofdm(struct ieee80211_hw *dev,
- u8 addr, u8 data)
-{
- rtl8180_write_phy(dev, addr, data);
-}
-
-static inline void rtl8225_write_phy_cck(struct ieee80211_hw *dev,
- u8 addr, u8 data)
-{
- rtl8180_write_phy(dev, addr, data | 0x10000);
-}
-
-#endif /* RTL8180_RTL8225_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.c b/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.c
deleted file mode 100644
index fde89866f..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.c
+++ /dev/null
@@ -1,475 +0,0 @@
-
-/* Radio tuning for RTL8225 on RTL8187SE
- *
- * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
- * Copyright 2014 Andrea Merello <andrea.merello@gmail.com>
- *
- * Based on the r8180 and Realtek r8187se drivers, which are:
- * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
- *
- * Also based on the rtl8187 driver, which is:
- * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "rtl8225se.h"
-
-#define PFX "rtl8225 (se) "
-
-static const u32 RF_GAIN_TABLE[] = {
- 0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
- 0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
- 0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
- 0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
- 0x0183, 0x0163, 0x0143, 0x0123, 0x0103
-};
-
-static const u8 cck_ofdm_gain_settings[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
- 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
- 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
- 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
- 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
- 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
-};
-
-static const u8 rtl8225se_tx_gain_cck_ofdm[] = {
- 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
-};
-
-static const u8 rtl8225se_tx_power_cck[] = {
- 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
- 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
- 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
- 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
- 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
- 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
-};
-
-static const u8 rtl8225se_tx_power_cck_ch14[] = {
- 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
- 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
- 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
- 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
- 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
- 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
-};
-
-static const u8 rtl8225se_tx_power_ofdm[] = {
- 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
-};
-
-static const u32 rtl8225se_chan[] = {
- 0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380,
- 0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A,
-};
-
-static const u8 rtl8225sez2_tx_power_cck_ch14[] = {
- 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
-};
-
-static const u8 rtl8225sez2_tx_power_cck_B[] = {
- 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x04
-};
-
-static const u8 rtl8225sez2_tx_power_cck_A[] = {
- 0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04
-};
-
-static const u8 rtl8225sez2_tx_power_cck[] = {
- 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
-};
-
-static const u8 ZEBRA_AGC[] = {
- 0x7E, 0x7E, 0x7E, 0x7E, 0x7D, 0x7C, 0x7B, 0x7A,
- 0x79, 0x78, 0x77, 0x76, 0x75, 0x74, 0x73, 0x72,
- 0x71, 0x70, 0x6F, 0x6E, 0x6D, 0x6C, 0x6B, 0x6A,
- 0x69, 0x68, 0x67, 0x66, 0x65, 0x64, 0x63, 0x62,
- 0x48, 0x47, 0x46, 0x45, 0x44, 0x29, 0x28, 0x27,
- 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x08, 0x07,
- 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
- 0x0f, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x15, 0x16,
- 0x17, 0x17, 0x18, 0x18, 0x19, 0x1a, 0x1a, 0x1b,
- 0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e,
- 0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21,
- 0x21, 0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x24,
- 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
- 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F
-};
-
-static const u8 OFDM_CONFIG[] = {
- 0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
- 0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
- 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xA8, 0x26,
- 0x32, 0x33, 0x06, 0xA5, 0x6F, 0x55, 0xC8, 0xBB,
- 0x0A, 0xE1, 0x2C, 0x4A, 0x86, 0x83, 0x34, 0x00,
- 0x4F, 0x24, 0x6F, 0xC2, 0x03, 0x40, 0x80, 0x00,
- 0xC0, 0xC1, 0x58, 0xF1, 0x00, 0xC4, 0x90, 0x3e,
- 0xD8, 0x3C, 0x7B, 0x10, 0x10
-};
-
-static void rtl8187se_three_wire_io(struct ieee80211_hw *dev, u8 *data,
- u8 len, bool write)
-{
- struct rtl8180_priv *priv = dev->priv;
- int i;
- u8 tmp;
-
- do {
- for (i = 0; i < 5; i++) {
- tmp = rtl818x_ioread8(priv, SW_3W_CMD1);
- if (!(tmp & 0x3))
- break;
- udelay(10);
- }
- if (i == 5)
- wiphy_err(dev->wiphy, PFX
- "CmdReg: 0x%x RE/WE bits aren't clear\n", tmp);
-
- tmp = rtl818x_ioread8(priv, &priv->map->rf_sw_config) | 0x02;
- rtl818x_iowrite8(priv, &priv->map->rf_sw_config, tmp);
-
- tmp = rtl818x_ioread8(priv, REG_ADDR1(0x84)) & 0xF7;
- rtl818x_iowrite8(priv, REG_ADDR1(0x84), tmp);
- if (write) {
- if (len == 16) {
- rtl818x_iowrite16(priv, SW_3W_DB0,
- *(u16 *)data);
- } else if (len == 64) {
- rtl818x_iowrite32(priv, SW_3W_DB0_4,
- *((u32 *)data));
- rtl818x_iowrite32(priv, SW_3W_DB1_4,
- *((u32 *)(data + 4)));
- } else
- wiphy_err(dev->wiphy, PFX
- "Unimplemented length\n");
- } else {
- rtl818x_iowrite16(priv, SW_3W_DB0, *(u16 *)data);
- }
- if (write)
- tmp = 2;
- else
- tmp = 1;
- rtl818x_iowrite8(priv, SW_3W_CMD1, tmp);
- for (i = 0; i < 5; i++) {
- tmp = rtl818x_ioread8(priv, SW_3W_CMD1);
- if (!(tmp & 0x3))
- break;
- udelay(10);
- }
- rtl818x_iowrite8(priv, SW_3W_CMD1, 0);
- if (!write) {
- *((u16 *)data) = rtl818x_ioread16(priv, SI_DATA_REG);
- *((u16 *)data) &= 0x0FFF;
- }
- } while (0);
-}
-
-static u32 rtl8187se_rf_readreg(struct ieee80211_hw *dev, u8 addr)
-{
- u32 dataread = addr & 0x0F;
- rtl8187se_three_wire_io(dev, (u8 *)&dataread, 16, 0);
- return dataread;
-}
-
-static void rtl8187se_rf_writereg(struct ieee80211_hw *dev, u8 addr, u32 data)
-{
- u32 outdata = (data << 4) | (u32)(addr & 0x0F);
- rtl8187se_three_wire_io(dev, (u8 *)&outdata, 16, 1);
-}
-
-
-static void rtl8225se_write_zebra_agc(struct ieee80211_hw *dev)
-{
- int i;
-
- for (i = 0; i < 128; i++) {
- rtl8225se_write_phy_ofdm(dev, 0xF, ZEBRA_AGC[i]);
- rtl8225se_write_phy_ofdm(dev, 0xE, i+0x80);
- rtl8225se_write_phy_ofdm(dev, 0xE, 0);
- }
-}
-
-static void rtl8187se_write_ofdm_config(struct ieee80211_hw *dev)
-{
- /* write OFDM_CONFIG table */
- int i;
-
- for (i = 0; i < 60; i++)
- rtl8225se_write_phy_ofdm(dev, i, OFDM_CONFIG[i]);
-
-}
-
-static void rtl8225sez2_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 cck_power, ofdm_power;
-
- cck_power = priv->channels[channel - 1].hw_value & 0xFF;
- if (cck_power > 35)
- cck_power = 35;
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK,
- cck_ofdm_gain_settings[cck_power]);
-
- usleep_range(1000, 5000);
- ofdm_power = priv->channels[channel - 1].hw_value >> 8;
- if (ofdm_power > 35)
- ofdm_power = 35;
-
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM,
- cck_ofdm_gain_settings[ofdm_power]);
- if (ofdm_power < 12) {
- rtl8225se_write_phy_ofdm(dev, 7, 0x5C);
- rtl8225se_write_phy_ofdm(dev, 9, 0x5C);
- }
- if (ofdm_power < 18) {
- rtl8225se_write_phy_ofdm(dev, 7, 0x54);
- rtl8225se_write_phy_ofdm(dev, 9, 0x54);
- } else {
- rtl8225se_write_phy_ofdm(dev, 7, 0x50);
- rtl8225se_write_phy_ofdm(dev, 9, 0x50);
- }
-
- usleep_range(1000, 5000);
-}
-
-static void rtl8187se_write_rf_gain(struct ieee80211_hw *dev)
-{
- int i;
-
- for (i = 0; i <= 36; i++) {
- rtl8187se_rf_writereg(dev, 0x01, i); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x02, RF_GAIN_TABLE[i]); mdelay(1);
- }
-}
-
-static void rtl8187se_write_initial_gain(struct ieee80211_hw *dev,
- int init_gain)
-{
- switch (init_gain) {
- default:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1);
- break;
- case 2:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1);
- break;
- case 3:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
- break;
- case 4:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
- break;
- case 5:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
- break;
- case 6:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
- break;
- case 7:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0xA6); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
- break;
- case 8:
- rtl8225se_write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x24, 0xB6); mdelay(1);
- rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
- break;
- }
-}
-
-void rtl8225se_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 rf23, rf24;
- u8 d_cut = 0;
- u8 tmp;
-
- /* Page 1 */
- rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1);
- rf23 = rtl8187se_rf_readreg(dev, 0x08); mdelay(1);
- rf24 = rtl8187se_rf_readreg(dev, 0x09); mdelay(1);
- if (rf23 == 0x0818 && rf24 == 0x070C)
- d_cut = 1;
-
- wiphy_info(dev->wiphy, "RTL8225-SE version %s\n",
- d_cut ? "D" : "not-D");
-
- /* Page 0: reg 0 - 15 */
- rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x01, 0x06E0); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x03, 0x07F1); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x04, 0x0975); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x05, 0x0C72); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x06, 0x0AE6); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x07, 0x00CA); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x08, 0x0E1C); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x09, 0x02F0); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0A, 0x09D0); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0B, 0x01BA); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0C, 0x0640); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0E, 0x0020); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0F, 0x0990); mdelay(1);
- /* page 1: reg 16-30 */
- rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x03, 0x0806); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x04, 0x03A7); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x05, 0x059B); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x06, 0x0081); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x07, 0x01A0); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0B, 0x0418); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0C, 0x0FBE); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(1);
- if (d_cut)
- rtl8187se_rf_writereg(dev, 0x0E, 0x0807);
- else
- rtl8187se_rf_writereg(dev, 0x0E, 0x0806);
- mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x00, 0x01D7); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x03, 0x0E00); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x04, 0x0E50); mdelay(1);
-
- rtl8187se_write_rf_gain(dev);
-
- rtl8187se_rf_writereg(dev, 0x05, 0x0203); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x06, 0x0200); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x00, 0x0037); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x04, 0x0160); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x07, 0x0080); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x02, 0x088D); mdelay(221);
- rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11);
- rtl8187se_rf_writereg(dev, 0x07, 0x0000); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x07, 0x0180); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x07, 0x0220); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x07, 0x03E0); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x06, 0x00C1); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1);
- if (priv->xtal_cal) {
- tmp = (priv->xtal_in << 4) | (priv->xtal_out << 1) |
- (1 << 11) | (1 << 9);
- rtl8187se_rf_writereg(dev, 0x0F, tmp);
- wiphy_info(dev->wiphy, "Xtal cal\n");
- mdelay(1);
- } else {
- wiphy_info(dev->wiphy, "NO Xtal cal\n");
- rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC);
- mdelay(1);
- }
- /* page 0 */
- rtl8187se_rf_writereg(dev, 0x00, 0x00BF); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x04, 0x0975); mdelay(31);
- rtl8187se_rf_writereg(dev, 0x00, 0x0197); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x05, 0x05AB); mdelay(1);
-
- rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x01, 0x0000); mdelay(1);
- rtl8187se_rf_writereg(dev, 0x02, 0x0000); mdelay(1);
- /* power save parameters */
- /* TODO: move to dev.c */
- rtl818x_iowrite8(priv, REG_ADDR1(0x024E),
- rtl818x_ioread8(priv, REG_ADDR1(0x24E)) & 0x9F);
- rtl8225se_write_phy_cck(dev, 0x00, 0xC8);
- rtl8225se_write_phy_cck(dev, 0x06, 0x1C);
- rtl8225se_write_phy_cck(dev, 0x10, 0x78);
- rtl8225se_write_phy_cck(dev, 0x2E, 0xD0);
- rtl8225se_write_phy_cck(dev, 0x2F, 0x06);
- rtl8225se_write_phy_cck(dev, 0x01, 0x46);
-
- /* power control */
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK, 0x10);
- rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM, 0x1B);
-
- rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
- rtl8225se_write_phy_ofdm(dev, 0x00, 0x12);
-
- rtl8225se_write_zebra_agc(dev);
-
- rtl8225se_write_phy_ofdm(dev, 0x10, 0x00);
-
- rtl8187se_write_ofdm_config(dev);
-
- /* turn on RF */
- rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500);
- rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500);
- /* turn on RF again */
- rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500);
- rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500);
- /* turn on BB */
- rtl8225se_write_phy_ofdm(dev, 0x10, 0x40);
- rtl8225se_write_phy_ofdm(dev, 0x12, 0x40);
-
- rtl8187se_write_initial_gain(dev, 4);
-}
-
-void rtl8225se_rf_stop(struct ieee80211_hw *dev)
-{
- /* checked for 8187se */
- struct rtl8180_priv *priv = dev->priv;
-
- /* turn off BB RXIQ matrix to cut off rx signal */
- rtl8225se_write_phy_ofdm(dev, 0x10, 0x00);
- rtl8225se_write_phy_ofdm(dev, 0x12, 0x00);
- /* turn off RF */
- rtl8187se_rf_writereg(dev, 0x04, 0x0000);
- rtl8187se_rf_writereg(dev, 0x00, 0x0000);
-
- usleep_range(1000, 5000);
- /* turn off A/D and D/A */
- rtl8180_set_anaparam(priv, RTL8225SE_ANAPARAM_OFF);
- rtl8180_set_anaparam2(priv, RTL8225SE_ANAPARAM2_OFF);
-}
-
-void rtl8225se_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf)
-{
- int chan =
- ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
-
- rtl8225sez2_rf_set_tx_power(dev, chan);
- rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]);
- if ((rtl8187se_rf_readreg(dev, 0x7) & 0x0F80) !=
- rtl8225se_chan[chan - 1])
- rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]);
- usleep_range(10000, 20000);
-}
-
-static const struct rtl818x_rf_ops rtl8225se_ops = {
- .name = "rtl8225-se",
- .init = rtl8225se_rf_init,
- .stop = rtl8225se_rf_stop,
- .set_chan = rtl8225se_rf_set_channel,
-};
-
-const struct rtl818x_rf_ops *rtl8187se_detect_rf(struct ieee80211_hw *dev)
-{
- return &rtl8225se_ops;
-}
diff --git a/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.h b/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.h
deleted file mode 100644
index 229400264..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/rtl8225se.h
+++ /dev/null
@@ -1,61 +0,0 @@
-
-/* Definitions for RTL8187SE hardware
- *
- * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
- * Copyright 2014 Andrea Merello <andrea.merello@gmail.com>
- *
- * Based on the r8180 and Realtek r8187se drivers, which are:
- * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
- *
- * Also based on the rtl8187 driver, which is:
- * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef RTL8187SE_RTL8225_H
-#define RTL8187SE_RTL8225_H
-
-#define RTL8225SE_ANAPARAM_ON 0xb0054d00
-#define RTL8225SE_ANAPARAM2_ON 0x000004c6
-
-/* all off except PLL */
-#define RTL8225SE_ANAPARAM_OFF 0xb0054dec
-/* all on including PLL */
-#define RTL8225SE_ANAPARAM_OFF2 0xb0054dfc
-
-#define RTL8225SE_ANAPARAM2_OFF 0x00ff04c6
-
-#define RTL8225SE_ANAPARAM3 0x10
-
-enum rtl8187se_power_state {
- RTL8187SE_POWER_ON,
- RTL8187SE_POWER_OFF,
- RTL8187SE_POWER_SLEEP
-};
-
-static inline void rtl8225se_write_phy_ofdm(struct ieee80211_hw *dev,
- u8 addr, u8 data)
-{
- rtl8180_write_phy(dev, addr, data);
-}
-
-static inline void rtl8225se_write_phy_cck(struct ieee80211_hw *dev,
- u8 addr, u8 data)
-{
- rtl8180_write_phy(dev, addr, data | 0x10000);
-}
-
-
-const struct rtl818x_rf_ops *rtl8187se_detect_rf(struct ieee80211_hw *);
-void rtl8225se_rf_stop(struct ieee80211_hw *dev);
-void rtl8225se_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf);
-void rtl8225se_rf_conf_erp(struct ieee80211_hw *dev,
- struct ieee80211_bss_conf *info);
-void rtl8225se_rf_init(struct ieee80211_hw *dev);
-
-#endif /* RTL8187SE_RTL8225_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8180/sa2400.c b/drivers/net/wireless/rtl818x/rtl8180/sa2400.c
deleted file mode 100644
index 959b04982..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/sa2400.c
+++ /dev/null
@@ -1,228 +0,0 @@
-
-/*
- * Radio tuning for Philips SA2400 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <net/mac80211.h>
-
-#include "rtl8180.h"
-#include "sa2400.h"
-
-static const u32 sa2400_chan[] = {
- 0x00096c, /* ch1 */
- 0x080970,
- 0x100974,
- 0x180978,
- 0x000980,
- 0x080984,
- 0x100988,
- 0x18098c,
- 0x000994,
- 0x080998,
- 0x10099c,
- 0x1809a0,
- 0x0009a8,
- 0x0009b4, /* ch 14 */
-};
-
-static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 phy_config;
-
- /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
- phy_config = 0xb0000000;
-
- phy_config |= ((u32)(addr & 0xf)) << 24;
- phy_config |= data & 0xffffff;
-
- rtl818x_iowrite32(priv,
- (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
-
- msleep(3);
-}
-
-static void sa2400_write_phy_antenna(struct ieee80211_hw *dev, short chan)
-{
- struct rtl8180_priv *priv = dev->priv;
- u8 ant = SA2400_ANTENNA;
-
- if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
- ant |= BB_ANTENNA_B;
-
- if (chan == 14)
- ant |= BB_ANTATTEN_CHAN14;
-
- rtl8180_write_phy(dev, 0x10, ant);
-
-}
-
-static u8 sa2400_rf_rssi_map[] = {
- 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
- 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
- 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
- 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
- 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
- 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
- 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
- 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
- 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
- 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02,
-};
-
-static u8 sa2400_rf_calc_rssi(u8 agc, u8 sq)
-{
- if (sq == 0x80)
- return 1;
-
- if (sq > 78)
- return 32;
-
- /* TODO: recalc sa2400_rf_rssi_map to avoid mult / div */
- return 65 * sa2400_rf_rssi_map[sq] / 100;
-}
-
-static void sa2400_rf_set_channel(struct ieee80211_hw *dev,
- struct ieee80211_conf *conf)
-{
- struct rtl8180_priv *priv = dev->priv;
- int channel =
- ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
- u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
- u32 chan = sa2400_chan[channel - 1];
-
- write_sa2400(dev, 7, txpw);
-
- sa2400_write_phy_antenna(dev, channel);
-
- write_sa2400(dev, 0, chan);
- write_sa2400(dev, 1, 0xbb50);
- write_sa2400(dev, 2, 0x80);
- write_sa2400(dev, 3, 0);
-}
-
-static void sa2400_rf_stop(struct ieee80211_hw *dev)
-{
- write_sa2400(dev, 4, 0);
-}
-
-static void sa2400_rf_init(struct ieee80211_hw *dev)
-{
- struct rtl8180_priv *priv = dev->priv;
- u32 anaparam, txconf;
- u8 firdac;
- int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
-
- anaparam = priv->anaparam;
- anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
- anaparam &= ~ANAPARAM_PWR1_MASK;
- anaparam &= ~ANAPARAM_PWR0_MASK;
-
- if (analogphy) {
- anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
- firdac = 0;
- } else {
- anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
- anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
- firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
- }
-
- rtl8180_set_anaparam(priv, anaparam);
-
- write_sa2400(dev, 0, sa2400_chan[0]);
- write_sa2400(dev, 1, 0xbb50);
- write_sa2400(dev, 2, 0x80);
- write_sa2400(dev, 3, 0);
- write_sa2400(dev, 4, 0x19340 | firdac);
- write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
- write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
-
- if (!analogphy)
- write_sa2400(dev, 4, 0x1938c); /*???*/
-
- write_sa2400(dev, 4, 0x19340 | firdac);
-
- write_sa2400(dev, 0, sa2400_chan[0]);
- write_sa2400(dev, 1, 0xbb50);
- write_sa2400(dev, 2, 0x80);
- write_sa2400(dev, 3, 0);
- write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
-
- /* new from rtl8180 embedded driver (rtl8181 project) */
- write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
- write_sa2400(dev, 8, 0); /* VCO */
-
- if (analogphy) {
- rtl8180_set_anaparam(priv, anaparam |
- (1 << ANAPARAM_TXDACOFF_SHIFT));
-
- txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
- rtl818x_iowrite32(priv, &priv->map->TX_CONF,
- txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
-
- write_sa2400(dev, 4, 0x19341); /* calibrates DC */
-
- /* a 5us sleep is required here,
- * we rely on the 3ms delay introduced in write_sa2400 */
- write_sa2400(dev, 4, 0x19345);
-
- /* a 20us sleep is required here,
- * we rely on the 3ms delay introduced in write_sa2400 */
-
- rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
-
- rtl8180_set_anaparam(priv, anaparam);
- }
- /* end new code */
-
- write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
-
- /* baseband configuration */
- rtl8180_write_phy(dev, 0, 0x98);
- rtl8180_write_phy(dev, 3, 0x38);
- rtl8180_write_phy(dev, 4, 0xe0);
- rtl8180_write_phy(dev, 5, 0x90);
- rtl8180_write_phy(dev, 6, 0x1a);
- rtl8180_write_phy(dev, 7, 0x64);
-
- sa2400_write_phy_antenna(dev, 1);
-
- rtl8180_write_phy(dev, 0x11, 0x80);
-
- if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
- RTL818X_CONFIG2_ANTENNA_DIV)
- rtl8180_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
- else
- rtl8180_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
-
- rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
-
- rtl8180_write_phy(dev, 0x19, 0x0);
- rtl8180_write_phy(dev, 0x1a, 0xa0);
-}
-
-const struct rtl818x_rf_ops sa2400_rf_ops = {
- .name = "Philips",
- .init = sa2400_rf_init,
- .stop = sa2400_rf_stop,
- .set_chan = sa2400_rf_set_channel,
- .calc_rssi = sa2400_rf_calc_rssi,
-};
diff --git a/drivers/net/wireless/rtl818x/rtl8180/sa2400.h b/drivers/net/wireless/rtl818x/rtl8180/sa2400.h
deleted file mode 100644
index fb0093f35..000000000
--- a/drivers/net/wireless/rtl818x/rtl8180/sa2400.h
+++ /dev/null
@@ -1,36 +0,0 @@
-#ifndef RTL8180_SA2400_H
-#define RTL8180_SA2400_H
-
-/*
- * Radio tuning for Philips SA2400 on RTL8180
- *
- * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
- *
- * Code from the BSD driver and the rtl8181 project have been
- * very useful to understand certain things
- *
- * I want to thanks the Authors of such projects and the Ndiswrapper
- * project Authors.
- *
- * A special Big Thanks also is for all people who donated me cards,
- * making possible the creation of the original rtl8180 driver
- * from which this code is derived!
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define SA2400_ANTENNA 0x91
-#define SA2400_DIG_ANAPARAM_PWR1_ON 0x8
-#define SA2400_ANA_ANAPARAM_PWR1_ON 0x28
-#define SA2400_ANAPARAM_PWR0_ON 0x3
-
-/* RX sensitivity in dbm */
-#define SA2400_MAX_SENS 85
-
-#define SA2400_REG4_FIRDAC_SHIFT 7
-
-extern const struct rtl818x_rf_ops sa2400_rf_ops;
-
-#endif /* RTL8180_SA2400_H */