diff options
| author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-06-10 05:30:17 -0300 |
|---|---|---|
| committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-06-10 05:30:17 -0300 |
| commit | d635711daa98be86d4c7fd01499c34f566b54ccb (patch) | |
| tree | aa5cc3760a27c3d57146498cb82fa549547de06c /drivers/pwm | |
| parent | c91265cd0efb83778f015b4d4b1129bd2cfd075e (diff) | |
Linux-libre 4.6.2-gnu
Diffstat (limited to 'drivers/pwm')
| -rw-r--r-- | drivers/pwm/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/pwm/pwm-fsl-ftm.c | 2 | ||||
| -rw-r--r-- | drivers/pwm/pwm-img.c | 5 | ||||
| -rw-r--r-- | drivers/pwm/pwm-lpc18xx-sct.c | 5 | ||||
| -rw-r--r-- | drivers/pwm/pwm-omap-dmtimer.c | 9 |
5 files changed, 20 insertions, 3 deletions
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 8cf0dae78..c182efc62 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -316,7 +316,7 @@ config PWM_RCAR config PWM_RENESAS_TPU tristate "Renesas TPU PWM support" - depends on ARCH_SHMOBILE || COMPILE_TEST + depends on ARCH_RENESAS || COMPILE_TEST depends on HAS_IOMEM help This driver exposes the Timer Pulse Unit (TPU) PWM controller found diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index 7225ac6b3..fad968eb7 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -392,7 +392,7 @@ static const struct regmap_config fsl_pwm_regmap_config = { .max_register = FTM_PWMLOAD, .volatile_reg = fsl_pwm_volatile_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static int fsl_pwm_probe(struct platform_device *pdev) diff --git a/drivers/pwm/pwm-img.c b/drivers/pwm/pwm-img.c index 8a029f9bc..2fb30deee 100644 --- a/drivers/pwm/pwm-img.c +++ b/drivers/pwm/pwm-img.c @@ -237,6 +237,11 @@ static int img_pwm_probe(struct platform_device *pdev) } clk_rate = clk_get_rate(pwm->pwm_clk); + if (!clk_rate) { + dev_err(&pdev->dev, "pwm clock has no frequency\n"); + ret = -EINVAL; + goto disable_pwmclk; + } /* The maximum input clock divider is 512 */ val = (u64)NSEC_PER_SEC * 512 * pwm->data->max_timebase; diff --git a/drivers/pwm/pwm-lpc18xx-sct.c b/drivers/pwm/pwm-lpc18xx-sct.c index 916308510..9861fed4e 100644 --- a/drivers/pwm/pwm-lpc18xx-sct.c +++ b/drivers/pwm/pwm-lpc18xx-sct.c @@ -360,6 +360,11 @@ static int lpc18xx_pwm_probe(struct platform_device *pdev) } lpc18xx_pwm->clk_rate = clk_get_rate(lpc18xx_pwm->pwm_clk); + if (!lpc18xx_pwm->clk_rate) { + dev_err(&pdev->dev, "pwm clock has no frequency\n"); + ret = -EINVAL; + goto disable_pwmclk; + } mutex_init(&lpc18xx_pwm->res_lock); mutex_init(&lpc18xx_pwm->period_lock); diff --git a/drivers/pwm/pwm-omap-dmtimer.c b/drivers/pwm/pwm-omap-dmtimer.c index e0679eb39..b7e6ecba7 100644 --- a/drivers/pwm/pwm-omap-dmtimer.c +++ b/drivers/pwm/pwm-omap-dmtimer.c @@ -102,7 +102,8 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip, unsigned long clk_rate; bool timer_active; - dev_dbg(chip->dev, "duty cycle: %d, period %d\n", duty_ns, period_ns); + dev_dbg(chip->dev, "requested duty cycle: %d ns, period: %d ns\n", + duty_ns, period_ns); mutex_lock(&omap->mutex); if (duty_ns == pwm_get_duty_cycle(pwm) && @@ -166,6 +167,12 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip, duty_cycles = period_cycles - 1; } + dev_dbg(chip->dev, "effective duty cycle: %lld ns, period: %lld ns\n", + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * duty_cycles, + clk_rate), + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * period_cycles, + clk_rate)); + load_value = (DM_TIMER_MAX - period_cycles) + 1; match_value = load_value + duty_cycles - 1; |