diff options
| author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-09-11 04:34:46 -0300 |
|---|---|---|
| committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-09-11 04:34:46 -0300 |
| commit | 863981e96738983919de841ec669e157e6bdaeb0 (patch) | |
| tree | d6d89a12e7eb8017837c057935a2271290907f76 /drivers/staging/comedi/drivers/amcc_s5933.h | |
| parent | 8dec7c70575785729a6a9e6719a955e9c545bcab (diff) | |
Linux-libre 4.7.1-gnupck-4.7.1-gnu
Diffstat (limited to 'drivers/staging/comedi/drivers/amcc_s5933.h')
| -rw-r--r-- | drivers/staging/comedi/drivers/amcc_s5933.h | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/drivers/staging/comedi/drivers/amcc_s5933.h b/drivers/staging/comedi/drivers/amcc_s5933.h index d4b8c0195..f03e4c8c2 100644 --- a/drivers/staging/comedi/drivers/amcc_s5933.h +++ b/drivers/staging/comedi/drivers/amcc_s5933.h @@ -1,16 +1,14 @@ /* - comedi/drivers/amcc_s5933.h - - Stuff for AMCC S5933 PCI Controller - - Author: Michal Dobes <dobes@tesnet.cz> - - Inspirated from general-purpose AMCC S5933 PCI Matchmaker driver - made by Andrea Cisternino <acister@pcape1.pi.infn.it> - and as result of espionage from MITE code made by David A. Schleef. - Thanks to AMCC for their on-line documentation and bus master DMA - example. -*/ + * Stuff for AMCC S5933 PCI Controller + * + * Author: Michal Dobes <dobes@tesnet.cz> + * + * Inspirated from general-purpose AMCC S5933 PCI Matchmaker driver + * made by Andrea Cisternino <acister@pcape1.pi.infn.it> + * and as result of espionage from MITE code made by David A. Schleef. + * Thanks to AMCC for their on-line documentation and bus master DMA + * example. + */ #ifndef _AMCC_S5933_H_ #define _AMCC_S5933_H_ @@ -58,7 +56,7 @@ #define INTCSR_INTR_ASSERTED 0x800000 /****************************************************************************/ -/* AMCC - PCI non-volatile ram command register (byte 3 of master control/status register) */ +/* AMCC - PCI non-volatile ram command register (byte 3 of AMCC_OP_REG_MCSR) */ /****************************************************************************/ #define MCSR_NV_LOAD_LOW_ADDR 0x0 #define MCSR_NV_LOAD_HIGH_ADDR 0x20 |