diff options
| author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-01-20 14:01:31 -0300 |
|---|---|---|
| committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-01-20 14:01:31 -0300 |
| commit | b4b7ff4b08e691656c9d77c758fc355833128ac0 (patch) | |
| tree | 82fcb00e6b918026dc9f2d1f05ed8eee83874cc0 /drivers/staging/rtl8188eu | |
| parent | 35acfa0fc609f2a2cd95cef4a6a9c3a5c38f1778 (diff) | |
Linux-libre 4.4-gnupck-4.4-gnu
Diffstat (limited to 'drivers/staging/rtl8188eu')
53 files changed, 957 insertions, 762 deletions
diff --git a/drivers/staging/rtl8188eu/Kconfig b/drivers/staging/rtl8188eu/Kconfig index 5a38b4149..94f38793a 100644 --- a/drivers/staging/rtl8188eu/Kconfig +++ b/drivers/staging/rtl8188eu/Kconfig @@ -1,6 +1,6 @@ config R8188EU tristate "Realtek RTL8188EU Wireless LAN NIC driver" - depends on WLAN && USB + depends on WLAN && USB && CFG80211 select WIRELESS_EXT select WEXT_PRIV ---help--- diff --git a/drivers/staging/rtl8188eu/Makefile b/drivers/staging/rtl8188eu/Makefile index 31ac15961..ed723585b 100644 --- a/drivers/staging/rtl8188eu/Makefile +++ b/drivers/staging/rtl8188eu/Makefile @@ -42,6 +42,7 @@ r8188eu-y := \ hal/usb_halinit.o \ os_dep/ioctl_linux.o \ os_dep/mlme_linux.o \ + os_dep/mon.o \ os_dep/os_intfs.o \ os_dep/osdep_service.o \ os_dep/recv_linux.o \ diff --git a/drivers/staging/rtl8188eu/core/rtw_ap.c b/drivers/staging/rtl8188eu/core/rtw_ap.c index 5c45f8a8c..3cdb40fea 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ap.c +++ b/drivers/staging/rtl8188eu/core/rtw_ap.c @@ -1795,7 +1795,7 @@ int rtw_ap_inform_ch_switch(struct adapter *padapter, u8 new_ch, u8 ch_offset) plist = plist->next; issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); - psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); + psta->expire_to = min_t(unsigned int, pstapriv->expire_to * 2, 5); } spin_unlock_bh(&pstapriv->asoc_list_lock); diff --git a/drivers/staging/rtl8188eu/core/rtw_cmd.c b/drivers/staging/rtl8188eu/core/rtw_cmd.c index 89b5e48ed..9b7026e7d 100644 --- a/drivers/staging/rtl8188eu/core/rtw_cmd.c +++ b/drivers/staging/rtl8188eu/core/rtw_cmd.c @@ -125,7 +125,7 @@ u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) cmd_obj->padapter = padapter; res = rtw_cmd_filter(pcmdpriv, cmd_obj); - if (_FAIL == res) { + if (res == _FAIL) { rtw_free_cmd_obj(cmd_obj); goto exit; } @@ -199,7 +199,7 @@ _next: if (!pcmd) continue; - if (_FAIL == rtw_cmd_filter(pcmdpriv, pcmd)) { + if (rtw_cmd_filter(pcmdpriv, pcmd) == _FAIL) { pcmd->res = H2C_DROPPED; goto post_process; } @@ -553,7 +553,7 @@ u8 rtw_disassoc_cmd(struct adapter *padapter, u32 deauth_timeout_ms, bool enqueu res = rtw_enqueue_cmd(cmdpriv, cmdobj); } else { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ - if (H2C_SUCCESS != disconnect_hdl(padapter, (u8 *)param)) + if (disconnect_hdl(padapter, (u8 *)param) != H2C_SUCCESS) res = _FAIL; kfree(param); } @@ -819,7 +819,7 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue) res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); } else { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ - if (H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param)) + if (set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) != H2C_SUCCESS) res = _FAIL; kfree(setChannelPlan_param); diff --git a/drivers/staging/rtl8188eu/core/rtw_debug.c b/drivers/staging/rtl8188eu/core/rtw_debug.c index 993c7db87..2c4afb80f 100644 --- a/drivers/staging/rtl8188eu/core/rtw_debug.c +++ b/drivers/staging/rtl8188eu/core/rtw_debug.c @@ -594,8 +594,7 @@ int proc_set_rx_signal(struct file *file, const char __user *buffer, if (is_signal_dbg && num != 2) return count; - signal_strength = signal_strength > 100 ? 100 : signal_strength; - signal_strength = signal_strength < 0 ? 0 : signal_strength; + signal_strength = clamp(signal_strength, 0, 100); padapter->recvpriv.is_signal_dbg = is_signal_dbg; padapter->recvpriv.signal_strength_dbg = signal_strength; diff --git a/drivers/staging/rtl8188eu/core/rtw_efuse.c b/drivers/staging/rtl8188eu/core/rtw_efuse.c index 7b99ea91a..eb894233a 100644 --- a/drivers/staging/rtl8188eu/core/rtw_efuse.c +++ b/drivers/staging/rtl8188eu/core/rtw_efuse.c @@ -268,7 +268,7 @@ static void efuse_read_phymap_from_txpktbuf( aaa = le16_to_cpup((__le16 *)&lo32); len = le16_to_cpu(*((__le16 *)&lo32)); - limit = (len-2 < limit) ? len-2 : limit; + limit = min_t(u16, len-2, limit); DBG_88E("%s len:%u, lenbak:%u, aaa:%u, aaabak:%u\n", __func__, len, lenbak, aaa, aaabak); @@ -396,7 +396,7 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE); - if (!(word_en&BIT0)) { + if (!(word_en & BIT(0))) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter, start_addr++, data[0]); efuse_OneByteWrite(pAdapter, start_addr++, data[1]); @@ -404,9 +404,9 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0]); efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[1]); if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) - badworden &= (~BIT0); + badworden &= (~BIT(0)); } - if (!(word_en&BIT1)) { + if (!(word_en & BIT(1))) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter, start_addr++, data[2]); efuse_OneByteWrite(pAdapter, start_addr++, data[3]); @@ -414,9 +414,9 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2]); efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[3]); if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) - badworden &= (~BIT1); + badworden &= (~BIT(1)); } - if (!(word_en&BIT2)) { + if (!(word_en & BIT(2))) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter, start_addr++, data[4]); efuse_OneByteWrite(pAdapter, start_addr++, data[5]); @@ -424,9 +424,9 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4]); efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[5]); if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) - badworden &= (~BIT2); + badworden &= (~BIT(2)); } - if (!(word_en&BIT3)) { + if (!(word_en & BIT(3))) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter, start_addr++, data[6]); efuse_OneByteWrite(pAdapter, start_addr++, data[7]); @@ -434,7 +434,7 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6]); efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[7]); if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) - badworden &= (~BIT3); + badworden &= (~BIT(3)); } return badworden; } @@ -738,18 +738,18 @@ static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt, u8 match_word_en = 0x0F; /* default all words are disabled */ /* check if the same words are enabled both target and current PG packet */ - if (((pTargetPkt->word_en & BIT0) == 0) && - ((pCurPkt->word_en & BIT0) == 0)) - match_word_en &= ~BIT0; /* enable word 0 */ - if (((pTargetPkt->word_en & BIT1) == 0) && - ((pCurPkt->word_en & BIT1) == 0)) - match_word_en &= ~BIT1; /* enable word 1 */ - if (((pTargetPkt->word_en & BIT2) == 0) && - ((pCurPkt->word_en & BIT2) == 0)) - match_word_en &= ~BIT2; /* enable word 2 */ - if (((pTargetPkt->word_en & BIT3) == 0) && - ((pCurPkt->word_en & BIT3) == 0)) - match_word_en &= ~BIT3; /* enable word 3 */ + if (((pTargetPkt->word_en & BIT(0)) == 0) && + ((pCurPkt->word_en & BIT(0)) == 0)) + match_word_en &= ~BIT(0); /* enable word 0 */ + if (((pTargetPkt->word_en & BIT(1)) == 0) && + ((pCurPkt->word_en & BIT(1)) == 0)) + match_word_en &= ~BIT(1); /* enable word 1 */ + if (((pTargetPkt->word_en & BIT(2)) == 0) && + ((pCurPkt->word_en & BIT(2)) == 0)) + match_word_en &= ~BIT(2); /* enable word 2 */ + if (((pTargetPkt->word_en & BIT(3)) == 0) && + ((pCurPkt->word_en & BIT(3)) == 0)) + match_word_en &= ~BIT(3); /* enable word 3 */ *pWden = match_word_en; @@ -961,19 +961,19 @@ u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data) */ void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata) { - if (!(word_en&BIT(0))) { + if (!(word_en & BIT(0))) { targetdata[0] = sourdata[0]; targetdata[1] = sourdata[1]; } - if (!(word_en&BIT(1))) { + if (!(word_en & BIT(1))) { targetdata[2] = sourdata[2]; targetdata[3] = sourdata[3]; } - if (!(word_en&BIT(2))) { + if (!(word_en & BIT(2))) { targetdata[4] = sourdata[4]; targetdata[5] = sourdata[5]; } - if (!(word_en&BIT(3))) { + if (!(word_en & BIT(3))) { targetdata[6] = sourdata[6]; targetdata[7] = sourdata[7]; } diff --git a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c index c3c582881..742b29c59 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c +++ b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c @@ -130,12 +130,12 @@ int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) } } -u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, - unsigned int *frlen) +u8 *rtw_set_fixed_ie(void *pbuf, unsigned int len, void *source, + unsigned int *frlen) { - memcpy((void *)pbuf, (void *)source, len); + memcpy(pbuf, source, len); *frlen = *frlen + len; - return pbuf + len; + return ((u8 *)pbuf) + len; } /* rtw_set_ie will update frame length */ @@ -1103,7 +1103,7 @@ void rtw_macaddr_cfg(u8 *mac_addr) void dump_ies(u8 *buf, u32 buf_len) { - u8 *pos = (u8 *)buf; + u8 *pos = buf; u8 id, len; while (pos-buf <= buf_len) { @@ -1119,7 +1119,7 @@ void dump_ies(u8 *buf, u32 buf_len) void dump_wps_ie(u8 *ie, u32 ie_len) { - u8 *pos = (u8 *)ie; + u8 *pos = ie; u16 id; u16 len; u8 *wps_ie; @@ -1392,6 +1392,6 @@ static const char *_action_public_str[] = { const char *action_public_str(u8 action) { - action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action; + action = min_t(u8, action, ACT_PUBLIC_MAX); return _action_public_str[action]; } diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme.c b/drivers/staging/rtl8188eu/core/rtw_mlme.c index 2b917a18e..c1b82f71b 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme.c @@ -1709,8 +1709,8 @@ int rtw_restruct_wmm_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_ unsigned int ielength = 0; unsigned int i, j; - i = 12; /* after the fixed IE */ - while (i < in_len) { + /* i = 12; after the fixed IE */ + for (i = 12; i < in_len; i += (in_ie[i + 1] + 2) /* to the next IE element */) { ielength = initial_out_len; if (in_ie[i] == 0xDD && in_ie[i+2] == 0x00 && in_ie[i+3] == 0x50 && in_ie[i+4] == 0xF2 && in_ie[i+5] == 0x02 && i+5 < in_len) { @@ -1726,7 +1726,6 @@ int rtw_restruct_wmm_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_ out_ie[initial_out_len + 8] = 0x00; break; } - i += (in_ie[i+1]+2); /* to the next IE element */ } return ielength; } diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c index 935b48eef..d900546b6 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c @@ -271,7 +271,8 @@ static s32 dump_mgntframe_and_wait_ack(struct adapter *padapter, if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return -1; - _enter_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); + if (mutex_lock_interruptible(&pxmitpriv->ack_tx_mutex)) + return _FAIL; pxmitpriv->ack_tx = true; pmgntframe->ack_report = 1; @@ -282,7 +283,7 @@ static s32 dump_mgntframe_and_wait_ack(struct adapter *padapter, pxmitpriv->ack_tx = false; mutex_unlock(&pxmitpriv->ack_tx_mutex); - return ret; + return ret; } static int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) @@ -417,7 +418,7 @@ static void issue_beacon(struct adapter *padapter, int timeout_ms) /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, min_t(unsigned int, rate_len, 8), cur_network->SupportedRates, &pattrib->pktlen); /* DS parameter set */ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); @@ -577,7 +578,7 @@ static void issue_probersp(struct adapter *padapter, unsigned char *da) /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, min_t(unsigned int, rate_len, 8), cur_network->SupportedRates, &pattrib->pktlen); /* DS parameter set */ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); @@ -812,17 +813,20 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, le_val16 = 0; } - pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&le_val16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, &le_val16, + &pattrib->pktlen); /* setting auth seq number */ val16 = (u16)psta->auth_seq; le_val16 = cpu_to_le16(val16); - pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&le_val16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, &le_val16, + &pattrib->pktlen); /* setting status code... */ val16 = status; le_val16 = cpu_to_le16(val16); - pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&le_val16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, + &le_val16, &pattrib->pktlen); /* added challenging text... */ if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) @@ -844,23 +848,27 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) { val32 = (pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30); le_tmp32 = cpu_to_le32(val32); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&le_tmp32, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, &le_tmp32, + &pattrib->pktlen); pattrib->iv_len = 4; } le_tmp16 = cpu_to_le16(val16); - pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&le_tmp16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, &le_tmp16, + &pattrib->pktlen); /* setting auth seq number */ val16 = pmlmeinfo->auth_seq; le_tmp16 = cpu_to_le16(val16); - pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&le_tmp16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, &le_tmp16, + &pattrib->pktlen); /* setting status code... */ le_tmp16 = cpu_to_le16(status); - pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&le_tmp16, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, &le_tmp16, + &pattrib->pktlen); /* then checking to see if sending challenging text... */ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) { @@ -944,13 +952,14 @@ static void issue_asocrsp(struct adapter *padapter, unsigned short status, /* capability */ val = *(unsigned short *)rtw_get_capability_from_ie(ie); - pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_, &val, &pattrib->pktlen); lestatus = cpu_to_le16(status); - pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&lestatus, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, &lestatus, + &pattrib->pktlen); leval = cpu_to_le16(pstat->aid | BIT(14) | BIT(15)); - pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&leval, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_, &leval, &pattrib->pktlen); if (pstat->bssratelen <= 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); @@ -1172,7 +1181,7 @@ static void issue_assocreq(struct adapter *padapter) } /* vendor specific IE, such as WPA, WMM, WPS */ - for (i = sizeof(struct ndis_802_11_fixed_ie); i < pmlmeinfo->network.IELength;) { + for (i = sizeof(struct ndis_802_11_fixed_ie); i < pmlmeinfo->network.IELength; i += (pIE->Length + 2)) { pIE = (struct ndis_802_11_var_ie *)(pmlmeinfo->network.IEs + i); switch (pIE->ElementID) { @@ -1193,7 +1202,6 @@ static void issue_assocreq(struct adapter *padapter) default: break; } - i += (pIE->Length + 2); } if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) @@ -1499,7 +1507,8 @@ static int _issue_deauth(struct adapter *padapter, unsigned char *da, unsigned s pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); le_tmp = cpu_to_le16(reason); - pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&le_tmp, &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_, &le_tmp, + &pattrib->pktlen); pattrib->last_txcmdsz = pattrib->pktlen; @@ -1687,11 +1696,13 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, BA_para_set = 0x1002 | ((status & 0xf) << 2); /* immediate ack & 64 buffer size */ le_tmp = cpu_to_le16(BA_para_set); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); BA_timeout_value = 5000;/* 5ms */ le_tmp = cpu_to_le16(BA_timeout_value); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); psta = rtw_get_stainfo(pstapriv, raddr); if (psta != NULL) { @@ -1704,13 +1715,21 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, BA_starting_seqctrl = start_seq << 4; } le_tmp = cpu_to_le16(BA_starting_seqctrl); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); break; case 1: /* ADDBA rsp */ - pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); + { + struct ADDBA_request *ADDBA_req = &pmlmeinfo->ADDBA_req; - BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f; + pframe = rtw_set_fixed_ie(pframe, 1, + &ADDBA_req->dialog_token, + &pattrib->pktlen); + pframe = rtw_set_fixed_ie(pframe, 2, &status, + &pattrib->pktlen); + + BA_para_set = le16_to_cpu(ADDBA_req->BA_para_set) & + 0x3f; rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); switch (max_rx_ampdu_factor) { case MAX_AMPDU_FACTOR_64K: @@ -1736,17 +1755,23 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, BA_para_set = BA_para_set | BIT(0); le_tmp = cpu_to_le16(BA_para_set); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); + pframe = rtw_set_fixed_ie(pframe, 2, + &ADDBA_req->BA_timeout_value, + &pattrib->pktlen); break; + } case 2:/* DELBA */ BA_para_set = (status & 0x1F) << 3; le_tmp = cpu_to_le16(BA_para_set); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); reason_code = 37;/* Requested from peer STA as it does not want to use the mechanism */ le_tmp = cpu_to_le16(reason_code); - pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, &(le_tmp), + &pattrib->pktlen); break; default: break; @@ -3213,7 +3238,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, pstat->flags |= WLAN_STA_WPS; copy_len = 0; } else { - copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)) : (wpa_ie_len+2); + copy_len = min_t(int, wpa_ie_len + 2, sizeof(pstat->wpa_ie)); } if (copy_len > 0) memcpy(pstat->wpa_ie, wpa_ie-2, copy_len); @@ -3483,7 +3508,6 @@ static unsigned int OnAssocRsp(struct adapter *padapter, pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE); pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; - /* Update Basic Rate Table for spec, 2010-12-28 , by thomas */ UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates); report_assoc_result: @@ -3902,7 +3926,7 @@ static unsigned int OnAction(struct adapter *padapter, category = frame_body[0]; - for (i = 0; i < sizeof(OnAction_tbl)/sizeof(struct action_handler); i++) { + for (i = 0; i < ARRAY_SIZE(OnAction_tbl); i++) { ptable = &OnAction_tbl[i]; if (category == ptable->num) ptable->func(padapter, precv_frame); @@ -4177,10 +4201,13 @@ void mgt_dispatcher(struct adapter *padapter, struct recv_frame *precv_frame) RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+mgt_dispatcher: type(0x%x) subtype(0x%x)\n", - GetFrameType(pframe), GetFrameSubType(pframe))); + (unsigned int)GetFrameType(pframe), + (unsigned int)GetFrameSubType(pframe))); if (GetFrameType(pframe) != WIFI_MGT_TYPE) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("mgt_dispatcher: type(0x%x) error!\n", GetFrameType(pframe))); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, + ("mgt_dispatcher: type(0x%x) error!\n", + (unsigned int)GetFrameType(pframe))); return; } @@ -5384,9 +5411,8 @@ u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf) cam_id = psta->mac_id + 3;/* 0~3 for default key, cmd_id = macid + 3, macid = aid+1; */ - DBG_88E("Write CAM, mac_addr =%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0], - pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4], - pparm->addr[5], cam_id); + DBG_88E("Write CAM, mac_addr =%pM, cam_entry=%d\n", + pparm->addr, cam_id); write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); diff --git a/drivers/staging/rtl8188eu/core/rtw_recv.c b/drivers/staging/rtl8188eu/core/rtw_recv.c index 44eeb0321..110b8c0b6 100644 --- a/drivers/staging/rtl8188eu/core/rtw_recv.c +++ b/drivers/staging/rtl8188eu/core/rtw_recv.c @@ -25,6 +25,7 @@ #include <drv_types.h> #include <recv_osdep.h> #include <mlme_osdep.h> +#include <mon.h> #include <wifi.h> #include <linux/vmalloc.h> @@ -1276,7 +1277,7 @@ static int validate_recv_frame(struct adapter *adapter, int i; DBG_88E("#############################\n"); - for (i = 0; i < 64; i = i+8) + for (i = 0; i < 64; i += 8) DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), *(ptr+i+1), *(ptr+i+2), *(ptr+i+3), *(ptr+i+4), *(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); DBG_88E("#############################\n"); @@ -1285,7 +1286,7 @@ static int validate_recv_frame(struct adapter *adapter, int i; DBG_88E("#############################\n"); - for (i = 0; i < 64; i = i+8) + for (i = 0; i < 64; i += 8) DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), *(ptr+i+1), *(ptr+i+2), *(ptr+i+3), *(ptr+i+4), *(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); DBG_88E("#############################\n"); @@ -1295,7 +1296,7 @@ static int validate_recv_frame(struct adapter *adapter, int i; DBG_88E("#############################\n"); - for (i = 0; i < 64; i = i+8) + for (i = 0; i < 64; i += 8) DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), *(ptr+i+1), *(ptr+i+2), *(ptr+i+3), *(ptr+i+4), *(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); DBG_88E("#############################\n"); @@ -1329,6 +1330,19 @@ static int validate_recv_frame(struct adapter *adapter, break; } + /* + * This is the last moment before management and control frames get + * discarded. So we need to forward them to the monitor now or never. + * + * At the same time data frames can still be encrypted if software + * decryption is in use. However, decryption can occur not until later + * (see recv_func()). + * + * Hence forward the frame to the monitor anyway to preserve the order + * in which frames were received. + */ + rtl88eu_mon_recv_hook(adapter->pmondev, precv_frame); + exit: return retval; diff --git a/drivers/staging/rtl8188eu/core/rtw_rf.c b/drivers/staging/rtl8188eu/core/rtw_rf.c index 1170dd001..6983c572b 100644 --- a/drivers/staging/rtl8188eu/core/rtw_rf.c +++ b/drivers/staging/rtl8188eu/core/rtw_rf.c @@ -52,7 +52,7 @@ static struct ch_freq ch_freq_map[] = { {216, 5080},/* Japan, means J16 */ }; -static int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); +static int ch_freq_map_num = ARRAY_SIZE(ch_freq_map); u32 rtw_ch2freq(u32 channel) { diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c index b340e4a9d..1beeac46b 100644 --- a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c +++ b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c @@ -159,7 +159,8 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) while (phead != plist) { int i; - psta = container_of(plist, struct sta_info , hash_list); + psta = container_of(plist, struct sta_info, + hash_list); plist = plist->next; for (i = 0; i < 16; i++) { @@ -273,7 +274,7 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta) struct sta_priv *pstapriv = &padapter->stapriv; - if (psta == NULL) + if (!psta) goto exit; pfree_sta_queue = &pstapriv->free_sta_queue; @@ -304,7 +305,11 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta) spin_unlock_bh(&pxmitpriv->lock); list_del_init(&psta->hash_list); - RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("\n free number_%d stainfo with hwaddr=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2], psta->hwaddr[3], psta->hwaddr[4], psta->hwaddr[5])); + RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, + ("\n free number_%d stainfo with hwaddr=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", + pstapriv->asoc_sta_count, psta->hwaddr[0], psta->hwaddr[1], + psta->hwaddr[2], psta->hwaddr[3], psta->hwaddr[4], + psta->hwaddr[5])); pstapriv->asoc_sta_count--; /* re-init sta_info; 20061114 */ @@ -433,7 +438,7 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - if (hwaddr == NULL) + if (!hwaddr) return NULL; if (IS_MCAST(hwaddr)) @@ -473,7 +478,7 @@ u32 rtw_init_bcmc_stainfo(struct adapter *padapter) psta = rtw_alloc_stainfo(pstapriv, bcast_addr); - if (psta == NULL) { + if (!psta) { res = _FAIL; RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("rtw_alloc_stainfo fail")); goto exit; diff --git a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c index 077b39a41..59b443255 100644 --- a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c +++ b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c @@ -1227,7 +1227,7 @@ unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz) unsigned int i, num_of_rate; unsigned int mask = 0; - num_of_rate = (ptn_sz > NumRates) ? NumRates : ptn_sz; + num_of_rate = min_t(unsigned int, ptn_sz, NumRates); for (i = 0; i < num_of_rate; i++) { if ((*(ptn + i)) & 0x80) @@ -1241,7 +1241,7 @@ unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz) unsigned int i, num_of_rate; unsigned int mask = 0; - num_of_rate = (ptn_sz > NumRates) ? NumRates : ptn_sz; + num_of_rate = min_t(unsigned int, ptn_sz, NumRates); for (i = 0; i < num_of_rate; i++) mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); @@ -1414,13 +1414,15 @@ void update_IOT_info(struct adapter *padapter) pmlmeinfo->turboMode_cts2self = 0; pmlmeinfo->turboMode_rtsen = 1; /* disable high power */ - Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), false); + Switch_DM_Func(padapter, (u32)(~DYNAMIC_BB_DYNAMIC_TXPWR), + false); break; case HT_IOT_PEER_REALTEK: /* rtw_write16(padapter, 0x4cc, 0xffff); */ /* rtw_write16(padapter, 0x546, 0x01c0); */ /* disable high power */ - Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), false); + Switch_DM_Func(padapter, (u32)(~DYNAMIC_BB_DYNAMIC_TXPWR), + false); break; default: pmlmeinfo->turboMode_cts2self = 0; diff --git a/drivers/staging/rtl8188eu/core/rtw_xmit.c b/drivers/staging/rtl8188eu/core/rtw_xmit.c index 5dc0b90e8..cabb81036 100644 --- a/drivers/staging/rtl8188eu/core/rtw_xmit.c +++ b/drivers/staging/rtl8188eu/core/rtw_xmit.c @@ -21,6 +21,7 @@ #include <osdep_service.h> #include <drv_types.h> +#include <mon.h> #include <wifi.h> #include <osdep_intf.h> #include <linux/vmalloc.h> @@ -1100,6 +1101,9 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct memcpy(mem_start, pbuf_start + hw_hdr_offset, pattrib->hdrlen); } + /* Frame is about to be encrypted. Forward it to the monitor first. */ + rtl88eu_mon_xmit_hook(padapter->pmondev, pxmitframe, frg_len); + if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe) == _FAIL\n")); DBG_88E("xmitframe_addmic(padapter, pxmitframe) == _FAIL\n"); diff --git a/drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c b/drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c index 2633a13b4..a108e8032 100644 --- a/drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c +++ b/drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c @@ -127,7 +127,7 @@ static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); - if (NULL == pRaInfo) { + if (!pRaInfo) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n")); return -1; @@ -193,7 +193,7 @@ static int odm_RateUp_8188E( ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n")); - if (NULL == pRaInfo) { + if (!pRaInfo) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n")); return -1; @@ -624,7 +624,7 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid) { - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("macid =%d SGI =%d\n", macid, dm_odm->RAInfo[macid].RateSGI)); @@ -635,7 +635,7 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) { u8 DecisionRate = 0; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; DecisionRate = dm_odm->RAInfo[macid].DecisionRate; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, @@ -647,7 +647,7 @@ u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) { u8 PTStage = 5; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; PTStage = dm_odm->RAInfo[macid].PTStage; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, @@ -659,7 +659,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate { struct odm_ra_info *pRaInfo = NULL; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n", @@ -676,7 +676,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) { struct odm_ra_info *pRaInfo = NULL; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" macid =%d Rssi =%d\n", macid, Rssi)); diff --git a/drivers/staging/rtl8188eu/hal/bb_cfg.c b/drivers/staging/rtl8188eu/hal/bb_cfg.c index 9c7e626aa..f58a8222c 100644 --- a/drivers/staging/rtl8188eu/hal/bb_cfg.c +++ b/drivers/staging/rtl8188eu/hal/bb_cfg.c @@ -22,14 +22,6 @@ #include <phy.h> -#define read_next_pair(array, v1, v2, i) \ - do { \ - i += 2; \ - v1 = array[i]; \ - v2 = array[i+1]; \ - } while (0) - - /* AGC_TAB_1T.TXT */ static u32 array_agc_tab_1t_8188e[] = { @@ -166,12 +158,12 @@ static u32 array_agc_tab_1t_8188e[] = { static bool set_baseband_agc_config(struct adapter *adapt) { u32 i; - u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32); + const u32 arraylen = ARRAY_SIZE(array_agc_tab_1t_8188e); u32 *array = array_agc_tab_1t_8188e; for (i = 0; i < arraylen; i += 2) { u32 v1 = array[i]; - u32 v2 = array[i+1]; + u32 v2 = array[i + 1]; if (v1 < 0xCDCDCDCD) { phy_set_bb_reg(adapt, v1, bMaskDWord, v2); @@ -401,12 +393,12 @@ static void rtl_bb_delay(struct adapter *adapt, u32 addr, u32 data) static bool set_baseband_phy_config(struct adapter *adapt) { u32 i; - u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32); + const u32 arraylen = ARRAY_SIZE(array_phy_reg_1t_8188e); u32 *array = array_phy_reg_1t_8188e; for (i = 0; i < arraylen; i += 2) { u32 v1 = array[i]; - u32 v2 = array[i+1]; + u32 v2 = array[i + 1]; if (v1 < 0xCDCDCDCD) rtl_bb_delay(adapt, v1, v2); @@ -508,53 +500,55 @@ static u32 array_phy_reg_pg_8188e[] = { }; -static void store_pwrindex_offset(struct adapter *Adapter, u32 regaddr, u32 bitmask, u32 data) +static void store_pwrindex_offset(struct adapter *adapter, + u32 regaddr, u32 bitmask, u32 data) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - u8 pwrGrpCnt = hal_data->pwrGroupCnt; + struct hal_data_8188e *hal_data = GET_HAL_DATA(adapter); + u32 * const power_level_offset = + hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt]; if (regaddr == rTxAGC_A_Rate18_06) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][0] = data; + power_level_offset[0] = data; if (regaddr == rTxAGC_A_Rate54_24) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][1] = data; + power_level_offset[1] = data; if (regaddr == rTxAGC_A_CCK1_Mcs32) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][6] = data; + power_level_offset[6] = data; if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][7] = data; + power_level_offset[7] = data; if (regaddr == rTxAGC_A_Mcs03_Mcs00) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][2] = data; + power_level_offset[2] = data; if (regaddr == rTxAGC_A_Mcs07_Mcs04) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][3] = data; + power_level_offset[3] = data; if (regaddr == rTxAGC_A_Mcs11_Mcs08) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][4] = data; + power_level_offset[4] = data; if (regaddr == rTxAGC_A_Mcs15_Mcs12) { - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][5] = data; + power_level_offset[5] = data; if (hal_data->rf_type == RF_1T1R) hal_data->pwrGroupCnt++; } if (regaddr == rTxAGC_B_Rate18_06) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][8] = data; + power_level_offset[8] = data; if (regaddr == rTxAGC_B_Rate54_24) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][9] = data; + power_level_offset[9] = data; if (regaddr == rTxAGC_B_CCK1_55_Mcs32) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][14] = data; + power_level_offset[14] = data; if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][15] = data; + power_level_offset[15] = data; if (regaddr == rTxAGC_B_Mcs03_Mcs00) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][10] = data; + power_level_offset[10] = data; if (regaddr == rTxAGC_B_Mcs07_Mcs04) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][11] = data; + power_level_offset[11] = data; if (regaddr == rTxAGC_B_Mcs11_Mcs08) - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][12] = data; + power_level_offset[12] = data; if (regaddr == rTxAGC_B_Mcs15_Mcs12) { - hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][13] = data; + power_level_offset[13] = data; if (hal_data->rf_type != RF_1T1R) hal_data->pwrGroupCnt++; } } static void rtl_addr_delay(struct adapter *adapt, - u32 addr, u32 bit_mask, u32 data) + u32 addr, u32 bit_mask, u32 data) { switch (addr) { case 0xfe: @@ -582,14 +576,14 @@ static void rtl_addr_delay(struct adapter *adapt, static bool config_bb_with_pgheader(struct adapter *adapt) { - u32 i = 0; - u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32); + u32 i; + const u32 arraylen = ARRAY_SIZE(array_phy_reg_pg_8188e); u32 *array = array_phy_reg_pg_8188e; for (i = 0; i < arraylen; i += 3) { u32 v1 = array[i]; - u32 v2 = array[i+1]; - u32 v3 = array[i+2]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; if (v1 < 0xCDCDCDCD) rtl_addr_delay(adapt, v1, v2, v3); @@ -597,15 +591,15 @@ static bool config_bb_with_pgheader(struct adapter *adapt) return true; } -static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *Adapter) +static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *adapter) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = GET_HAL_DATA(adapter); struct bb_reg_def *reg[4]; - reg[RF_PATH_A] = &(hal_data->PHYRegDef[RF_PATH_A]); - reg[RF_PATH_B] = &(hal_data->PHYRegDef[RF_PATH_B]); - reg[RF_PATH_C] = &(hal_data->PHYRegDef[RF_PATH_C]); - reg[RF_PATH_D] = &(hal_data->PHYRegDef[RF_PATH_D]); + reg[RF_PATH_A] = &hal_data->PHYRegDef[RF_PATH_A]; + reg[RF_PATH_B] = &hal_data->PHYRegDef[RF_PATH_B]; + reg[RF_PATH_C] = &hal_data->PHYRegDef[RF_PATH_C]; + reg[RF_PATH_D] = &hal_data->PHYRegDef[RF_PATH_D]; reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW; reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW; @@ -688,13 +682,13 @@ static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *Adapter) static bool config_parafile(struct adapter *adapt) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapt); + struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt); set_baseband_phy_config(adapt); /* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */ - if (!pEEPROM->bautoload_fail_flag) { + if (!eeprom->bautoload_fail_flag) { hal_data->pwrGroupCnt = 0; config_bb_with_pgheader(adapt); } @@ -713,18 +707,21 @@ bool rtl88eu_phy_bb_config(struct adapter *adapt) /* Enable BB and RF */ regval = usb_read16(adapt, REG_SYS_FUNC_EN); - usb_write16(adapt, REG_SYS_FUNC_EN, (u16)(regval|BIT13|BIT0|BIT1)); + usb_write16(adapt, REG_SYS_FUNC_EN, + (u16)(regval | BIT(13) | BIT(0) | BIT(1))); - usb_write8(adapt, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); + usb_write8(adapt, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB); - usb_write8(adapt, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); + usb_write8(adapt, REG_SYS_FUNC_EN, FEN_USBA | + FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); /* Config BB and AGC */ rtstatus = config_parafile(adapt); /* write 0x24[16:11] = 0x24[22:17] = crystal_cap */ crystal_cap = hal_data->CrystalCap & 0x3F; - phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | (crystal_cap << 6))); + phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, + (crystal_cap | (crystal_cap << 6))); return rtstatus; } diff --git a/drivers/staging/rtl8188eu/hal/fw.c b/drivers/staging/rtl8188eu/hal/fw.c index 823632011..e27221ef7 100644 --- a/drivers/staging/rtl8188eu/hal/fw.c +++ b/drivers/staging/rtl8188eu/hal/fw.c @@ -190,7 +190,6 @@ int rtl88eu_download_fw(struct adapter *adapt) struct rtl92c_firmware_header *pfwheader = NULL; u8 *pfwdata; u32 fwsize; - int err; if (reject_firmware(&fw, fw_name, device)) { dev_err(device, "Firmware %s not available\n", fw_name); @@ -229,7 +228,5 @@ int rtl88eu_download_fw(struct adapter *adapt) _rtl88e_write_fw(adapt, pfwdata, fwsize); _rtl88e_enable_fw_download(adapt, false); - err = _rtl88e_fw_free_to_go(adapt); - - return err; + return _rtl88e_fw_free_to_go(adapt); } diff --git a/drivers/staging/rtl8188eu/hal/mac_cfg.c b/drivers/staging/rtl8188eu/hal/mac_cfg.c index febc83a5a..0bc1b2152 100644 --- a/drivers/staging/rtl8188eu/hal/mac_cfg.c +++ b/drivers/staging/rtl8188eu/hal/mac_cfg.c @@ -123,10 +123,10 @@ bool rtl88eu_phy_mac_config(struct adapter *adapt) u32 arraylength; u32 *ptrarray; - arraylength = sizeof(array_MAC_REG_8188E)/sizeof(u32); + arraylength = ARRAY_SIZE(array_MAC_REG_8188E); ptrarray = array_MAC_REG_8188E; - for (i = 0; i < arraylength; i = i + 2) + for (i = 0; i < arraylength; i += 2) usb_write8(adapt, ptrarray[i], (u8)ptrarray[i + 1]); usb_write8(adapt, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); diff --git a/drivers/staging/rtl8188eu/hal/odm.c b/drivers/staging/rtl8188eu/hal/odm.c index 710fdc344..2c25d3b02 100644 --- a/drivers/staging/rtl8188eu/hal/odm.c +++ b/drivers/staging/rtl8188eu/hal/odm.c @@ -437,7 +437,7 @@ void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) { struct adapter *adapter = pDM_Odm->Adapter; - pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT9); + pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9)); pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F); ODM_InitDebugSetting(pDM_Odm); @@ -736,8 +736,8 @@ void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) return; /* hold ofdm counter */ - phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ - phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ + phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ + phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); @@ -760,8 +760,8 @@ void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16; /* hold cck counter */ - phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); + phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); + phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); FalseAlmCnt->Cnt_Cck_fail = ret_value; @@ -853,7 +853,7 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) } if (pDM_PSTable->initialize == 0) { pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; - pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; + pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3))>>3; pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; pDM_PSTable->initialize = 1; @@ -881,19 +881,19 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { if (pDM_PSTable->CurRFState == RF_Save) { - phy_set_bb_reg(adapter, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ - phy_set_bb_reg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ + phy_set_bb_reg(adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ + phy_set_bb_reg(adapter, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */ phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ - phy_set_bb_reg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ - phy_set_bb_reg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ + phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */ + phy_set_bb_reg(adapter, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */ } else { - phy_set_bb_reg(adapter, 0x874 , 0x1CC000, pDM_PSTable->Reg874); - phy_set_bb_reg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); + phy_set_bb_reg(adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874); + phy_set_bb_reg(adapter, 0xc70, BIT(3), pDM_PSTable->RegC70); phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); - phy_set_bb_reg(adapter, 0x818, BIT28, 0x0); + phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); } pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; } @@ -1043,7 +1043,7 @@ void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; if (IS_STA_VALID(pstat)) { - if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) { + if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); @@ -1188,7 +1188,8 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; FindMinimumRSSI(Adapter); - ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); + ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, + pdmpriv->MinUndecoratedPWDBForDM); } /* 3============================================================ */ @@ -1228,7 +1229,7 @@ void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) return; if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ - phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); + phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; return; diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c index 36afe45d1..28b9f7f59 100644 --- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c +++ b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c @@ -362,7 +362,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, } } - pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; + pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT(0); } else { RSSI_Ave = pPhyInfo->RxPWDBAll; @@ -391,10 +391,10 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, pEntry->rssi_stat.ValidBit++; for (i = 0; i < pEntry->rssi_stat.ValidBit; i++) - OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0; + OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i) & BIT(0); if (pEntry->rssi_stat.ValidBit == 64) { - Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4); + Weighting = min_t(u32, OFDM_pkt << 4, 64); UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; } else { if (pEntry->rssi_stat.ValidBit != 0) diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c index d3c687392..c0242a095 100644 --- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c +++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c @@ -28,26 +28,26 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm) if (*(dm_odm->mp_mode) == 1) { dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1); + phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); + phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); return; } /* MAC Setting */ value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32|(BIT23|BIT25)); + value32|(BIT(23) | BIT(25))); /* Pin Settings */ - phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1); + phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); + phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); + phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* OFDM Settings */ phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); /* CCK Settings */ - phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); + phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); + phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT); phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); } @@ -59,37 +59,37 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm) if (*(dm_odm->mp_mode) == 1) { dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); + phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT5|BIT4|BIT3, 0); + BIT(5) | BIT(4) | BIT(3), 0); return; } /* MAC Setting */ value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32|(BIT23|BIT25)); + value32|(BIT(23) | BIT(25))); /* Pin Settings */ - phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1); + phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); + phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); + phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* OFDM Settings */ phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); /* CCK Settings */ - phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); + phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); + phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* Tx Settings */ - phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); + phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT); /* antenna mapping table */ if (!dm_odm->bIsMPChip) { /* testchip */ phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, - BIT10|BIT9|BIT8, 1); + BIT(10) | BIT(9) | BIT(8), 1); phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, - BIT13|BIT12|BIT11, 2); + BIT(13) | BIT(12) | BIT(11), 2); } else { /* MPchip */ phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); @@ -118,40 +118,40 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) /* MAC Setting */ value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord); - phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); + phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT(23) | BIT(25))); value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord); - phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); + phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT(16) | BIT(17))); /* Match MAC ADDR */ phy_set_bb_reg(adapter, 0x7b4, 0xFFFF, 0); phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0); - phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0); - phy_set_bb_reg(adapter, 0x864, BIT10, 0); - phy_set_bb_reg(adapter, 0xb2c, BIT22, 0); - phy_set_bb_reg(adapter, 0xb2c, BIT31, 1); + phy_set_bb_reg(adapter, 0x870, BIT(9) | BIT(8), 0); + phy_set_bb_reg(adapter, 0x864, BIT(10), 0); + phy_set_bb_reg(adapter, 0xb2c, BIT(22), 0); + phy_set_bb_reg(adapter, 0xb2c, BIT(31), 1); phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x000000a0); /* antenna mapping table */ if (AntCombination == 2) { if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1); - phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2); + phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); + phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); } else { /* MPchip */ phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1); phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2); } } else if (AntCombination == 7) { if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0); - phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1); - phy_set_bb_reg(adapter, 0x878, BIT16, 0); - phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2); - phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3); - phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4); - phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5); - phy_set_bb_reg(adapter, 0x878, BIT28|BIT27|BIT26, 6); - phy_set_bb_reg(adapter, 0x878, BIT31|BIT30|BIT29, 7); + phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 0); + phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 1); + phy_set_bb_reg(adapter, 0x878, BIT(16), 0); + phy_set_bb_reg(adapter, 0x858, BIT(15) | BIT(14), 2); + phy_set_bb_reg(adapter, 0x878, BIT(19) | BIT(18) | BIT(17), 3); + phy_set_bb_reg(adapter, 0x878, BIT(22) | BIT(21) | BIT(20), 4); + phy_set_bb_reg(adapter, 0x878, BIT(25) | BIT(24) | BIT(23), 5); + phy_set_bb_reg(adapter, 0x878, BIT(28) | BIT(27) | BIT(26), 6); + phy_set_bb_reg(adapter, 0x878, BIT(31) | BIT(30) | BIT(29), 7); } else { /* MPchip */ phy_set_bb_reg(adapter, 0x914, bMaskByte0, 0); phy_set_bb_reg(adapter, 0x914, bMaskByte1, 1); @@ -165,13 +165,13 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) } /* Default Ant Setting when no fast training */ - phy_set_bb_reg(adapter, 0x80c, BIT21, 1); - phy_set_bb_reg(adapter, 0x864, BIT5|BIT4|BIT3, 0); - phy_set_bb_reg(adapter, 0x864, BIT8|BIT7|BIT6, 1); + phy_set_bb_reg(adapter, 0x80c, BIT(21), 1); + phy_set_bb_reg(adapter, 0x864, BIT(5) | BIT(4) | BIT(3), 0); + phy_set_bb_reg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Enter Traing state */ - phy_set_bb_reg(adapter, 0x864, BIT2|BIT1|BIT0, (AntCombination-1)); - phy_set_bb_reg(adapter, 0xc50, BIT7, 1); + phy_set_bb_reg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), (AntCombination-1)); + phy_set_bb_reg(adapter, 0xc50, BIT(7), 1); } void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm) @@ -205,18 +205,18 @@ void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant) if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT5|BIT4|BIT3, default_ant); + BIT(5) | BIT(4) | BIT(3), default_ant); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT8|BIT7|BIT6, optional_ant); + BIT(8) | BIT(7) | BIT(6), optional_ant); phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, - BIT14|BIT13|BIT12, default_ant); + BIT(14) | BIT(13) | BIT(12), default_ant); phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, - BIT6|BIT7, default_ant); + BIT(6) | BIT(7), default_ant); } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT5|BIT4|BIT3, default_ant); + BIT(5) | BIT(4) | BIT(3), default_ant); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT8|BIT7|BIT6, optional_ant); + BIT(8) | BIT(7) | BIT(6), optional_ant); } } dm_fat_tbl->RxIdleAnt = ant; @@ -231,9 +231,9 @@ static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 mac_id) target_ant = MAIN_ANT_CG_TRX; else target_ant = AUX_ANT_CG_TRX; - dm_fat_tbl->antsel_a[mac_id] = target_ant&BIT0; - dm_fat_tbl->antsel_b[mac_id] = (target_ant&BIT1)>>1; - dm_fat_tbl->antsel_c[mac_id] = (target_ant&BIT2)>>2; + dm_fat_tbl->antsel_a[mac_id] = target_ant & BIT(0); + dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1))>>1; + dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2))>>2; } void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, @@ -292,8 +292,7 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm) (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0; target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT; /* 2 Select max_rssi for DIG */ - local_max_rssi = (main_rssi > aux_rssi) ? - main_rssi : aux_rssi; + local_max_rssi = max(main_rssi, aux_rssi); if ((local_max_rssi > ant_div_max_rssi) && (local_max_rssi < 40)) ant_div_max_rssi = local_max_rssi; @@ -308,8 +307,7 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm) (aux_rssi == 0)) aux_rssi = main_rssi; - local_min_rssi = (main_rssi > aux_rssi) ? - aux_rssi : main_rssi; + local_min_rssi = min(main_rssi, aux_rssi); if (local_min_rssi < min_rssi) { min_rssi = local_min_rssi; RxIdleAnt = target_ant; @@ -344,12 +342,12 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm) if (dm_fat_tbl->bBecomeLinked) { ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n")); - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); + phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, - BIT15, 0); + BIT(15), 0); if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, - BIT21, 0); + BIT(21), 0); dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; } return; @@ -357,12 +355,12 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm) if (!dm_fat_tbl->bBecomeLinked) { ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n")); - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1); + phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, - BIT15, 1); + BIT(15), 1); if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, - BIT21, 1); + BIT(21), 1); dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; } } diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c index 2eafa503f..d3e8a8ea1 100644 --- a/drivers/staging/rtl8188eu/hal/phy.c +++ b/drivers/staging/rtl8188eu/hal/phy.c @@ -97,9 +97,9 @@ static u32 rf_serial_read(struct adapter *adapt, udelay(10); if (rfpath == RF_PATH_A) - rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, BIT8); + rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, BIT(8)); else if (rfpath == RF_PATH_B) - rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, BIT8); + rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, BIT(8)); if (rfpi_enable) ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBackPi, @@ -293,7 +293,7 @@ static void phy_set_bw_mode_callback(struct adapter *adapt) (hal_data->nCur40MhzPrimeSC>>1)); phy_set_bb_reg(adapt, rOFDM1_LSTF, 0xC00, hal_data->nCur40MhzPrimeSC); - phy_set_bb_reg(adapt, 0x818, (BIT26 | BIT27), + phy_set_bb_reg(adapt, 0x818, (BIT(26) | BIT(27)), (hal_data->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); break; default: @@ -652,7 +652,7 @@ static u8 phy_path_a_iqk(struct adapter *adapt, bool config_pathb) reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); - if (!(reg_eac & BIT28) && + if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000)>>16) != 0x142) && (((reg_e9c & 0x03FF0000)>>16) != 0x42)) result |= 0x01; @@ -705,7 +705,7 @@ static u8 phy_path_a_rx_iqk(struct adapter *adapt, bool configPathB) reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); - if (!(reg_eac & BIT28) && + if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000)>>16) != 0x142) && (((reg_e9c & 0x03FF0000)>>16) != 0x42)) result |= 0x01; @@ -753,7 +753,7 @@ static u8 phy_path_a_rx_iqk(struct adapter *adapt, bool configPathB) phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180); - if (!(reg_eac & BIT27) && /* if Tx is OK, check whether Rx is OK */ + if (!(reg_eac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ (((reg_ea4 & 0x03FF0000)>>16) != 0x132) && (((reg_eac & 0x03FF0000)>>16) != 0x36)) result |= 0x02; @@ -783,14 +783,14 @@ static u8 phy_path_b_iqk(struct adapter *adapt) regec4 = phy_query_bb_reg(adapt, rRx_Power_Before_IQK_B_2, bMaskDWord); regecc = phy_query_bb_reg(adapt, rRx_Power_After_IQK_B_2, bMaskDWord); - if (!(regeac & BIT31) && + if (!(regeac & BIT(31)) && (((regeb4 & 0x03FF0000)>>16) != 0x142) && (((regebc & 0x03FF0000)>>16) != 0x42)) result |= 0x01; else return result; - if (!(regeac & BIT30) && + if (!(regeac & BIT(30)) && (((regec4 & 0x03FF0000)>>16) != 0x132) && (((regecc & 0x03FF0000)>>16) != 0x36)) result |= 0x02; @@ -959,9 +959,9 @@ static void mac_setting_calibration(struct adapter *adapt, u32 *mac_reg, u32 *ba usb_write8(adapt, mac_reg[i], 0x3F); for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) { - usb_write8(adapt, mac_reg[i], (u8)(backup[i]&(~BIT3))); + usb_write8(adapt, mac_reg[i], (u8)(backup[i]&(~BIT(3)))); } - usb_write8(adapt, mac_reg[i], (u8)(backup[i]&(~BIT5))); + usb_write8(adapt, mac_reg[i], (u8)(backup[i]&(~BIT(5)))); } static void path_a_standby(struct adapter *adapt) @@ -1013,7 +1013,7 @@ static bool simularity_compare(struct adapter *adapt, s32 resulta[][8], tmp2 = resulta[c2][i]; } - diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); + diff = abs(tmp1 - tmp2); if (diff > MAX_TOLERANCE) { if ((i == 2 || i == 6) && !sim_bitmap) { @@ -1117,15 +1117,15 @@ static void phy_iq_calibrate(struct adapter *adapt, s32 result[][8], } /* BB setting */ - phy_set_bb_reg(adapt, rFPGA0_RFMOD, BIT24, 0x00); + phy_set_bb_reg(adapt, rFPGA0_RFMOD, BIT(24), 0x00); phy_set_bb_reg(adapt, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); phy_set_bb_reg(adapt, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); phy_set_bb_reg(adapt, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); - phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); - phy_set_bb_reg(adapt, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); - phy_set_bb_reg(adapt, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); + phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); + phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); + phy_set_bb_reg(adapt, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); + phy_set_bb_reg(adapt, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00); if (is2t) { phy_set_bb_reg(adapt, rFPGA0_XA_LSSIParameter, bMaskDWord, diff --git a/drivers/staging/rtl8188eu/hal/rf_cfg.c b/drivers/staging/rtl8188eu/hal/rf_cfg.c index 954cade47..44945427c 100644 --- a/drivers/staging/rtl8188eu/hal/rf_cfg.c +++ b/drivers/staging/rtl8188eu/hal/rf_cfg.c @@ -188,7 +188,7 @@ static void rtl8188e_config_rf_reg(struct adapter *adapt, u32 addr, u32 data) { u32 content = 0x1000; /*RF Content: radio_a_txt*/ - u32 maskforphyset = (u32)(content & 0xE000); + u32 maskforphyset = content & 0xE000; rtl_rfreg_delay(adapt, RF90_PATH_A, addr | maskforphyset, RFREG_OFFSET_MASK, @@ -198,7 +198,7 @@ static void rtl8188e_config_rf_reg(struct adapter *adapt, static bool rtl88e_phy_config_rf_with_headerfile(struct adapter *adapt) { u32 i; - u32 array_len = sizeof(Array_RadioA_1T_8188E)/sizeof(u32); + u32 array_len = ARRAY_SIZE(Array_RadioA_1T_8188E); u32 *array = Array_RadioA_1T_8188E; for (i = 0; i < array_len; i += 2) { @@ -214,7 +214,7 @@ static bool rtl88e_phy_config_rf_with_headerfile(struct adapter *adapt) while (v2 != 0xDEAD && v2 != 0xCDEF && v2 != 0xCDCD && i < array_len - 2) READ_NEXT_PAIR(v1, v2, i); - i -= 2; + i -= 2; } else { READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c b/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c index 0a62bfa21..580876313 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c @@ -149,7 +149,7 @@ void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; - shortGIrate = (arg&BIT(5)) ? true : false; + shortGIrate = (arg & BIT(5)) ? true : false; if (shortGIrate) init_rate |= BIT(6); @@ -277,7 +277,7 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, min_t(u32, rate_len, 8), cur_network->SupportedRates, &pktlen); /* DS parameter set */ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); @@ -467,7 +467,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) DBG_88E("%s\n", __func__); ReservedPagePacket = kzalloc(1000, GFP_KERNEL); - if (ReservedPagePacket == NULL) { + if (!ReservedPagePacket) { DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__); return; } @@ -537,7 +537,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) TotalPacketLen = BufIndex + QosNullLength; pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (pmgntframe == NULL) + if (!pmgntframe) goto exit; /* update attribute */ @@ -577,23 +577,23 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) /* Do not set TSF again here or vWiFi beacon DMA INT will not work. */ /* Set REG_CR bit 8. DMA beacon by SW. */ - haldata->RegCR_1 |= BIT0; + haldata->RegCR_1 |= BIT(0); usb_write8(adapt, REG_CR+1, haldata->RegCR_1); /* Disable Hw protection for a time which revserd for Hw sending beacon. */ /* Fix download reserved page packet fail that access collision with the protection time. */ /* 2010.05.11. Added by tynli. */ usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(3))); - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(4)); + usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(4)); - if (haldata->RegFwHwTxQCtrl&BIT6) { + if (haldata->RegFwHwTxQCtrl & BIT(6)) { DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); bSendBeacon = true; } /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ - usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6))); - haldata->RegFwHwTxQCtrl &= (~BIT6); + usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT(6)))); + haldata->RegFwHwTxQCtrl &= (~BIT(6)); /* Clear beacon valid check bit. */ rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); @@ -626,7 +626,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) /* */ /* Enable Bcn */ - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(3)); + usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(3)); usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(4))); /* To make sure that if there exists an adapter which would like to send beacon. */ @@ -635,8 +635,8 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) /* the beacon cannot be sent by HW. */ /* 2010.06.23. Added by tynli. */ if (bSendBeacon) { - usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6)); - haldata->RegFwHwTxQCtrl |= BIT6; + usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl | BIT(6))); + haldata->RegFwHwTxQCtrl |= BIT(6); } /* Update RSVD page location H2C to Fw. */ @@ -647,7 +647,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ - haldata->RegCR_1 &= (~BIT0); + haldata->RegCR_1 &= (~BIT(0)); usb_write8(adapt, REG_CR+1, haldata->RegCR_1); } } diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c index a6295ca6a..e3e5d6f5d 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c @@ -106,8 +106,8 @@ void _8051Reset88E(struct adapter *padapter) u8 u1bTmp; u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1); - usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); - usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); + usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2))); + usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2))); DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n"); } @@ -184,10 +184,10 @@ static void hal_notch_filter_8188e(struct adapter *adapter, bool enable) { if (enable) { DBG_88E("Enable notch filter\n"); - usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT1); + usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1)); } else { DBG_88E("Disable notch filter\n"); - usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); + usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1)); } } void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) @@ -372,7 +372,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; } else { pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } @@ -380,7 +380,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; } else { pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; @@ -390,7 +390,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } else { pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; } @@ -398,7 +398,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } else { pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } eeAddr++; @@ -407,7 +407,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } else { pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } @@ -415,7 +415,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } else { pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; } eeAddr++; @@ -444,6 +444,9 @@ static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup) else if (chnl == 14) /* Channel 14 */ *pGroup = 5; } else { + + /* probably, this branch is suitable only for 5 GHz */ + bIn24G = false; if (chnl <= 40) @@ -485,13 +488,13 @@ void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoL /* hw power down mode selection , 0:rf-off / 1:power down */ if (padapter->registrypriv.hwpdn_mode == 2) - padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4); + padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4)); else padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode; /* decide hw if support remote wakeup function */ /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */ - padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1) ? true : false; + padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false; DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__, padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup); diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c index 81d691ddd..564cf53bf 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c @@ -36,7 +36,7 @@ void SwLedOn(struct adapter *padapter, struct LED_871x *pLed) if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return; LedCfg = usb_read8(padapter, REG_LEDCFG2); - usb_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */ + usb_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0) | BIT(5) | BIT(6)); /* SW control led0 on. */ pLed->bLedOn = true; } @@ -55,12 +55,12 @@ void SwLedOff(struct adapter *padapter, struct LED_871x *pLed) if (pHalData->bLedOpenDrain) { /* Open-drain arrangement for controlling the LED) */ LedCfg &= 0x90; /* Set to software control. */ - usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); + usb_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3))); LedCfg = usb_read8(padapter, REG_MAC_PINMUX_CFG); LedCfg &= 0xFE; usb_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); } else { - usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); + usb_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3) | BIT(5) | BIT(6))); } exit: pLed->bLedOn = false; diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c index 06d1e6544..d6d009aaf 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c @@ -43,7 +43,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter) precvpriv->pallocated_recv_buf = kcalloc(NR_RECVBUFF, sizeof(struct recv_buf), GFP_KERNEL); - if (precvpriv->pallocated_recv_buf == NULL) { + if (!precvpriv->pallocated_recv_buf) { res = _FAIL; RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n")); diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c index 594c1da9d..7c5086ecf 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c @@ -20,6 +20,7 @@ #define _RTL8188E_XMIT_C_ #include <osdep_service.h> #include <drv_types.h> +#include <mon.h> #include <wifi.h> #include <osdep_intf.h> #include <usb_ops_linux.h> @@ -649,7 +650,7 @@ static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe) goto enqueue; pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) + if (!pxmitbuf) goto enqueue; spin_unlock_bh(&pxmitpriv->lock); @@ -684,6 +685,9 @@ enqueue: s32 rtl8188eu_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe) { + struct xmit_priv *xmitpriv = &adapt->xmitpriv; + + rtl88eu_mon_xmit_hook(adapt->pmondev, pmgntframe, xmitpriv->frag_len); return rtw_dump_xframe(adapt, pmgntframe); } diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c b/drivers/staging/rtl8188eu/hal/usb_halinit.c index 1ef878fd9..7e72259f0 100644 --- a/drivers/staging/rtl8188eu/hal/usb_halinit.c +++ b/drivers/staging/rtl8188eu/hal/usb_halinit.c @@ -607,7 +607,7 @@ static void _InitBeaconParameters(struct adapter *Adapter) static void _BeaconFunctionEnable(struct adapter *Adapter, bool Enable, bool Linked) { - usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); + usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1))); usb_write8(Adapter, REG_RD_CTRL+1, 0x6F); } @@ -632,8 +632,8 @@ static void _InitAntenna_Selection(struct adapter *Adapter) return; DBG_88E("==> %s ....\n", __func__); - usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0)|BIT23); - phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23)); + phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01); if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) haldata->CurAntenna = Antenna_A; @@ -664,13 +664,13 @@ enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt) if (adapt->pwrctrlpriv.bHWPowerdown) { val8 = usb_read8(adapt, REG_HSISR); - DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8); - rfpowerstate = (val8 & BIT7) ? rf_off : rf_on; + DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8); + rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on; } else { /* rf on/off */ - usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3)); + usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3))); val8 = usb_read8(adapt, REG_GPIO_IO_SEL); DBG_88E("GPIO_IN=%02x\n", val8); - rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; + rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off; } return rfpowerstate; } /* HalDetectPwrDownMode */ @@ -805,7 +805,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter) /* Enable TX Report */ /* Enable Tx Report Timer */ value8 = usb_read8(Adapter, REG_TX_RPT_CTRL); - usb_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); + usb_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0))); /* Set MAX RPT MACID */ usb_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */ /* Tx RPT Timer. Unit: 32us */ @@ -898,7 +898,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); usb_write8(Adapter, REG_USB_HRPWM, 0); /* ack for xmit mgmt frames. */ - usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); + usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12)); exit: HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); @@ -918,7 +918,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ val8 = usb_read8(Adapter, REG_TX_RPT_CTRL); - usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1)); + usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1))); /* stop rx */ usb_write8(Adapter, REG_CR, 0x0); @@ -944,7 +944,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) /* YJ,add,111212 */ /* Disable 32k */ val8 = usb_read8(Adapter, REG_32K_CTRL); - usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT0)); + usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0))); /* Card disable power action flow */ rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK, @@ -953,9 +953,9 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) /* Reset MCU IO Wrapper */ val8 = usb_read8(Adapter, REG_RSV_CTRL+1); - usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3))); + usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3)))); val8 = usb_read8(Adapter, REG_RSV_CTRL+1); - usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3); + usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3)); /* YJ,test add, 111207. For Power Consumption. */ val8 = usb_read8(Adapter, GPIO_IN); @@ -1171,10 +1171,10 @@ static void ResumeTxBeacon(struct adapter *adapt) /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ /* which should be read from register to a global variable. */ - usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6); - haldata->RegFwHwTxQCtrl |= BIT6; + usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6)); + haldata->RegFwHwTxQCtrl |= BIT(6); usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff); - haldata->RegReg542 |= BIT0; + haldata->RegReg542 |= BIT(0); usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542); } @@ -1185,10 +1185,10 @@ static void StopTxBeacon(struct adapter *adapt) /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ /* which should be read from register to a global variable. */ - usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6)); - haldata->RegFwHwTxQCtrl &= (~BIT6); + usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6))); + haldata->RegFwHwTxQCtrl &= (~BIT(6)); usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64); - haldata->RegReg542 &= ~(BIT0); + haldata->RegReg542 &= ~(BIT(0)); usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542); /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */ @@ -1200,7 +1200,7 @@ static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val) u8 mode = *((u8 *)val); /* disable Port0 TSF update */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); /* set net_type */ val8 = usb_read8(Adapter, MSR)&0x0c; @@ -1378,7 +1378,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) usb_write32(Adapter, REG_TSFTR+4, tsf>>32); /* enable related TSF function */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(3)); + usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3)); if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ResumeTxBeacon(Adapter); @@ -1403,10 +1403,10 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) usb_write16(Adapter, REG_RXFLTMAP2, 0x00); /* reset TSF */ - usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); + usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); /* disable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); break; case HW_VAR_MLME_SITESURVEY: if (*((u8 *)val)) { /* under sitesurvey */ @@ -1418,7 +1418,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) usb_write16(Adapter, REG_RXFLTMAP2, 0x00); /* disable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); } else { /* sitesurvey done */ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -1578,7 +1578,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } break; case HW_VAR_CAM_INVALID_ALL: - usb_write32(Adapter, RWCAM, BIT(31)|BIT(30)); + usb_write32(Adapter, RWCAM, BIT(31) | BIT(30)); break; case HW_VAR_CAM_WRITE: { @@ -1795,7 +1795,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) break; case HW_VAR_BCN_VALID: /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */ - usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT0); + usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0)); break; default: break; @@ -1815,7 +1815,7 @@ static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) break; case HW_VAR_BCN_VALID: /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */ - val[0] = (BIT0 & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false; + val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false; break; case HW_VAR_DM_FLAG: val[0] = podmpriv->SupportAbility; @@ -2052,7 +2052,7 @@ static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) ResumeTxBeacon(adapt); - usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg)|BIT(1)); + usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1)); } static void rtl8188eu_init_default_value(struct adapter *adapt) diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h index 20e6b40fc..e058162fe 100644 --- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h +++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h @@ -87,13 +87,13 @@ enum rf_radio_path { enum wireless_mode { WIRELESS_MODE_UNKNOWN = 0x00, - WIRELESS_MODE_A = BIT2, - WIRELESS_MODE_B = BIT0, - WIRELESS_MODE_G = BIT1, - WIRELESS_MODE_AUTO = BIT5, - WIRELESS_MODE_N_24G = BIT3, - WIRELESS_MODE_N_5G = BIT4, - WIRELESS_MODE_AC = BIT6 + WIRELESS_MODE_A = BIT(2), + WIRELESS_MODE_B = BIT(0), + WIRELESS_MODE_G = BIT(1), + WIRELESS_MODE_AUTO = BIT(5), + WIRELESS_MODE_N_24G = BIT(3), + WIRELESS_MODE_N_5G = BIT(4), + WIRELESS_MODE_AC = BIT(6) }; enum phy_rate_tx_offset_area { diff --git a/drivers/staging/rtl8188eu/include/basic_types.h b/drivers/staging/rtl8188eu/include/basic_types.h index 8a7ca9926..6a2a147e6 100644 --- a/drivers/staging/rtl8188eu/include/basic_types.h +++ b/drivers/staging/rtl8188eu/include/basic_types.h @@ -20,9 +20,6 @@ #ifndef __BASIC_TYPES_H__ #define __BASIC_TYPES_H__ -#define SUCCESS 0 -#define FAIL (-1) - #include <linux/types.h> #define NDIS_OID uint @@ -30,9 +27,6 @@ typedef void (*proc_t)(void *); #define FIELD_OFFSET(s, field) ((ssize_t)&((s *)(0))->field) -#define MEM_ALIGNMENT_OFFSET (sizeof(size_t)) -#define MEM_ALIGNMENT_PADDING (sizeof(size_t) - 1) - /* port from fw */ /* TODO: Macros Below are Sync from SD7-Driver. It is necessary * to check correctness */ diff --git a/drivers/staging/rtl8188eu/include/drv_types.h b/drivers/staging/rtl8188eu/include/drv_types.h index bcc74dcd8..0729bd40b 100644 --- a/drivers/staging/rtl8188eu/include/drv_types.h +++ b/drivers/staging/rtl8188eu/include/drv_types.h @@ -131,6 +131,7 @@ struct registry_priv { u8 if2name[16]; u8 notch_filter; + bool monitor_enable; }; /* For registry parameters */ @@ -209,6 +210,7 @@ struct adapter { void (*intf_start)(struct adapter *adapter); void (*intf_stop)(struct adapter *adapter); struct net_device *pnetdev; + struct net_device *pmondev; /* used by rtw_rereg_nd_name related function */ struct rereg_nd_name_data { diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h b/drivers/staging/rtl8188eu/include/hal_intf.h index e73c63412..1b1c10292 100644 --- a/drivers/staging/rtl8188eu/include/hal_intf.h +++ b/drivers/staging/rtl8188eu/include/hal_intf.h @@ -25,10 +25,10 @@ #include <Hal8188EPhyCfg.h> enum RTL871X_HCI_TYPE { - RTW_PCIE = BIT0, - RTW_USB = BIT1, - RTW_SDIO = BIT2, - RTW_GSPI = BIT3, + RTW_PCIE = BIT(0), + RTW_USB = BIT(1), + RTW_SDIO = BIT(2), + RTW_GSPI = BIT(3), }; enum _CHIP_TYPE { @@ -226,10 +226,10 @@ enum rt_eeprom_type { }; #define RF_CHANGE_BY_INIT 0 -#define RF_CHANGE_BY_IPS BIT28 -#define RF_CHANGE_BY_PS BIT29 -#define RF_CHANGE_BY_HW BIT30 -#define RF_CHANGE_BY_SW BIT31 +#define RF_CHANGE_BY_IPS BIT(28) +#define RF_CHANGE_BY_PS BIT(29) +#define RF_CHANGE_BY_HW BIT(30) +#define RF_CHANGE_BY_SW BIT(31) enum hardware_type { HARDWARE_TYPE_RTL8188EU, diff --git a/drivers/staging/rtl8188eu/include/ieee80211.h b/drivers/staging/rtl8188eu/include/ieee80211.h index 6400f7570..f8f5eb6b7 100644 --- a/drivers/staging/rtl8188eu/include/ieee80211.h +++ b/drivers/staging/rtl8188eu/include/ieee80211.h @@ -1092,8 +1092,8 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len, struct rtw_ieee802_11_elems *elems, int show_errors); -u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, - unsigned char *source, unsigned int *frlen); +u8 *rtw_set_fixed_ie(void *pbuf, unsigned int len, + void *source, unsigned int *frlen); u8 *rtw_set_ie(u8 *pbuf, int index, uint len, u8 *source, uint *frlen); enum secondary_ch_offset { diff --git a/drivers/staging/rtl8188eu/include/mon.h b/drivers/staging/rtl8188eu/include/mon.h new file mode 100644 index 000000000..f31fa688e --- /dev/null +++ b/drivers/staging/rtl8188eu/include/mon.h @@ -0,0 +1,36 @@ +/* + * RTL8188EU monitor interface + * + * Copyright (C) 2015 Jakub Sitnicki + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more + * details. + */ + +/* + * Monitor interface receives all transmitted and received IEEE 802.11 + * frames, both Data and Management, and passes them up to userspace + * preserving the WLAN headers. + */ + +#ifndef _MON_H_ +#define _MON_H_ + +struct net_device; +struct recv_frame; +struct xmit_frame; + +struct net_device *rtl88eu_mon_init(void); +void rtl88eu_mon_deinit(struct net_device *dev); + +void rtl88eu_mon_recv_hook(struct net_device *dev, struct recv_frame *frame); +void rtl88eu_mon_xmit_hook(struct net_device *dev, struct xmit_frame *frame, + uint frag_len); + +#endif /* _MON_H_ */ diff --git a/drivers/staging/rtl8188eu/include/odm.h b/drivers/staging/rtl8188eu/include/odm.h index 73ef9c759..bc970caf7 100644 --- a/drivers/staging/rtl8188eu/include/odm.h +++ b/drivers/staging/rtl8188eu/include/odm.h @@ -414,31 +414,31 @@ enum odm_common_info_def { enum odm_ability_def { /* BB ODM section BIT 0-15 */ - ODM_BB_DIG = BIT0, - ODM_BB_RA_MASK = BIT1, - ODM_BB_DYNAMIC_TXPWR = BIT2, - ODM_BB_FA_CNT = BIT3, - ODM_BB_RSSI_MONITOR = BIT4, - ODM_BB_CCK_PD = BIT5, - ODM_BB_ANT_DIV = BIT6, - ODM_BB_PWR_SAVE = BIT7, - ODM_BB_PWR_TRA = BIT8, - ODM_BB_RATE_ADAPTIVE = BIT9, - ODM_BB_PATH_DIV = BIT10, - ODM_BB_PSD = BIT11, - ODM_BB_RXHP = BIT12, + ODM_BB_DIG = BIT(0), + ODM_BB_RA_MASK = BIT(1), + ODM_BB_DYNAMIC_TXPWR = BIT(2), + ODM_BB_FA_CNT = BIT(3), + ODM_BB_RSSI_MONITOR = BIT(4), + ODM_BB_CCK_PD = BIT(5), + ODM_BB_ANT_DIV = BIT(6), + ODM_BB_PWR_SAVE = BIT(7), + ODM_BB_PWR_TRA = BIT(8), + ODM_BB_RATE_ADAPTIVE = BIT(9), + ODM_BB_PATH_DIV = BIT(10), + ODM_BB_PSD = BIT(11), + ODM_BB_RXHP = BIT(12), /* MAC DM section BIT 16-23 */ - ODM_MAC_EDCA_TURBO = BIT16, - ODM_MAC_EARLY_MODE = BIT17, + ODM_MAC_EDCA_TURBO = BIT(16), + ODM_MAC_EARLY_MODE = BIT(17), /* RF ODM section BIT 24-31 */ - ODM_RF_TX_PWR_TRACK = BIT24, - ODM_RF_RX_GAIN_TRACK = BIT25, - ODM_RF_CALIBRATION = BIT26, + ODM_RF_TX_PWR_TRACK = BIT(24), + ODM_RF_RX_GAIN_TRACK = BIT(25), + ODM_RF_CALIBRATION = BIT(26), }; -#define ODM_RTL8188E BIT4 +#define ODM_RTL8188E BIT(4) /* ODM_CMNINFO_CUT_VER */ enum odm_cut_version { @@ -460,14 +460,14 @@ enum odm_fab_Version { /* ODM_CMNINFO_RF_TYPE */ /* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */ enum odm_rf_path { - ODM_RF_TX_A = BIT0, - ODM_RF_TX_B = BIT1, - ODM_RF_TX_C = BIT2, - ODM_RF_TX_D = BIT3, - ODM_RF_RX_A = BIT4, - ODM_RF_RX_B = BIT5, - ODM_RF_RX_C = BIT6, - ODM_RF_RX_D = BIT7, + ODM_RF_TX_A = BIT(0), + ODM_RF_TX_B = BIT(1), + ODM_RF_TX_C = BIT(2), + ODM_RF_TX_D = BIT(3), + ODM_RF_RX_A = BIT(4), + ODM_RF_RX_B = BIT(5), + ODM_RF_RX_C = BIT(6), + ODM_RF_RX_D = BIT(7), }; enum odm_rf_type { @@ -498,33 +498,33 @@ enum odm_bt_coexist { /* ODM_CMNINFO_OP_MODE */ enum odm_operation_mode { - ODM_NO_LINK = BIT0, - ODM_LINK = BIT1, - ODM_SCAN = BIT2, - ODM_POWERSAVE = BIT3, - ODM_AP_MODE = BIT4, - ODM_CLIENT_MODE = BIT5, - ODM_AD_HOC = BIT6, - ODM_WIFI_DIRECT = BIT7, - ODM_WIFI_DISPLAY = BIT8, + ODM_NO_LINK = BIT(0), + ODM_LINK = BIT(1), + ODM_SCAN = BIT(2), + ODM_POWERSAVE = BIT(3), + ODM_AP_MODE = BIT(4), + ODM_CLIENT_MODE = BIT(5), + ODM_AD_HOC = BIT(6), + ODM_WIFI_DIRECT = BIT(7), + ODM_WIFI_DISPLAY = BIT(8), }; /* ODM_CMNINFO_WM_MODE */ enum odm_wireless_mode { ODM_WM_UNKNOW = 0x0, - ODM_WM_B = BIT0, - ODM_WM_G = BIT1, - ODM_WM_A = BIT2, - ODM_WM_N24G = BIT3, - ODM_WM_N5G = BIT4, - ODM_WM_AUTO = BIT5, - ODM_WM_AC = BIT6, + ODM_WM_B = BIT(0), + ODM_WM_G = BIT(1), + ODM_WM_A = BIT(2), + ODM_WM_N24G = BIT(3), + ODM_WM_N5G = BIT(4), + ODM_WM_AUTO = BIT(5), + ODM_WM_AC = BIT(6), }; /* ODM_CMNINFO_BAND */ enum odm_band_type { - ODM_BAND_2_4G = BIT0, - ODM_BAND_5G = BIT1, + ODM_BAND_2_4G = BIT(0), + ODM_BAND_5G = BIT(1), }; /* ODM_CMNINFO_SEC_CHNL_OFFSET */ diff --git a/drivers/staging/rtl8188eu/include/odm_debug.h b/drivers/staging/rtl8188eu/include/odm_debug.h index 914f831a5..e9390963d 100644 --- a/drivers/staging/rtl8188eu/include/odm_debug.h +++ b/drivers/staging/rtl8188eu/include/odm_debug.h @@ -57,30 +57,30 @@ /* Define the tracing components */ /* BB Functions */ -#define ODM_COMP_DIG BIT0 -#define ODM_COMP_RA_MASK BIT1 -#define ODM_COMP_DYNAMIC_TXPWR BIT2 -#define ODM_COMP_FA_CNT BIT3 -#define ODM_COMP_RSSI_MONITOR BIT4 -#define ODM_COMP_CCK_PD BIT5 -#define ODM_COMP_ANT_DIV BIT6 -#define ODM_COMP_PWR_SAVE BIT7 -#define ODM_COMP_PWR_TRA BIT8 -#define ODM_COMP_RATE_ADAPTIVE BIT9 -#define ODM_COMP_PATH_DIV BIT10 -#define ODM_COMP_PSD BIT11 -#define ODM_COMP_DYNAMIC_PRICCA BIT12 -#define ODM_COMP_RXHP BIT13 +#define ODM_COMP_DIG BIT(0) +#define ODM_COMP_RA_MASK BIT(1) +#define ODM_COMP_DYNAMIC_TXPWR BIT(2) +#define ODM_COMP_FA_CNT BIT(3) +#define ODM_COMP_RSSI_MONITOR BIT(4) +#define ODM_COMP_CCK_PD BIT(5) +#define ODM_COMP_ANT_DIV BIT(6) +#define ODM_COMP_PWR_SAVE BIT(7) +#define ODM_COMP_PWR_TRA BIT(8) +#define ODM_COMP_RATE_ADAPTIVE BIT(9) +#define ODM_COMP_PATH_DIV BIT(10) +#define ODM_COMP_PSD BIT(11) +#define ODM_COMP_DYNAMIC_PRICCA BIT(12) +#define ODM_COMP_RXHP BIT(13) /* MAC Functions */ -#define ODM_COMP_EDCA_TURBO BIT16 -#define ODM_COMP_EARLY_MODE BIT17 +#define ODM_COMP_EDCA_TURBO BIT(16) +#define ODM_COMP_EARLY_MODE BIT(17) /* RF Functions */ -#define ODM_COMP_TX_PWR_TRACK BIT24 -#define ODM_COMP_RX_GAIN_TRACK BIT25 -#define ODM_COMP_CALIBRATION BIT26 +#define ODM_COMP_TX_PWR_TRACK BIT(24) +#define ODM_COMP_RX_GAIN_TRACK BIT(25) +#define ODM_COMP_CALIBRATION BIT(26) /* Common Functions */ -#define ODM_COMP_COMMON BIT30 -#define ODM_COMP_INIT BIT31 +#define ODM_COMP_COMMON BIT(30) +#define ODM_COMP_INIT BIT(31) /*------------------------Export Marco Definition---------------------------*/ #define RT_PRINTK(fmt, args...) \ diff --git a/drivers/staging/rtl8188eu/include/odm_reg.h b/drivers/staging/rtl8188eu/include/odm_reg.h index 89bc46bc7..7f10b695c 100644 --- a/drivers/staging/rtl8188eu/include/odm_reg.h +++ b/drivers/staging/rtl8188eu/include/odm_reg.h @@ -112,7 +112,7 @@ /* Bitmap Definition */ /* */ -#define BIT_FA_RESET BIT0 +#define BIT_FA_RESET BIT(0) diff --git a/drivers/staging/rtl8188eu/include/osdep_service.h b/drivers/staging/rtl8188eu/include/osdep_service.h index cf9ca685e..e24fe8cc3 100644 --- a/drivers/staging/rtl8188eu/include/osdep_service.h +++ b/drivers/staging/rtl8188eu/include/osdep_service.h @@ -67,15 +67,6 @@ static inline struct list_head *get_list_head(struct __queue *queue) return &(queue->queue); } -static inline int _enter_critical_mutex(struct mutex *pmutex, - unsigned long *pirqL) -{ - int ret; - - ret = mutex_lock_interruptible(pmutex); - return ret; -} - static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) { return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && @@ -84,45 +75,6 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)); } - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 -#define BIT32 0x0100000000 -#define BIT33 0x0200000000 -#define BIT34 0x0400000000 -#define BIT35 0x0800000000 -#define BIT36 0x1000000000 - int RTW_STATUS_CODE(int error_code); #define rtw_update_mem_stat(flag, sz) do {} while (0) diff --git a/drivers/staging/rtl8188eu/include/pwrseq.h b/drivers/staging/rtl8188eu/include/pwrseq.h index 43db92dcb..8c876c6c7 100644 --- a/drivers/staging/rtl8188eu/include/pwrseq.h +++ b/drivers/staging/rtl8188eu/include/pwrseq.h @@ -65,31 +65,31 @@ * comment here */ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1}, \ + PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)}, \ /* wait till 0x04[17] = 1 power ready*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0) | BIT(1), 0}, \ /* 0x02[1:0] = 0 reset BB*/ \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)}, \ /*0x24[23] = 2b'01 schmit trigger */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0}, \ /* 0x04[15] = 0 disable HWPDN (control by DRV)*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4) | BIT(3), 0}, \ /*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, \ /*0x04[8] = 1 polling until return 0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0}, \ /*wait till 0x04[8] = 0*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, \ /*LDO normal mode*/ \ {0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, \ /*SDIO Driving*/ #define RTL8188E_TRANS_ACT_TO_CARDEMU \ @@ -102,13 +102,13 @@ PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, \ /*0x1F[7:0] = 0 turn off RF*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, \ /*LDO Sleep mode*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, \ /*0x04[9] = 1 turn off MAC by HW state machine*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), 0}, \ /*wait till 0x04[9] = 0 polling until return 0 to disable*/ #define RTL8188E_TRANS_CARDEMU_TO_SUS \ @@ -119,28 +119,28 @@ */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \ + PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)}, \ /* 0x04[12:11] = 2b'01enable WL suspend */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) | BIT(4)}, \ /* 0x04[12:11] = 2b'11enable WL suspend for PCIe */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, 0xFF, BIT7}, \ + PWR_CMD_WRITE, 0xFF, BIT(7)}, \ /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, BIT4, 0}, \ + PWR_CMD_WRITE, BIT(4), 0}, \ /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, BIT4, BIT4}, \ + PWR_CMD_WRITE, BIT(4), BIT(4)}, \ /*Set USB suspend enable local register 0xfe10[4]=1 */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, \ /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, \ /*wait power state to suspend*/ #define RTL8188E_TRANS_SUS_TO_CARDEMU \ @@ -150,13 +150,13 @@ * comments here */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, \ /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, \ + PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, \ /*wait power state to suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, \ /*0x04[12:11] = 2b'01enable WL suspend*/ #define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ @@ -166,11 +166,11 @@ * comments here */ \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)}, \ /*0x24[23] = 2b'01 schmit trigger */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \ + PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)}, \ /*0x04[12:11] = 2b'01 enable WL suspend*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ @@ -178,16 +178,16 @@ /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \ PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \ - PWR_CMD_WRITE, BIT4, 0}, \ + PWR_CMD_WRITE, BIT(4), 0}, \ /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, \ /*Set USB suspend enable local register 0xfe10[4]=1 */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, \ /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, \ /*wait power state to suspend*/ #define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ @@ -197,13 +197,13 @@ * comments here */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, \ + PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, \ /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \ - PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, \ + PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, \ /*wait power state to suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, \ /*0x04[12:11] = 2b'01enable WL suspend*/ #define RTL8188E_TRANS_CARDEMU_TO_PDN \ @@ -213,10 +213,10 @@ * comments here */ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, \ /* 0x04[16] = 0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)}, \ /* 0x04[15] = 1*/ #define RTL8188E_TRANS_PDN_TO_CARDEMU \ @@ -226,7 +226,7 @@ * comments here */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0}, \ /* 0x04[15] = 0*/ /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ @@ -251,7 +251,7 @@ PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0}, \ /*Should be zero if no packet is transmitting*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, \ /*CCK and OFDM are disabled,and clock are gated*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, \ @@ -259,9 +259,9 @@ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/\ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*check if removed later*/\ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)}, \ /*Respond TxOK to scheduler*/ @@ -280,22 +280,22 @@ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, \ /* 0x08[4] = 0 switch TSF to 40M */ \ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), 0}, \ /* Polling 0x109[7]=0 TSF in 40M */ \ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6) | BIT(7), 0}, \ /* 0x29[7:6] = 2b'00 enable BB clock */ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, \ /* 0x101[1] = 1 */ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, \ /* 0x100[7:0] = 0xFF enable WMAC TRX */ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ - PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, \ + PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0)}, \ /* 0x02[1:0] = 2b'11 enable BB macro */ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h index 2c33eb30d..beeee4a6b 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h @@ -19,43 +19,6 @@ #ifndef __RTL8188E_SPEC_H__ #define __RTL8188E_SPEC_H__ -#ifndef BIT -#define BIT(x) (1 << (x)) -#endif - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - /* 8192C Regsiter offset definition */ #define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */ @@ -481,14 +444,14 @@ #define MAX_MSS_DENSITY_1T 0x0A /* EEPROM enable when set 1 */ -#define CmdEEPROM_En BIT5 +#define CmdEEPROM_En BIT(5) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 */ -#define CmdEERPOMSEL BIT4 -#define Cmd9346CR_9356SEL BIT4 +#define CmdEERPOMSEL BIT(4) +#define Cmd9346CR_9356SEL BIT(4) /* 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) */ #define GPIOSEL_GPIO 0 -#define GPIOSEL_ENBT BIT5 +#define GPIOSEL_ENBT BIT(5) /* 8192C GPIO PIN Control Register (offset 0x44, 4 byte) */ /* GPIO pins input value */ @@ -501,18 +464,18 @@ #define GPIO_MOD (REG_GPIO_PIN_CTRL+3) /* 8723/8188E Host System Interrupt Mask Register (offset 0x58, 32 byte) */ -#define HSIMR_GPIO12_0_INT_EN BIT0 -#define HSIMR_SPS_OCP_INT_EN BIT5 -#define HSIMR_RON_INT_EN BIT6 -#define HSIMR_PDN_INT_EN BIT7 -#define HSIMR_GPIO9_INT_EN BIT25 +#define HSIMR_GPIO12_0_INT_EN BIT(0) +#define HSIMR_SPS_OCP_INT_EN BIT(5) +#define HSIMR_RON_INT_EN BIT(6) +#define HSIMR_PDN_INT_EN BIT(7) +#define HSIMR_GPIO9_INT_EN BIT(25) /* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */ -#define HSISR_GPIO12_0_INT BIT0 -#define HSISR_SPS_OCP_INT BIT5 -#define HSISR_RON_INT_EN BIT6 -#define HSISR_PDNINT BIT7 -#define HSISR_GPIO9_INT BIT25 +#define HSISR_GPIO12_0_INT BIT(0) +#define HSISR_SPS_OCP_INT BIT(5) +#define HSISR_RON_INT_EN BIT(6) +#define HSISR_PDNINT BIT(7) +#define HSISR_GPIO9_INT BIT(25) /* 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) */ /* @@ -537,51 +500,51 @@ Default: 00b. /* 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) */ /* IOL config for REG_FDHM0(Reg0x88) */ -#define CMD_INIT_LLT BIT0 -#define CMD_READ_EFUSE_MAP BIT1 -#define CMD_EFUSE_PATCH BIT2 -#define CMD_IOCONFIG BIT3 -#define CMD_INIT_LLT_ERR BIT4 -#define CMD_READ_EFUSE_MAP_ERR BIT5 -#define CMD_EFUSE_PATCH_ERR BIT6 -#define CMD_IOCONFIG_ERR BIT7 +#define CMD_INIT_LLT BIT(0) +#define CMD_READ_EFUSE_MAP BIT(1) +#define CMD_EFUSE_PATCH BIT(2) +#define CMD_IOCONFIG BIT(3) +#define CMD_INIT_LLT_ERR BIT(4) +#define CMD_READ_EFUSE_MAP_ERR BIT(5) +#define CMD_EFUSE_PATCH_ERR BIT(6) +#define CMD_IOCONFIG_ERR BIT(7) /* 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) */ /* 8192C Response Rate Set Register (offset 0x181, 24bits) */ -#define RRSR_1M BIT0 -#define RRSR_2M BIT1 -#define RRSR_5_5M BIT2 -#define RRSR_11M BIT3 -#define RRSR_6M BIT4 -#define RRSR_9M BIT5 -#define RRSR_12M BIT6 -#define RRSR_18M BIT7 -#define RRSR_24M BIT8 -#define RRSR_36M BIT9 -#define RRSR_48M BIT10 -#define RRSR_54M BIT11 -#define RRSR_MCS0 BIT12 -#define RRSR_MCS1 BIT13 -#define RRSR_MCS2 BIT14 -#define RRSR_MCS3 BIT15 -#define RRSR_MCS4 BIT16 -#define RRSR_MCS5 BIT17 -#define RRSR_MCS6 BIT18 -#define RRSR_MCS7 BIT19 +#define RRSR_1M BIT(0) +#define RRSR_2M BIT(1) +#define RRSR_5_5M BIT(2) +#define RRSR_11M BIT(3) +#define RRSR_6M BIT(4) +#define RRSR_9M BIT(5) +#define RRSR_12M BIT(6) +#define RRSR_18M BIT(7) +#define RRSR_24M BIT(8) +#define RRSR_36M BIT(9) +#define RRSR_48M BIT(10) +#define RRSR_54M BIT(11) +#define RRSR_MCS0 BIT(12) +#define RRSR_MCS1 BIT(13) +#define RRSR_MCS2 BIT(14) +#define RRSR_MCS3 BIT(15) +#define RRSR_MCS4 BIT(16) +#define RRSR_MCS5 BIT(17) +#define RRSR_MCS6 BIT(18) +#define RRSR_MCS7 BIT(19) /* 8192C Response Rate Set Register (offset 0x1BF, 8bits) */ /* WOL bit information */ -#define HAL92C_WOL_PTK_UPDATE_EVENT BIT0 -#define HAL92C_WOL_GTK_UPDATE_EVENT BIT1 +#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0) +#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1) /* 8192C BW_OPMODE bits (Offset 0x203, 8bit) */ -#define BW_OPMODE_20MHZ BIT2 -#define BW_OPMODE_5G BIT1 +#define BW_OPMODE_20MHZ BIT(2) +#define BW_OPMODE_5G BIT(1) /* 8192C CAM Config Setting (offset 0x250, 1 byte) */ -#define CAM_VALID BIT15 +#define CAM_VALID BIT(15) #define CAM_NOTVALID 0x0000 -#define CAM_USEDK BIT5 +#define CAM_USEDK BIT(5) #define CAM_CONTENT_COUNT 8 @@ -598,69 +561,69 @@ Default: 00b. #define CAM_CONFIG_USEDK true #define CAM_CONFIG_NO_USEDK false -#define CAM_WRITE BIT16 +#define CAM_WRITE BIT(16) #define CAM_READ 0x00000000 -#define CAM_POLLINIG BIT31 +#define CAM_POLLINIG BIT(31) #define SCR_UseDK 0x01 #define SCR_TxSecEnable 0x02 #define SCR_RxSecEnable 0x04 /* 10. Power Save Control Registers (Offset: 0x0260 - 0x02DF) */ -#define WOW_PMEN BIT0 /* Power management Enable. */ -#define WOW_WOMEN BIT1 /* WoW function on or off. */ -#define WOW_MAGIC BIT2 /* Magic packet */ -#define WOW_UWF BIT3 /* Unicast Wakeup frame. */ +#define WOW_PMEN BIT(0) /* Power management Enable. */ +#define WOW_WOMEN BIT(1) /* WoW function on or off. */ +#define WOW_MAGIC BIT(2) /* Magic packet */ +#define WOW_UWF BIT(3) /* Unicast Wakeup frame. */ /* 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) */ /* 8188 IMR/ISR bits */ #define IMR_DISABLED_88E 0x0 /* IMR DW0(0x0060-0063) Bit 0-31 */ -#define IMR_TXCCK_88E BIT30 /* TXRPT interrupt when CCX bit of the packet is set */ -#define IMR_PSTIMEOUT_88E BIT29 /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_88E BIT28 /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_88E BIT27 /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TBDER_88E BIT26 /* Transmit Beacon0 Error */ -#define IMR_TBDOK_88E BIT25 /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_88E BIT24 /* TSF Timer BIT32 toggle indication interrupt */ -#define IMR_BCNDMAINT0_88E BIT20 /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_88E BIT16 /* Beacon Queue DMA Error 0 */ -#define IMR_HSISR_IND_ON_INT_88E BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_88E BIT12 /* CTWidnow End or ATIM Window End */ -#define IMR_HISR1_IND_INT_88E BIT11 /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */ -#define IMR_C2HCMD_88E BIT10 /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_88E BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_88E BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_88E BIT7 /* High Queue DMA OK */ -#define IMR_MGNTDOK_88E BIT6 /* Management Queue DMA OK */ -#define IMR_BKDOK_88E BIT5 /* AC_BK DMA OK */ -#define IMR_BEDOK_88E BIT4 /* AC_BE DMA OK */ -#define IMR_VIDOK_88E BIT3 /* AC_VI DMA OK */ -#define IMR_VODOK_88E BIT2 /* AC_VO DMA OK */ -#define IMR_RDU_88E BIT1 /* Rx Descriptor Unavailable */ -#define IMR_ROK_88E BIT0 /* Receive DMA OK */ +#define IMR_TXCCK_88E BIT(30) /* TXRPT interrupt when CCX bit of the packet is set */ +#define IMR_PSTIMEOUT_88E BIT(29) /* Power Save Time Out Interrupt */ +#define IMR_GTINT4_88E BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ +#define IMR_GTINT3_88E BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ +#define IMR_TBDER_88E BIT(26) /* Transmit Beacon0 Error */ +#define IMR_TBDOK_88E BIT(25) /* Transmit Beacon0 OK */ +#define IMR_TSF_BIT32_TOGGLE_88E BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ +#define IMR_BCNDMAINT0_88E BIT(20) /* Beacon DMA Interrupt 0 */ +#define IMR_BCNDERR0_88E BIT(16) /* Beacon Queue DMA Error 0 */ +#define IMR_HSISR_IND_ON_INT_88E BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ +#define IMR_BCNDMAINT_E_88E BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ +#define IMR_ATIMEND_88E BIT(12) /* CTWidnow End or ATIM Window End */ +#define IMR_HISR1_IND_INT_88E BIT(11) /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */ +#define IMR_C2HCMD_88E BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ +#define IMR_CPWM2_88E BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ +#define IMR_CPWM_88E BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ +#define IMR_HIGHDOK_88E BIT(7) /* High Queue DMA OK */ +#define IMR_MGNTDOK_88E BIT(6) /* Management Queue DMA OK */ +#define IMR_BKDOK_88E BIT(5) /* AC_BK DMA OK */ +#define IMR_BEDOK_88E BIT(4) /* AC_BE DMA OK */ +#define IMR_VIDOK_88E BIT(3) /* AC_VI DMA OK */ +#define IMR_VODOK_88E BIT(2) /* AC_VO DMA OK */ +#define IMR_RDU_88E BIT(1) /* Rx Descriptor Unavailable */ +#define IMR_ROK_88E BIT(0) /* Receive DMA OK */ /* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_88E BIT27 /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_88E BIT26 /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_88E BIT25 /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_88E BIT24 /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_88E BIT23 /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_88E BIT22 /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_88E BIT21 /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDERR7_88E BIT20 /* Beacon DMA Error Int 7 */ -#define IMR_BCNDERR6_88E BIT19 /* Beacon DMA Error Int 6 */ -#define IMR_BCNDERR5_88E BIT18 /* Beacon DMA Error Int 5 */ -#define IMR_BCNDERR4_88E BIT17 /* Beacon DMA Error Int 4 */ -#define IMR_BCNDERR3_88E BIT16 /* Beacon DMA Error Int 3 */ -#define IMR_BCNDERR2_88E BIT15 /* Beacon DMA Error Int 2 */ -#define IMR_BCNDERR1_88E BIT14 /* Beacon DMA Error Int 1 */ -#define IMR_ATIMEND_E_88E BIT13 /* ATIM Window End Ext for Win7 */ -#define IMR_TXERR_88E BIT11 /* Tx Err Flag Int Status, write 1 clear. */ -#define IMR_RXERR_88E BIT10 /* Rx Err Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_88E BIT9 /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_88E BIT8 /* Receive FIFO Overflow */ +#define IMR_BCNDMAINT7_88E BIT(27) /* Beacon DMA Interrupt 7 */ +#define IMR_BCNDMAINT6_88E BIT(26) /* Beacon DMA Interrupt 6 */ +#define IMR_BCNDMAINT5_88E BIT(25) /* Beacon DMA Interrupt 5 */ +#define IMR_BCNDMAINT4_88E BIT(24) /* Beacon DMA Interrupt 4 */ +#define IMR_BCNDMAINT3_88E BIT(23) /* Beacon DMA Interrupt 3 */ +#define IMR_BCNDMAINT2_88E BIT(22) /* Beacon DMA Interrupt 2 */ +#define IMR_BCNDMAINT1_88E BIT(21) /* Beacon DMA Interrupt 1 */ +#define IMR_BCNDERR7_88E BIT(20) /* Beacon DMA Error Int 7 */ +#define IMR_BCNDERR6_88E BIT(19) /* Beacon DMA Error Int 6 */ +#define IMR_BCNDERR5_88E BIT(18) /* Beacon DMA Error Int 5 */ +#define IMR_BCNDERR4_88E BIT(17) /* Beacon DMA Error Int 4 */ +#define IMR_BCNDERR3_88E BIT(16) /* Beacon DMA Error Int 3 */ +#define IMR_BCNDERR2_88E BIT(15) /* Beacon DMA Error Int 2 */ +#define IMR_BCNDERR1_88E BIT(14) /* Beacon DMA Error Int 1 */ +#define IMR_ATIMEND_E_88E BIT(13) /* ATIM Window End Ext for Win7 */ +#define IMR_TXERR_88E BIT(11) /* Tx Err Flag Int Status, write 1 clear. */ +#define IMR_RXERR_88E BIT(10) /* Rx Err Flag INT Status, Write 1 clear */ +#define IMR_TXFOVW_88E BIT(9) /* Transmit FIFO Overflow */ +#define IMR_RXFOVW_88E BIT(8) /* Receive FIFO Overflow */ #define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF /* The value when the NIC is unplugged for PCI. */ @@ -696,40 +659,40 @@ Current IOREG MAP /* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, * and BK - Bit3. */ /* 8723 and 88E may be not correct either in the earlier version. */ -#define StopBecon BIT6 -#define StopHigh BIT5 -#define StopMgt BIT4 -#define StopBK BIT3 -#define StopBE BIT2 -#define StopVI BIT1 -#define StopVO BIT0 +#define StopBecon BIT(6) +#define StopHigh BIT(5) +#define StopMgt BIT(4) +#define StopBK BIT(3) +#define StopBE BIT(2) +#define StopVI BIT(1) +#define StopVO BIT(0) /* 8192C (RCR) Receive Configuration Register(Offset 0x608, 32 bits) */ -#define RCR_APPFCS BIT31 /* WMAC append FCS after payload */ -#define RCR_APP_MIC BIT30 -#define RCR_APP_PHYSTS BIT28 -#define RCR_APP_ICV BIT29 -#define RCR_APP_PHYST_RXFF BIT28 -#define RCR_APP_BA_SSN BIT27 /* Accept BA SSN */ -#define RCR_ENMBID BIT24 /* Enable Multiple BssId. */ -#define RCR_LSIGEN BIT23 -#define RCR_MFBEN BIT22 -#define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC=1 MFC-->HTC=0 */ -#define RCR_AMF BIT13 /* Accept management type frame */ -#define RCR_ACF BIT12 /* Accept control type frame */ -#define RCR_ADF BIT11 /* Accept data type frame */ -#define RCR_AICV BIT9 /* Accept ICV error packet */ -#define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */ -#define RCR_CBSSID_BCN BIT7 /* Accept BSSID match packet +#define RCR_APPFCS BIT(31) /* WMAC append FCS after payload */ +#define RCR_APP_MIC BIT(30) +#define RCR_APP_PHYSTS BIT(28) +#define RCR_APP_ICV BIT(29) +#define RCR_APP_PHYST_RXFF BIT(28) +#define RCR_APP_BA_SSN BIT(27) /* Accept BA SSN */ +#define RCR_ENMBID BIT(24) /* Enable Multiple BssId. */ +#define RCR_LSIGEN BIT(23) +#define RCR_MFBEN BIT(22) +#define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */ +#define RCR_AMF BIT(13) /* Accept management type frame */ +#define RCR_ACF BIT(12) /* Accept control type frame */ +#define RCR_ADF BIT(11) /* Accept data type frame */ +#define RCR_AICV BIT(9) /* Accept ICV error packet */ +#define RCR_ACRC32 BIT(8) /* Accept CRC32 error packet */ +#define RCR_CBSSID_BCN BIT(7) /* Accept BSSID match packet * (Rx beacon, probe rsp) */ -#define RCR_CBSSID_DATA BIT6 /* Accept BSSID match (Data)*/ +#define RCR_CBSSID_DATA BIT(6) /* Accept BSSID match (Data)*/ #define RCR_CBSSID RCR_CBSSID_DATA /* Accept BSSID match */ -#define RCR_APWRMGT BIT5 /* Accept power management pkt*/ -#define RCR_ADD3 BIT4 /* Accept address 3 match pkt */ -#define RCR_AB BIT3 /* Accept broadcast packet */ -#define RCR_AM BIT2 /* Accept multicast packet */ -#define RCR_APM BIT1 /* Accept physical match pkt */ -#define RCR_AAP BIT0 /* Accept all unicast packet */ +#define RCR_APWRMGT BIT(5) /* Accept power management pkt*/ +#define RCR_ADD3 BIT(4) /* Accept address 3 match pkt */ +#define RCR_AB BIT(3) /* Accept broadcast packet */ +#define RCR_AM BIT(2) /* Accept multicast packet */ +#define RCR_APM BIT(1) /* Accept physical match pkt */ +#define RCR_AAP BIT(0) /* Accept all unicast packet */ #define RCR_MXDMA_OFFSET 8 #define RCR_FIFO_OFFSET 13 @@ -1197,56 +1160,56 @@ Current IOREG MAP #define SDIO_HIMR_DISABLED 0 /* RTL8188E SDIO Host Interrupt Mask Register */ -#define SDIO_HIMR_RX_REQUEST_MSK BIT0 -#define SDIO_HIMR_AVAL_MSK BIT1 -#define SDIO_HIMR_TXERR_MSK BIT2 -#define SDIO_HIMR_RXERR_MSK BIT3 -#define SDIO_HIMR_TXFOVW_MSK BIT4 -#define SDIO_HIMR_RXFOVW_MSK BIT5 -#define SDIO_HIMR_TXBCNOK_MSK BIT6 -#define SDIO_HIMR_TXBCNERR_MSK BIT7 -#define SDIO_HIMR_BCNERLY_INT_MSK BIT16 -#define SDIO_HIMR_C2HCMD_MSK BIT17 -#define SDIO_HIMR_CPWM1_MSK BIT18 -#define SDIO_HIMR_CPWM2_MSK BIT19 -#define SDIO_HIMR_HSISR_IND_MSK BIT20 -#define SDIO_HIMR_GTINT3_IND_MSK BIT21 -#define SDIO_HIMR_GTINT4_IND_MSK BIT22 -#define SDIO_HIMR_PSTIMEOUT_MSK BIT23 -#define SDIO_HIMR_OCPINT_MSK BIT24 -#define SDIO_HIMR_ATIMEND_MSK BIT25 -#define SDIO_HIMR_ATIMEND_E_MSK BIT26 -#define SDIO_HIMR_CTWEND_MSK BIT27 +#define SDIO_HIMR_RX_REQUEST_MSK BIT(0) +#define SDIO_HIMR_AVAL_MSK BIT(1) +#define SDIO_HIMR_TXERR_MSK BIT(2) +#define SDIO_HIMR_RXERR_MSK BIT(3) +#define SDIO_HIMR_TXFOVW_MSK BIT(4) +#define SDIO_HIMR_RXFOVW_MSK BIT(5) +#define SDIO_HIMR_TXBCNOK_MSK BIT(6) +#define SDIO_HIMR_TXBCNERR_MSK BIT(7) +#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16) +#define SDIO_HIMR_C2HCMD_MSK BIT(17) +#define SDIO_HIMR_CPWM1_MSK BIT(18) +#define SDIO_HIMR_CPWM2_MSK BIT(19) +#define SDIO_HIMR_HSISR_IND_MSK BIT(20) +#define SDIO_HIMR_GTINT3_IND_MSK BIT(21) +#define SDIO_HIMR_GTINT4_IND_MSK BIT(22) +#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23) +#define SDIO_HIMR_OCPINT_MSK BIT(24) +#define SDIO_HIMR_ATIMEND_MSK BIT(25) +#define SDIO_HIMR_ATIMEND_E_MSK BIT(26) +#define SDIO_HIMR_CTWEND_MSK BIT(27) /* RTL8188E SDIO Specific */ -#define SDIO_HIMR_MCU_ERR_MSK BIT28 -#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT29 +#define SDIO_HIMR_MCU_ERR_MSK BIT(28) +#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29) /* SDIO Host Interrupt Service Routine */ -#define SDIO_HISR_RX_REQUEST BIT0 -#define SDIO_HISR_AVAL BIT1 -#define SDIO_HISR_TXERR BIT2 -#define SDIO_HISR_RXERR BIT3 -#define SDIO_HISR_TXFOVW BIT4 -#define SDIO_HISR_RXFOVW BIT5 -#define SDIO_HISR_TXBCNOK BIT6 -#define SDIO_HISR_TXBCNERR BIT7 -#define SDIO_HISR_BCNERLY_INT BIT16 -#define SDIO_HISR_C2HCMD BIT17 -#define SDIO_HISR_CPWM1 BIT18 -#define SDIO_HISR_CPWM2 BIT19 -#define SDIO_HISR_HSISR_IND BIT20 -#define SDIO_HISR_GTINT3_IND BIT21 -#define SDIO_HISR_GTINT4_IND BIT22 -#define SDIO_HISR_PSTIME BIT23 -#define SDIO_HISR_OCPINT BIT24 -#define SDIO_HISR_ATIMEND BIT25 -#define SDIO_HISR_ATIMEND_E BIT26 -#define SDIO_HISR_CTWEND BIT27 +#define SDIO_HISR_RX_REQUEST BIT(0) +#define SDIO_HISR_AVAL BIT(1) +#define SDIO_HISR_TXERR BIT(2) +#define SDIO_HISR_RXERR BIT(3) +#define SDIO_HISR_TXFOVW BIT(4) +#define SDIO_HISR_RXFOVW BIT(5) +#define SDIO_HISR_TXBCNOK BIT(6) +#define SDIO_HISR_TXBCNERR BIT(7) +#define SDIO_HISR_BCNERLY_INT BIT(16) +#define SDIO_HISR_C2HCMD BIT(17) +#define SDIO_HISR_CPWM1 BIT(18) +#define SDIO_HISR_CPWM2 BIT(19) +#define SDIO_HISR_HSISR_IND BIT(20) +#define SDIO_HISR_GTINT3_IND BIT(21) +#define SDIO_HISR_GTINT4_IND BIT(22) +#define SDIO_HISR_PSTIME BIT(23) +#define SDIO_HISR_OCPINT BIT(24) +#define SDIO_HISR_ATIMEND BIT(25) +#define SDIO_HISR_ATIMEND_E BIT(26) +#define SDIO_HISR_CTWEND BIT(27) /* RTL8188E SDIO Specific */ -#define SDIO_HISR_MCU_ERR BIT28 -#define SDIO_HISR_TSF_BIT32_TOGGLE BIT29 +#define SDIO_HISR_MCU_ERR BIT(28) +#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) #define MASK_SDIO_HISR_CLEAR \ (SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\ @@ -1256,8 +1219,8 @@ Current IOREG MAP SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT) /* SDIO HCI Suspend Control Register */ -#define HCI_RESUME_PWR_RDY BIT1 -#define HCI_SUS_CTRL BIT0 +#define HCI_RESUME_PWR_RDY BIT(1) +#define HCI_SUS_CTRL BIT(0) /* SDIO Tx FIFO related */ /* The number of Tx FIFO free page */ @@ -1291,33 +1254,33 @@ Current IOREG MAP /* 2REG_MULTI_FUNC_CTRL(For RTL8723 Only) */ /* Enable GPIO[9] as WiFi HW PDn source */ -#define WL_HWPDN_EN BIT0 +#define WL_HWPDN_EN BIT(0) /* WiFi HW PDn polarity control */ -#define WL_HWPDN_SL BIT1 +#define WL_HWPDN_SL BIT(1) /* WiFi function enable */ -#define WL_FUNC_EN BIT2 +#define WL_FUNC_EN BIT(2) /* Enable GPIO[9] as WiFi RF HW PDn source */ -#define WL_HWROF_EN BIT3 +#define WL_HWROF_EN BIT(3) /* Enable GPIO[11] as BT HW PDn source */ -#define BT_HWPDN_EN BIT16 +#define BT_HWPDN_EN BIT(16) /* BT HW PDn polarity control */ -#define BT_HWPDN_SL BIT17 +#define BT_HWPDN_SL BIT(17) /* BT function enable */ -#define BT_FUNC_EN BIT18 +#define BT_FUNC_EN BIT(18) /* Enable GPIO[11] as BT/GPS RF HW PDn source */ -#define BT_HWROF_EN BIT19 +#define BT_HWROF_EN BIT(19) /* Enable GPIO[10] as GPS HW PDn source */ -#define GPS_HWPDN_EN BIT20 +#define GPS_HWPDN_EN BIT(20) /* GPS HW PDn polarity control */ -#define GPS_HWPDN_SL BIT21 +#define GPS_HWPDN_SL BIT(21) /* GPS function enable */ -#define GPS_FUNC_EN BIT22 +#define GPS_FUNC_EN BIT(22) /* 3 REG_LIFECTRL_CTRL */ -#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 -#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 -#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 -#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 +#define HAL92C_EN_PKT_LIFE_TIME_BK BIT(3) +#define HAL92C_EN_PKT_LIFE_TIME_BE BIT(2) +#define HAL92C_EN_PKT_LIFE_TIME_VI BIT(1) +#define HAL92C_EN_PKT_LIFE_TIME_VO BIT(0) #define HAL92C_MSDU_LIFE_TIME_UNIT 128 /* in us */ @@ -1327,7 +1290,7 @@ Current IOREG MAP #define POLLING_LLT_THRESHOLD 20 #define POLLING_READY_TIMEOUT_COUNT 1000 /* GPIO BIT */ -#define HAL_8192C_HW_GPIO_WPS_BIT BIT2 +#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) /* 8192C EEPROM/EFUSE share register definition. */ diff --git a/drivers/staging/rtl8188eu/include/rtw_security.h b/drivers/staging/rtl8188eu/include/rtw_security.h index abe7e21e6..a1aebe6c8 100644 --- a/drivers/staging/rtl8188eu/include/rtw_security.h +++ b/drivers/staging/rtl8188eu/include/rtw_security.h @@ -336,9 +336,6 @@ static const unsigned long K[64] = { #define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) #define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) #define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) -#ifndef MIN -#define MIN(x, y) (((x) < (y)) ? (x) : (y)) -#endif void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key); void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b); diff --git a/drivers/staging/rtl8188eu/include/rtw_sreset.h b/drivers/staging/rtl8188eu/include/rtw_sreset.h index 580e85051..3a62ed010 100644 --- a/drivers/staging/rtl8188eu/include/rtw_sreset.h +++ b/drivers/staging/rtl8188eu/include/rtw_sreset.h @@ -30,13 +30,13 @@ struct sreset_priv { #include <rtl8188e_hal.h> #define WIFI_STATUS_SUCCESS 0 -#define USB_VEN_REQ_CMD_FAIL BIT0 -#define USB_READ_PORT_FAIL BIT1 -#define USB_WRITE_PORT_FAIL BIT2 -#define WIFI_MAC_TXDMA_ERROR BIT3 -#define WIFI_TX_HANG BIT4 -#define WIFI_RX_HANG BIT5 -#define WIFI_IF_NOT_EXIST BIT6 +#define USB_VEN_REQ_CMD_FAIL BIT(0) +#define USB_READ_PORT_FAIL BIT(1) +#define USB_WRITE_PORT_FAIL BIT(2) +#define WIFI_MAC_TXDMA_ERROR BIT(3) +#define WIFI_TX_HANG BIT(4) +#define WIFI_RX_HANG BIT(5) +#define WIFI_IF_NOT_EXIST BIT(6) void sreset_init_value(struct adapter *padapter); u8 sreset_get_wifi_status(struct adapter *padapter); diff --git a/drivers/staging/rtl8188eu/include/wifi.h b/drivers/staging/rtl8188eu/include/wifi.h index dba8af1ec..6cb5beca1 100644 --- a/drivers/staging/rtl8188eu/include/wifi.h +++ b/drivers/staging/rtl8188eu/include/wifi.h @@ -20,18 +20,7 @@ #ifndef _WIFI_H_ #define _WIFI_H_ - -#ifdef BIT -/* error "BIT define occurred earlier elsewhere!\n" */ -#undef BIT -#endif -#define BIT(x) (1 << (x)) - - -#define WLAN_ETHHDR_LEN 14 -#define WLAN_ETHADDR_LEN 6 #define WLAN_IEEE_OUI_LEN 3 -#define WLAN_ADDR_LEN 6 #define WLAN_CRC_LEN 4 #define WLAN_BSSID_LEN 6 #define WLAN_BSS_TS_LEN 8 @@ -47,7 +36,6 @@ #define WLAN_MIN_ETHFRM_LEN 60 #define WLAN_MAX_ETHFRM_LEN 1514 -#define WLAN_ETHHDR_LEN 14 #define P80211CAPTURE_VERSION 0x80211001 diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c index 969574926..a076ede50 100644 --- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c @@ -457,7 +457,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; if (param->u.crypt.set_tx == 1) { /* pairwise key */ - memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); if (strcmp(param->u.crypt.alg, "TKIP") == 0) { /* set mic key */ memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); @@ -469,7 +469,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, rtw_setstakey_cmd(padapter, (unsigned char *)psta, true); } else { /* group key */ - memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16 )); memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); padapter->securitypriv.binstallGrpkey = true; @@ -604,7 +604,7 @@ static int rtw_set_wpa_ie(struct adapter *padapter, char *pie, unsigned short ie if ((eid == _VENDOR_SPECIFIC_IE_) && (!memcmp(&buf[cnt+2], wps_oui, 4))) { DBG_88E("SET WPS_IE\n"); - padapter->securitypriv.wps_ie_len = ((buf[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (buf[cnt+1]+2) : (MAX_WPA_IE_LEN<<2); + padapter->securitypriv.wps_ie_len = min(buf[cnt + 1] + 2, MAX_WPA_IE_LEN << 2); memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); @@ -1321,7 +1321,7 @@ static int rtw_wx_set_essid(struct net_device *dev, authmode = padapter->securitypriv.ndisauthtype; DBG_88E("=>%s\n", __func__); if (wrqu->essid.flags && wrqu->essid.length) { - len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE; + len = min_t(uint, wrqu->essid.length, IW_ESSID_MAX_SIZE); if (wrqu->essid.length != 33) DBG_88E("ssid =%s, len =%d\n", extra, wrqu->essid.length); @@ -2335,7 +2335,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, DBG_88E("%s, set group_key, WEP\n", __func__); memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if (param->u.crypt.key_len == 13) @@ -2344,7 +2344,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, DBG_88E("%s, set group_key, TKIP\n", __func__); psecuritypriv->dot118021XGrpPrivacy = _TKIP_; memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); /* set mic key */ memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); @@ -2354,7 +2354,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, DBG_88E("%s, set group_key, CCMP\n", __func__); psecuritypriv->dot118021XGrpPrivacy = _AES_; memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); } else { DBG_88E("%s, set group_key, none\n", __func__); psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; @@ -2375,7 +2375,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) { /* psk/802_1x */ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { if (param->u.crypt.set_tx == 1) { - memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); if (strcmp(param->u.crypt.alg, "WEP") == 0) { DBG_88E("%s, set pairwise key, WEP\n", __func__); @@ -2409,7 +2409,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, } else { /* group key??? */ if (strcmp(param->u.crypt.alg, "WEP") == 0) { memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if (param->u.crypt.key_len == 13) psecuritypriv->dot118021XGrpPrivacy = _WEP104_; @@ -2417,7 +2417,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, psecuritypriv->dot118021XGrpPrivacy = _TKIP_; memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); /* set mic key */ memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); @@ -2428,7 +2428,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, psecuritypriv->dot118021XGrpPrivacy = _AES_; memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, - param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); + param->u.crypt.key, min_t(u16, param->u.crypt.key_len, 16)); } else { psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; } @@ -2669,7 +2669,7 @@ static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) int copy_len; wpa_ie_len = psta->wpa_ie[1]; - copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)) : (wpa_ie_len+2); + copy_len = min_t(int, wpa_ie_len + 2, sizeof(psta->wpa_ie)); param->u.wpa_ie.len = copy_len; memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len); } else { @@ -2974,7 +2974,7 @@ static int rtw_wx_set_priv(struct net_device *dev, if ((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && (!memcmp(&probereq_wpsie[2], wps_oui, 4))) { - cp_sz = probereq_wpsie_len > MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN : probereq_wpsie_len; + cp_sz = min(probereq_wpsie_len, MAX_WPS_IE_LEN); pmlmepriv->wps_probe_req_ie_len = 0; kfree(pmlmepriv->wps_probe_req_ie); @@ -3091,7 +3091,7 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) struct iw_handler_def rtw_handlers_def = { .standard = rtw_handlers, - .num_standard = sizeof(rtw_handlers) / sizeof(iw_handler), + .num_standard = ARRAY_SIZE(rtw_handlers), .get_wireless_stats = rtw_get_wireless_stats, }; diff --git a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c index 218adaa57..08bfa76f4 100644 --- a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c @@ -116,14 +116,13 @@ void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) p = buff; p += sprintf(p, "ASSOCINFO(ReqIEs ="); len = sec_ie[1]+2; - len = (len < IW_CUSTOM_MAX) ? len : IW_CUSTOM_MAX; + len = min_t(uint, len, IW_CUSTOM_MAX); for (i = 0; i < len; i++) p += sprintf(p, "%02x", sec_ie[i]); p += sprintf(p, ")"); memset(&wrqu, 0, sizeof(wrqu)); wrqu.data.length = p-buff; - wrqu.data.length = (wrqu.data.length < IW_CUSTOM_MAX) ? - wrqu.data.length : IW_CUSTOM_MAX; + wrqu.data.length = min_t(__u16, wrqu.data.length, IW_CUSTOM_MAX); wireless_send_event(adapter->pnetdev, IWEVCUSTOM, &wrqu, buff); kfree(buff); } @@ -152,7 +151,7 @@ void rtw_indicate_sta_assoc_event(struct adapter *padapter, struct sta_info *pst union iwreq_data wrqu; struct sta_priv *pstapriv = &padapter->stapriv; - if (psta == NULL) + if (!psta) return; if (psta->aid > NUM_STA) @@ -176,7 +175,7 @@ void rtw_indicate_sta_disassoc_event(struct adapter *padapter, struct sta_info * union iwreq_data wrqu; struct sta_priv *pstapriv = &padapter->stapriv; - if (psta == NULL) + if (!psta) return; if (psta->aid > NUM_STA) diff --git a/drivers/staging/rtl8188eu/os_dep/mon.c b/drivers/staging/rtl8188eu/os_dep/mon.c new file mode 100644 index 000000000..63bb87593 --- /dev/null +++ b/drivers/staging/rtl8188eu/os_dep/mon.c @@ -0,0 +1,195 @@ +/* + * RTL8188EU monitor interface + * + * Copyright (C) 2015 Jakub Sitnicki + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more + * details. + */ + +#include <linux/ieee80211.h> +#include <linux/netdevice.h> +#include <net/cfg80211.h> + +#include <drv_types.h> +#include <rtw_recv.h> +#include <rtw_xmit.h> +#include <mon.h> + +/** + * unprotect_frame() - unset Protected flag and strip off IV and ICV/MIC + */ +static void unprotect_frame(struct sk_buff *skb, int iv_len, int icv_len) +{ + struct ieee80211_hdr *hdr; + int hdr_len; + + hdr = (struct ieee80211_hdr *)skb->data; + hdr_len = ieee80211_hdrlen(hdr->frame_control); + + if (skb->len < hdr_len + iv_len + icv_len) + return; + if (!ieee80211_has_protected(hdr->frame_control)) + return; + + hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_PROTECTED); + + memmove(skb->data + iv_len, skb->data, hdr_len); + skb_pull(skb, iv_len); + skb_trim(skb, skb->len - icv_len); +} + +static void mon_recv_decrypted(struct net_device *dev, const u8 *data, + int data_len, int iv_len, int icv_len) +{ + struct sk_buff *skb; + + skb = netdev_alloc_skb(dev, data_len); + if (!skb) + return; + memcpy(skb_put(skb, data_len), data, data_len); + + /* + * Frame data is not encrypted. Strip off protection so + * userspace doesn't think that it is. + */ + unprotect_frame(skb, iv_len, icv_len); + + skb->ip_summed = CHECKSUM_UNNECESSARY; + skb->protocol = eth_type_trans(skb, dev); + netif_rx(skb); +} + +static void mon_recv_encrypted(struct net_device *dev, const u8 *data, + int data_len) +{ + if (net_ratelimit()) + netdev_info(dev, "Encrypted packets are not supported"); +} + +/** + * rtl88eu_mon_recv_hook() - forward received frame to the monitor interface + * + * Assumes that the frame contains an IV and an ICV/MIC, and that + * encrypt field in frame->attrib have been set accordingly. + */ +void rtl88eu_mon_recv_hook(struct net_device *dev, struct recv_frame *frame) +{ + struct rx_pkt_attrib *attr; + int iv_len, icv_len; + int data_len; + u8 *data; + + if (!dev || !frame) + return; + if (!netif_running(dev)) + return; + + attr = &frame->attrib; + data = frame->rx_data; + data_len = frame->len; + + /* Broadcast and multicast frames don't have attr->{iv,icv}_len set */ + SET_ICE_IV_LEN(iv_len, icv_len, attr->encrypt); + + if (attr->bdecrypted) + mon_recv_decrypted(dev, data, data_len, iv_len, icv_len); + else + mon_recv_encrypted(dev, data, data_len); +} + +/** + * rtl88eu_mon_xmit_hook() - forward trasmitted frame to the monitor interface + * + * Assumes that: + * - frame header contains an IV and frame->attrib.iv_len is set accordingly, + * - data is not encrypted and ICV/MIC has not been appended yet. + */ +void rtl88eu_mon_xmit_hook(struct net_device *dev, struct xmit_frame *frame, + uint frag_len) +{ + struct pkt_attrib *attr; + u8 *data; + int i, offset; + + if (!dev || !frame) + return; + if (!netif_running(dev)) + return; + + attr = &frame->attrib; + + offset = TXDESC_SIZE + frame->pkt_offset * PACKET_OFFSET_SZ; + data = frame->buf_addr + offset; + + for (i = 0; i < attr->nr_frags - 1; i++) { + mon_recv_decrypted(dev, data, frag_len, attr->iv_len, 0); + data += frag_len; + data = (u8 *)round_up((size_t)data, 4); + } + /* Last fragment has different length */ + mon_recv_decrypted(dev, data, attr->last_txcmdsz, attr->iv_len, 0); +} + +static netdev_tx_t mon_xmit(struct sk_buff *skb, struct net_device *dev) +{ + dev_kfree_skb(skb); + return NETDEV_TX_OK; +} + +static const struct net_device_ops mon_netdev_ops = { + .ndo_start_xmit = mon_xmit, + .ndo_change_mtu = eth_change_mtu, + .ndo_set_mac_address = eth_mac_addr, + .ndo_validate_addr = eth_validate_addr, +}; + +static void mon_setup(struct net_device *dev) +{ + dev->netdev_ops = &mon_netdev_ops; + dev->destructor = free_netdev; + ether_setup(dev); + dev->tx_queue_len = 0; + dev->type = ARPHRD_IEEE80211; + /* + * Use a locally administered address (IEEE 802) + * XXX: Copied from mac80211_hwsim driver. Revisit. + */ + eth_zero_addr(dev->dev_addr); + dev->dev_addr[0] = 0x12; +} + +struct net_device *rtl88eu_mon_init(void) +{ + struct net_device *dev; + int err; + + dev = alloc_netdev(0, "mon%d", NET_NAME_UNKNOWN, mon_setup); + if (!dev) + goto fail; + + err = register_netdev(dev); + if (err < 0) + goto fail_free_dev; + + return dev; + +fail_free_dev: + free_netdev(dev); +fail: + return NULL; +} + +void rtl88eu_mon_deinit(struct net_device *dev) +{ + if (!dev) + return; + + unregister_netdev(dev); +} diff --git a/drivers/staging/rtl8188eu/os_dep/os_intfs.c b/drivers/staging/rtl8188eu/os_dep/os_intfs.c index 2361bce48..d063d02db 100644 --- a/drivers/staging/rtl8188eu/os_dep/os_intfs.c +++ b/drivers/staging/rtl8188eu/os_dep/os_intfs.c @@ -185,6 +185,10 @@ MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P") module_param_named(debug, rtw_debug, int, 0444); MODULE_PARM_DESC(debug, "Set debug level (1-9) (default 1)"); +static bool rtw_monitor_enable; +module_param_named(monitor_enable, rtw_monitor_enable, bool, 0444); +MODULE_PARM_DESC(monitor_enable, "Enable monitor inferface (default: false)"); + static int netdev_open(struct net_device *pnetdev); static int netdev_close(struct net_device *pnetdev); @@ -604,6 +608,7 @@ static void loadparam(struct adapter *padapter, struct net_device *pnetdev) snprintf(registry_par->ifname, 16, "%s", ifname); snprintf(registry_par->if2name, 16, "%s", if2name); registry_par->notch_filter = (u8)rtw_notch_filter; + registry_par->monitor_enable = rtw_monitor_enable; } static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) @@ -1053,7 +1058,8 @@ static int netdev_open(struct net_device *pnetdev) int ret; struct adapter *padapter = (struct adapter *)rtw_netdev_priv(pnetdev); - _enter_critical_mutex(&padapter->hw_init_mutex, NULL); + if (mutex_lock_interruptible(&padapter->hw_init_mutex)) + return -ERESTARTSYS; ret = _netdev_open(pnetdev); mutex_unlock(&padapter->hw_init_mutex); return ret; diff --git a/drivers/staging/rtl8188eu/os_dep/osdep_service.c b/drivers/staging/rtl8188eu/os_dep/osdep_service.c index acb4eb120..466cd76fc 100644 --- a/drivers/staging/rtl8188eu/os_dep/osdep_service.c +++ b/drivers/staging/rtl8188eu/os_dep/osdep_service.c @@ -52,7 +52,7 @@ void *rtw_malloc2d(int h, int w, int size) int j; void **a = kzalloc(h*sizeof(void *) + h*w*size, GFP_KERNEL); - if (a == NULL) { + if (!a) { pr_info("%s: alloc memory fail!\n", __func__); return NULL; } diff --git a/drivers/staging/rtl8188eu/os_dep/recv_linux.c b/drivers/staging/rtl8188eu/os_dep/recv_linux.c index 3ebb8b206..d4734baff 100644 --- a/drivers/staging/rtl8188eu/os_dep/recv_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/recv_linux.c @@ -94,7 +94,7 @@ int rtw_recv_indicatepkt(struct adapter *padapter, pfree_recv_queue = &(precvpriv->free_recv_queue); skb = precv_frame->pkt; - if (skb == NULL) { + if (!skb) { RT_TRACE(_module_recv_osdep_c_, _drv_err_, ("rtw_recv_indicatepkt():skb == NULL something wrong!!!!\n")); goto _recv_indicatepkt_drop; diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c b/drivers/staging/rtl8188eu/os_dep/usb_intf.c index 33bfe054f..82a7c27c5 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c @@ -26,6 +26,7 @@ #include <hal_intf.h> #include <linux/usb.h> #include <linux/vmalloc.h> +#include <mon.h> #include <osdep_intf.h> #include <usb_ops_linux.h> @@ -348,6 +349,7 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, { struct adapter *padapter = NULL; struct net_device *pnetdev = NULL; + struct net_device *pmondev; int status = _FAIL; padapter = (struct adapter *)vzalloc(sizeof(*padapter)); @@ -366,6 +368,13 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); padapter = rtw_netdev_priv(pnetdev); + if (padapter->registrypriv.monitor_enable) { + pmondev = rtl88eu_mon_init(); + if (pmondev == NULL) + netdev_warn(pnetdev, "Failed to initialize monitor interface"); + padapter->pmondev = pmondev; + } + /* step 2. hook HalFunc, allocate HalData */ hal_set_hal_ops(padapter); @@ -458,6 +467,7 @@ static void rtw_usb_if1_deinit(struct adapter *if1) unregister_netdev(pnetdev); rtw_proc_remove_one(pnetdev); } + rtl88eu_mon_deinit(if1->pmondev); rtw_cancel_all_timer(if1); rtw_dev_unload(if1); diff --git a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c index 7e599bc5b..0fea338d7 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c @@ -249,7 +249,10 @@ static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 i goto exit; } - _enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL); + if (mutex_lock_interruptible(&dvobjpriv->usb_vendor_req_mutex)) { + status = -ERESTARTSYS; + goto exit; + } /* Acquire IO memory for vendorreq */ pIo_buf = dvobjpriv->usb_vendor_req_buf; diff --git a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c index 5acf9a9dd..1593e280e 100644 --- a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c @@ -52,7 +52,7 @@ uint _rtw_pktfile_read(struct pkt_file *pfile, u8 *rmem, uint rlen) len = rtw_remainder_len(pfile); - len = (rlen > len) ? len : rlen; + len = min(rlen, len); if (rmem) skb_copy_bits(pfile->pkt, pfile->buf_len-pfile->pkt_len, rmem, len); |