diff options
| author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-09-08 01:01:14 -0300 |
|---|---|---|
| committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-09-08 01:01:14 -0300 |
| commit | e5fd91f1ef340da553f7a79da9540c3db711c937 (patch) | |
| tree | b11842027dc6641da63f4bcc524f8678263304a3 /drivers/staging/sm750fb | |
| parent | 2a9b0348e685a63d97486f6749622b61e9e3292f (diff) | |
Linux-libre 4.2-gnu
Diffstat (limited to 'drivers/staging/sm750fb')
29 files changed, 874 insertions, 950 deletions
diff --git a/drivers/staging/sm750fb/Kconfig b/drivers/staging/sm750fb/Kconfig index c40d088a4..ccebc25c2 100644 --- a/drivers/staging/sm750fb/Kconfig +++ b/drivers/staging/sm750fb/Kconfig @@ -1,6 +1,10 @@ config FB_SM750 tristate "Silicon Motion SM750 framebuffer support" depends on FB && PCI + select FB_MODE_HELPERS + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Frame buffer driver for the Silicon Motion SM750 chip with 2D accelearion and dual head support. diff --git a/drivers/staging/sm750fb/TODO b/drivers/staging/sm750fb/TODO index bc1617249..a3a877d90 100644 --- a/drivers/staging/sm750fb/TODO +++ b/drivers/staging/sm750fb/TODO @@ -1,7 +1,8 @@ TODO: -- lots of clechpatch cleanup +- lots of checkpatch cleanup - use kernel coding style - refine the code and remove unused code +- Implement hardware acceleration for imageblit if image->depth > 1 - check on hardware effects of removal of USE_HW_I2C and USE_DVICHIP (these two are supposed to be sample code which is given here if someone wants to use those functionalities) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 7b28328c9..f4975d2d9 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -17,7 +17,7 @@ logical_chip_type_t getChipType(void) char physicalRev; logical_chip_type_t chip; - physicalID = devId750;//either 0x718 or 0x750 + physicalID = devId750; /* either 0x718 or 0x750 */ physicalRev = revId750; if (physicalID == 0x718) @@ -257,7 +257,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) unsigned int ulReg; #if 0 - //move the code to map regiter function. + /* move the code to map regiter function. */ if (getChipType() == SM718) { /* turn on big endian bit*/ ulReg = PEEK32(0x74); @@ -285,7 +285,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) ulReg = FIELD_SET(ulReg, VGA_CONFIGURATION, MODE, GRAPHIC); POKE32(VGA_CONFIGURATION, ulReg); } else { -#if defined(__i386__) || defined( __x86_64__) +#if defined(__i386__) || defined(__x86_64__) /* set graphic mode via IO method */ outb_p(0x88, 0x3d4); outb_p(0x06, 0x3d5); @@ -382,7 +382,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) unsigned int absDiff(unsigned int a, unsigned int b) { - if ( a > b ) + if (a > b) return(a - b); else return(b - a); @@ -433,7 +433,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) unsigned int RN, quo, rem, fl_quo; unsigned int input, request; unsigned int tmpClock, ret; - pllcalparam * xparm; + pllcalparam *xparm; #if 1 if (getChipType() == SM750LE) { @@ -487,8 +487,6 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) } } } - - //printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD); return ret; } @@ -580,14 +578,9 @@ pll_value_t *pPLL /* Structure to hold the value to be set in PLL */ } /* Restore input frequency from Khz to hz unit */ -// pPLL->inputFreq *= 1000; ulRequestClk *= 1000; pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */ - /* Output debug information */ - //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk)); - //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD)); - /* Return actual frequency that the PLL can set */ ret = calcPLL(pPLL); return ret; @@ -616,7 +609,7 @@ unsigned int formatPllReg(pll_value_t *pPLL) | FIELD_VALUE(0, PANEL_PLL_CTRL, N, pPLL->N) | FIELD_VALUE(0, PANEL_PLL_CTRL, M, pPLL->M); - return ulPllReg; + return ulPllReg; } diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h index 04cb0d559..4e030e820 100644 --- a/drivers/staging/sm750fb/ddk750_chip.h +++ b/drivers/staging/sm750fb/ddk750_chip.h @@ -10,10 +10,10 @@ /* This is all the chips recognized by this library */ typedef enum _logical_chip_type_t { - SM_UNKNOWN, - SM718, - SM750, - SM750LE, + SM_UNKNOWN, + SM718, + SM750, + SM750LE, } logical_chip_type_t; @@ -30,51 +30,56 @@ clock_type_t; typedef struct _pll_value_t { - clock_type_t clockType; - unsigned long inputFreq; /* Input clock frequency to the PLL */ + clock_type_t clockType; + unsigned long inputFreq; /* Input clock frequency to the PLL */ - /* Use this when clockType = PANEL_PLL */ - unsigned long M; - unsigned long N; - unsigned long OD; - unsigned long POD; + /* Use this when clockType = PANEL_PLL */ + unsigned long M; + unsigned long N; + unsigned long OD; + unsigned long POD; } pll_value_t; /* input struct to initChipParam() function */ typedef struct _initchip_param_t { - unsigned short powerMode; /* Use power mode 0 or 1 */ - unsigned short chipClock; /* Speed of main chip clock in MHz unit - 0 = keep the current clock setting - Others = the new main chip clock - */ - unsigned short memClock; /* Speed of memory clock in MHz unit - 0 = keep the current clock setting - Others = the new memory clock - */ - unsigned short masterClock; /* Speed of master clock in MHz unit - 0 = keep the current clock setting - Others = the new master clock - */ - unsigned short setAllEngOff; /* 0 = leave all engine state untouched. - 1 = make sure they are off: 2D, Overlay, - video alpha, alpha, hardware cursors - */ - unsigned char resetMemory; /* 0 = Do not reset the memory controller - 1 = Reset the memory controller - */ + unsigned short powerMode; /* Use power mode 0 or 1 */ + unsigned short chipClock; /** + * Speed of main chip clock in MHz unit + * 0 = keep the current clock setting + * Others = the new main chip clock + */ + unsigned short memClock; /** + * Speed of memory clock in MHz unit + * 0 = keep the current clock setting + * Others = the new memory clock + */ + unsigned short masterClock; /** + * Speed of master clock in MHz unit + * 0 = keep the current clock setting + * Others = the new master clock + */ + unsigned short setAllEngOff; /** + * 0 = leave all engine state untouched. + * 1 = make sure they are off: 2D, Overlay, + * video alpha, alpha, hardware cursors + */ + unsigned char resetMemory; /** + * 0 = Do not reset the memory controller + * 1 = Reset the memory controller + */ - /* More initialization parameter can be added if needed */ + /* More initialization parameter can be added if needed */ } initchip_param_t; logical_chip_type_t getChipType(void); -unsigned int calcPllValue(unsigned int request,pll_value_t *pll); -unsigned int calcPllValue2(unsigned int,pll_value_t *); +unsigned int calcPllValue(unsigned int request, pll_value_t *pll); +unsigned int calcPllValue2(unsigned int, pll_value_t *); unsigned int formatPllReg(pll_value_t *pPLL); -void ddk750_set_mmio(void __iomem *,unsigned short,char); +void ddk750_set_mmio(void __iomem *, unsigned short, char); unsigned int ddk750_getVMSize(void); int ddk750_initHw(initchip_param_t *); unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL); diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c index c84196ac0..a3e672056 100644 --- a/drivers/staging/sm750fb/ddk750_display.c +++ b/drivers/staging/sm750fb/ddk750_display.c @@ -4,9 +4,9 @@ #include "ddk750_power.h" #include "ddk750_dvi.h" -#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0,delay) +#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0, delay) -static void setDisplayControl(int ctrl,int dispState) +static void setDisplayControl(int ctrl, int dispState) { /* state != 0 means turn on both timing & plane en_bit */ unsigned long ulDisplayCtrlReg, ulReservedBits; @@ -51,7 +51,7 @@ static void setDisplayControl(int ctrl,int dispState) POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulDisplayCtrlReg & ~ulReservedBits)); - printk("Set Panel Plane enbit:after tried %d times\n",cnt); + printk("Set Panel Plane enbit:after tried %d times\n", cnt); } else { @@ -106,7 +106,7 @@ static void setDisplayControl(int ctrl,int dispState) POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg); } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) != (ulDisplayCtrlReg & ~ulReservedBits)); - printk("Set Crt Plane enbit:after tried %d times\n",cnt); + printk("Set Crt Plane enbit:after tried %d times\n", cnt); } else { @@ -129,7 +129,7 @@ static void setDisplayControl(int ctrl,int dispState) } -static void waitNextVerticalSync(int ctrl,int delay) +static void waitNextVerticalSync(int ctrl, int delay) { unsigned int status; if(!ctrl){ @@ -201,31 +201,31 @@ static void waitNextVerticalSync(int ctrl,int delay) } } -static void swPanelPowerSequence(int disp,int delay) +static void swPanelPowerSequence(int disp, int delay) { unsigned int reg; /* disp should be 1 to open sequence */ reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,DATA,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, DATA, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,VBIASEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, VBIASEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); } @@ -236,33 +236,33 @@ void ddk750_setLogicalDispOut(disp_output_t output) if(output & PNL_2_USAGE){ /* set panel path controller select */ reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,SELECT,(output & PNL_2_MASK)>>PNL_2_OFFSET); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET); + POKE32(PANEL_DISPLAY_CTRL, reg); } if(output & CRT_2_USAGE){ /* set crt path controller select */ reg = PEEK32(CRT_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,SELECT,(output & CRT_2_MASK)>>CRT_2_OFFSET); + reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET); /*se blank off */ - reg = FIELD_SET(reg,CRT_DISPLAY_CTRL,BLANK,OFF); - POKE32(CRT_DISPLAY_CTRL,reg); + reg = FIELD_SET(reg, CRT_DISPLAY_CTRL, BLANK, OFF); + POKE32(CRT_DISPLAY_CTRL, reg); } if(output & PRI_TP_USAGE){ /* set primary timing and plane en_bit */ - setDisplayControl(0,(output&PRI_TP_MASK)>>PRI_TP_OFFSET); + setDisplayControl(0, (output&PRI_TP_MASK)>>PRI_TP_OFFSET); } if(output & SEC_TP_USAGE){ /* set secondary timing and plane en_bit*/ - setDisplayControl(1,(output&SEC_TP_MASK)>>SEC_TP_OFFSET); + setDisplayControl(1, (output&SEC_TP_MASK)>>SEC_TP_OFFSET); } if(output & PNL_SEQ_USAGE){ /* set panel sequence */ - swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET,4); + swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET, 4); } if(output & DAC_USAGE) diff --git a/drivers/staging/sm750fb/ddk750_dvi.c b/drivers/staging/sm750fb/ddk750_dvi.c index f5932bbf1..b2bf7e66d 100644 --- a/drivers/staging/sm750fb/ddk750_dvi.c +++ b/drivers/staging/sm750fb/ddk750_dvi.c @@ -51,7 +51,7 @@ int dviInit( vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable, pllFilterEnable, pllFilterValue); } - return -1;//error + return -1; /* error */ } @@ -66,7 +66,6 @@ unsigned short dviGetVendorID(void) { dvi_ctrl_device_t *pCurrentDviCtrl; - //pCurrentDviCtrl = getDviCtrl(); pCurrentDviCtrl = g_dcftSupportedDviController; if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) return pCurrentDviCtrl->pfnGetVendorId(); @@ -86,7 +85,6 @@ unsigned short dviGetDeviceID(void) { dvi_ctrl_device_t *pCurrentDviCtrl; -// pCurrentDviCtrl = getDviCtrl(); pCurrentDviCtrl = g_dcftSupportedDviController; if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) return pCurrentDviCtrl->pfnGetDeviceId(); diff --git a/drivers/staging/sm750fb/ddk750_dvi.h b/drivers/staging/sm750fb/ddk750_dvi.h index 50bcec29b..83bbd6d62 100644 --- a/drivers/staging/sm750fb/ddk750_dvi.h +++ b/drivers/staging/sm750fb/ddk750_dvi.h @@ -4,16 +4,17 @@ /* dvi chip stuffs structros */ typedef long (*PFN_DVICTRL_INIT)( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue); + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue); + typedef void (*PFN_DVICTRL_RESETCHIP)(void); typedef char* (*PFN_DVICTRL_GETCHIPSTRING)(void); typedef unsigned short (*PFN_DVICTRL_GETVENDORID)(void); @@ -24,44 +25,39 @@ typedef unsigned char (*PFN_DVICTRL_ISCONNECTED)(void); typedef unsigned char (*PFN_DVICTRL_CHECKINTERRUPT)(void); typedef void (*PFN_DVICTRL_CLEARINTERRUPT)(void); - - /* Structure to hold all the function pointer to the DVI Controller. */ typedef struct _dvi_ctrl_device_t { - PFN_DVICTRL_INIT pfnInit; - PFN_DVICTRL_RESETCHIP pfnResetChip; - PFN_DVICTRL_GETCHIPSTRING pfnGetChipString; - PFN_DVICTRL_GETVENDORID pfnGetVendorId; - PFN_DVICTRL_GETDEVICEID pfnGetDeviceId; - PFN_DVICTRL_SETPOWER pfnSetPower; - PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection; - PFN_DVICTRL_ISCONNECTED pfnIsConnected; - PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt; - PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt; + PFN_DVICTRL_INIT pfnInit; + PFN_DVICTRL_RESETCHIP pfnResetChip; + PFN_DVICTRL_GETCHIPSTRING pfnGetChipString; + PFN_DVICTRL_GETVENDORID pfnGetVendorId; + PFN_DVICTRL_GETDEVICEID pfnGetDeviceId; + PFN_DVICTRL_SETPOWER pfnSetPower; + PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection; + PFN_DVICTRL_ISCONNECTED pfnIsConnected; + PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt; + PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt; } dvi_ctrl_device_t; -#define DVI_CTRL_SII164 - +#define DVI_CTRL_SII164 /* dvi functions prototype */ int dviInit( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue ); unsigned short dviGetVendorID(void); unsigned short dviGetDeviceID(void); - - #endif diff --git a/drivers/staging/sm750fb/ddk750_help.c b/drivers/staging/sm750fb/ddk750_help.c index c68ff3b57..1adcafcc5 100644 --- a/drivers/staging/sm750fb/ddk750_help.c +++ b/drivers/staging/sm750fb/ddk750_help.c @@ -1,13 +1,11 @@ -//#include "ddk750_reg.h" -//#include "ddk750_chip.h" #include "ddk750_help.h" -void __iomem * mmio750 = NULL; +void __iomem *mmio750 = NULL; char revId750 = 0; unsigned short devId750 = 0; /* after driver mapped io registers, use this function first */ -void ddk750_set_mmio(void __iomem * addr,unsigned short devId,char revId) +void ddk750_set_mmio(void __iomem *addr, unsigned short devId, char revId) { mmio750 = addr; devId750 = devId; diff --git a/drivers/staging/sm750fb/ddk750_help.h b/drivers/staging/sm750fb/ddk750_help.h index 07c8264fa..4285b0565 100644 --- a/drivers/staging/sm750fb/ddk750_help.h +++ b/drivers/staging/sm750fb/ddk750_help.h @@ -13,13 +13,13 @@ /* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */ #warning "big endian on target cpu and enable nature big endian support of 718 capability !" #define PEEK32(addr) __raw_readl(mmio750 + addr) -#define POKE32(addr,data) __raw_writel(data, mmio750 + addr) -#else /* software control endianess */ +#define POKE32(addr, data) __raw_writel(data, mmio750 + addr) +#else /* software control endianness */ #define PEEK32(addr) readl(addr + mmio750) -#define POKE32(addr,data) writel(data, addr + mmio750) +#define POKE32(addr, data) writel(data, addr + mmio750) #endif -extern void __iomem * mmio750; +extern void __iomem *mmio750; extern char revId750; extern unsigned short devId750; #else diff --git a/drivers/staging/sm750fb/ddk750_hwi2c.h b/drivers/staging/sm750fb/ddk750_hwi2c.h index ad311493c..0b830ba65 100644 --- a/drivers/staging/sm750fb/ddk750_hwi2c.h +++ b/drivers/staging/sm750fb/ddk750_hwi2c.h @@ -5,6 +5,6 @@ int hwI2CInit(unsigned char busSpeedMode); void hwI2CClose(void); -unsigned char hwI2CReadReg(unsigned char deviceAddress,unsigned char registerIndex); -int hwI2CWriteReg(unsigned char deviceAddress,unsigned char registerIndex,unsigned char data); +unsigned char hwI2CReadReg(unsigned char deviceAddress, unsigned char registerIndex); +int hwI2CWriteReg(unsigned char deviceAddress, unsigned char registerIndex, unsigned char data); #endif diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index 2e418fb6f..74313ff84 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -75,15 +75,15 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, /* only timing related registers will be programed */ -static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) +static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) { int ret = 0; int cnt = 0; - unsigned int ulTmpValue,ulReg; + unsigned int ulTmpValue, ulReg; if(pll->clockType == SECONDARY_PLL) { /* programe secondary pixel clock */ - POKE32(CRT_PLL_CTRL,formatPllReg(pll)); + POKE32(CRT_PLL_CTRL, formatPllReg(pll)); POKE32(CRT_HORIZONTAL_TOTAL, FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) | FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1)); @@ -101,29 +101,29 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) | FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); - ulTmpValue = FIELD_VALUE(0,CRT_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)| - FIELD_VALUE(0,CRT_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)| - FIELD_SET(0,CRT_DISPLAY_CTRL,TIMING,ENABLE)| - FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE); + ulTmpValue = FIELD_VALUE(0, CRT_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)| + FIELD_VALUE(0, CRT_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)| + FIELD_SET(0, CRT_DISPLAY_CTRL, TIMING, ENABLE)| + FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE); if(getChipType() == SM750LE){ - displayControlAdjust_SM750LE(pModeParam,ulTmpValue); + displayControlAdjust_SM750LE(pModeParam, ulTmpValue); }else{ ulReg = PEEK32(CRT_DISPLAY_CTRL) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,TIMING) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,PLANE); + & FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, TIMING) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, PLANE); - POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg); + POKE32(CRT_DISPLAY_CTRL, ulTmpValue|ulReg); } } else if(pll->clockType == PRIMARY_PLL) { unsigned int ulReservedBits; - POKE32(PANEL_PLL_CTRL,formatPllReg(pll)); + POKE32(PANEL_PLL_CTRL, formatPllReg(pll)); POKE32(PANEL_HORIZONTAL_TOTAL, FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) @@ -141,16 +141,16 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height) | FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); - ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)| - FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)| - FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE); + ulTmpValue = FIELD_VALUE(0, PANEL_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)| + FIELD_VALUE(0, PANEL_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)| + FIELD_VALUE(0, PANEL_DISPLAY_CTRL, CLOCK_PHASE, pModeParam->clock_phase_polarity)| + FIELD_SET(0, PANEL_DISPLAY_CTRL, TIMING, ENABLE)| + FIELD_SET(0, PANEL_DISPLAY_CTRL, PLANE, ENABLE); ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW); + FIELD_SET(0, PANEL_DISPLAY_CTRL, VSYNC, ACTIVE_LOW); ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) & FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE) @@ -162,20 +162,20 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) /* May a hardware bug or just my test chip (not confirmed). * PANEL_DISPLAY_CTRL register seems requiring few writes - * before a value can be succesfully written in. + * before a value can be successfully written in. * Added some masks to mask out the reserved bits. * Note: This problem happens by design. The hardware will wait for the * next vertical sync to turn on/off the plane. */ - POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg); + POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg); #if 1 while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) { cnt++; if(cnt > 1000) break; - POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg); + POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg); } #endif } @@ -185,20 +185,20 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) return ret; } -int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock) +int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) { pll_value_t pll; unsigned int uiActualPixelClk; pll.inputFreq = DEFAULT_INPUT_CLOCK; pll.clockType = clock; - uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll); + uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); if(getChipType() == SM750LE){ /* set graphic mode via IO method */ - outb_p(0x88,0x3d4); - outb_p(0x06,0x3d5); + outb_p(0x88, 0x3d4); + outb_p(0x06, 0x3d5); } - programModeRegisters(parm,&pll); + programModeRegisters(parm, &pll); return 0; } diff --git a/drivers/staging/sm750fb/ddk750_mode.h b/drivers/staging/sm750fb/ddk750_mode.h index 6f8df96a8..4e8fab3f1 100644 --- a/drivers/staging/sm750fb/ddk750_mode.h +++ b/drivers/staging/sm750fb/ddk750_mode.h @@ -37,7 +37,7 @@ typedef struct _mode_parameter_t } mode_parameter_t; -int ddk750_setModeTiming(mode_parameter_t *,clock_type_t); +int ddk750_setModeTiming(mode_parameter_t *, clock_type_t); #endif diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c index cbb97676b..1e5f398ae 100644 --- a/drivers/staging/sm750fb/ddk750_power.c +++ b/drivers/staging/sm750fb/ddk750_power.c @@ -7,10 +7,10 @@ void ddk750_setDPMS(DPMS_t state) unsigned int value; if(getChipType() == SM750LE){ value = PEEK32(CRT_DISPLAY_CTRL); - POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(value,CRT_DISPLAY_CTRL,DPMS,state)); + POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, DPMS, state)); }else{ value = PEEK32(SYSTEM_CTRL); - value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state); + value= FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state); POKE32(SYSTEM_CTRL, value); } } diff --git a/drivers/staging/sm750fb/ddk750_power.h b/drivers/staging/sm750fb/ddk750_power.h index 71dc7f980..4e00955a0 100644 --- a/drivers/staging/sm750fb/ddk750_power.h +++ b/drivers/staging/sm750fb/ddk750_power.h @@ -12,7 +12,7 @@ DPMS_t; #define setDAC(off) \ { \ - POKE32(MISC_CTRL,FIELD_VALUE(PEEK32(MISC_CTRL), \ + POKE32(MISC_CTRL, FIELD_VALUE(PEEK32(MISC_CTRL), \ MISC_CTRL, \ DAC_POWER, \ off)); \ diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h index 2016f97d2..1a40dc2a2 100644 --- a/drivers/staging/sm750fb/ddk750_reg.h +++ b/drivers/staging/sm750fb/ddk750_reg.h @@ -1885,10 +1885,10 @@ #define DISPLAY_CONTROL_750LE 0x80288 /* Palette RAM */ -/* Panel Pallete register starts at 0x080400 ~ 0x0807FC */ +/* Panel Palette register starts at 0x080400 ~ 0x0807FC */ #define PANEL_PALETTE_RAM 0x080400 -/* Panel Pallete register starts at 0x080C00 ~ 0x080FFC */ +/* Panel Palette register starts at 0x080C00 ~ 0x080FFC */ #define CRT_PALETTE_RAM 0x080C00 /* 2D registers diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c index 3d224d6a7..b6395b87f 100644 --- a/drivers/staging/sm750fb/ddk750_sii164.c +++ b/drivers/staging/sm750fb/ddk750_sii164.c @@ -125,10 +125,7 @@ long sii164InitChip( unsigned char pllFilterValue ) { - //unsigned char ucRegIndex, ucRegValue; - //unsigned char ucDeviceAddress, unsigned char config; - //unsigned long delayCount; /* Initialize the i2c bus */ #ifdef USE_HW_I2C @@ -141,10 +138,6 @@ long sii164InitChip( /* Check if SII164 Chip exists */ if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID)) { - -#ifdef DDKDEBUG - //sii164PrintRegisterValues(); -#endif /* * Initialize SII164 controller chip. */ @@ -241,10 +234,6 @@ long sii164InitChip( config |= SII164_CONFIGURATION_POWER_NORMAL; i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); -#ifdef DDKDEBUG - //sii164PrintRegisterValues(); -#endif - return 0; } @@ -256,7 +245,7 @@ long sii164InitChip( -/* below sii164 function is not neccessary */ +/* below sii164 function is not necessary */ #ifdef SII164_FULL_FUNCTIONS @@ -388,7 +377,7 @@ unsigned char sii164IsConnected(void) /* * sii164CheckInterrupt - * Checks if interrupt has occured. + * Checks if interrupt has occurred. * * Output: * 0 - No interrupt diff --git a/drivers/staging/sm750fb/ddk750_swi2c.c b/drivers/staging/sm750fb/ddk750_swi2c.c index 901b3737f..5133bccf1 100644 --- a/drivers/staging/sm750fb/ddk750_swi2c.c +++ b/drivers/staging/sm750fb/ddk750_swi2c.c @@ -96,15 +96,14 @@ static void swI2CWait(void) it's more reliable than counter loop .. write 0x61 to 0x3ce and read from 0x3cf */ - while(peekIO(0x3ce,0x61) & 0x10); + while (peekIO(0x3ce, 0x61) & 0x10); #else - int i, Temp; + int i, Temp; - for(i=0; i<600; i++) - { - Temp = i; - Temp += i; - } + for (i = 0; i < 600; i++) { + Temp = i; + Temp += i; + } #endif } @@ -122,27 +121,24 @@ static void swI2CWait(void) */ void swI2CSCL(unsigned char value) { - unsigned long ulGPIOData; - unsigned long ulGPIODirection; - - ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg); - if (value) /* High */ - { - /* Set direction as input. This will automatically pull the signal up. */ - ulGPIODirection &= ~(1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); - } - else /* Low */ - { - /* Set the signal down */ - ulGPIOData = PEEK32(g_i2cClkGPIODataReg); - ulGPIOData &= ~(1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataReg, ulGPIOData); - - /* Set direction as output */ - ulGPIODirection |= (1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); - } + unsigned long ulGPIOData; + unsigned long ulGPIODirection; + + ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg); + if (value) { /* High */ + /* Set direction as input. This will automatically pull the signal up. */ + ulGPIODirection &= ~(1 << g_i2cClockGPIO); + POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); + } else { /* Low */ + /* Set the signal down */ + ulGPIOData = PEEK32(g_i2cClkGPIODataReg); + ulGPIOData &= ~(1 << g_i2cClockGPIO); + POKE32(g_i2cClkGPIODataReg, ulGPIOData); + + /* Set direction as output */ + ulGPIODirection |= (1 << g_i2cClockGPIO); + POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); + } } /* @@ -159,27 +155,24 @@ void swI2CSCL(unsigned char value) */ void swI2CSDA(unsigned char value) { - unsigned long ulGPIOData; - unsigned long ulGPIODirection; - - ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); - if (value) /* High */ - { - /* Set direction as input. This will automatically pull the signal up. */ - ulGPIODirection &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } - else /* Low */ - { - /* Set the signal down */ - ulGPIOData = PEEK32(g_i2cDataGPIODataReg); - ulGPIOData &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataReg, ulGPIOData); - - /* Set direction as output */ - ulGPIODirection |= (1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } + unsigned long ulGPIOData; + unsigned long ulGPIODirection; + + ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); + if (value) { /* High */ + /* Set direction as input. This will automatically pull the signal up. */ + ulGPIODirection &= ~(1 << g_i2cDataGPIO); + POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); + } else { /* Low */ + /* Set the signal down */ + ulGPIOData = PEEK32(g_i2cDataGPIODataReg); + ulGPIOData &= ~(1 << g_i2cDataGPIO); + POKE32(g_i2cDataGPIODataReg, ulGPIOData); + + /* Set direction as output */ + ulGPIODirection |= (1 << g_i2cDataGPIO); + POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); + } } /* @@ -190,23 +183,22 @@ void swI2CSDA(unsigned char value) */ static unsigned char swI2CReadSDA(void) { - unsigned long ulGPIODirection; - unsigned long ulGPIOData; - - /* Make sure that the direction is input (High) */ - ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); - if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO))) - { - ulGPIODirection &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } - - /* Now read the SDA line */ - ulGPIOData = PEEK32(g_i2cDataGPIODataReg); - if (ulGPIOData & (1 << g_i2cDataGPIO)) - return 1; - else - return 0; + unsigned long ulGPIODirection; + unsigned long ulGPIOData; + + /* Make sure that the direction is input (High) */ + ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); + if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO))) { + ulGPIODirection &= ~(1 << g_i2cDataGPIO); + POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); + } + + /* Now read the SDA line */ + ulGPIOData = PEEK32(g_i2cDataGPIODataReg); + if (ulGPIOData & (1 << g_i2cDataGPIO)) + return 1; + else + return 0; } /* @@ -214,7 +206,7 @@ static unsigned char swI2CReadSDA(void) */ static void swI2CAck(void) { - return; /* Single byte read is ok without it. */ + return; /* Single byte read is ok without it. */ } /* @@ -222,10 +214,10 @@ static void swI2CAck(void) */ static void swI2CStart(void) { - /* Start I2C */ - swI2CSDA(1); - swI2CSCL(1); - swI2CSDA(0); + /* Start I2C */ + swI2CSDA(1); + swI2CSCL(1); + swI2CSDA(0); } /* @@ -233,10 +225,10 @@ static void swI2CStart(void) */ static void swI2CStop(void) { - /* Stop the I2C */ - swI2CSCL(1); - swI2CSDA(0); - swI2CSDA(1); + /* Stop the I2C */ + swI2CSCL(1); + swI2CSDA(0); + swI2CSDA(1); } /* @@ -251,60 +243,58 @@ static void swI2CStop(void) */ static long swI2CWriteByte(unsigned char data) { - unsigned char value = data; - int i; - - /* Sending the data bit by bit */ - for (i=0; i<8; i++) - { - /* Set SCL to low */ - swI2CSCL(0); - - /* Send data bit */ - if ((value & 0x80) != 0) - swI2CSDA(1); - else - swI2CSDA(0); - - swI2CWait(); - - /* Toggle clk line to one */ - swI2CSCL(1); - swI2CWait(); - - /* Shift byte to be sent */ - value = value << 1; - } - - /* Set the SCL Low and SDA High (prepare to get input) */ - swI2CSCL(0); - swI2CSDA(1); - - /* Set the SCL High for ack */ - swI2CWait(); - swI2CSCL(1); - swI2CWait(); - - /* Read SDA, until SDA==0 */ - for(i=0; i<0xff; i++) - { - if (!swI2CReadSDA()) - break; - - swI2CSCL(0); - swI2CWait(); - swI2CSCL(1); - swI2CWait(); - } - - /* Set the SCL Low and SDA High */ - swI2CSCL(0); - swI2CSDA(1); - - if (i<0xff) - return 0; - else - return -1; + unsigned char value = data; + int i; + + /* Sending the data bit by bit */ + for (i = 0; i < 8; i++) { + /* Set SCL to low */ + swI2CSCL(0); + + /* Send data bit */ + if ((value & 0x80) != 0) + swI2CSDA(1); + else + swI2CSDA(0); + + swI2CWait(); + + /* Toggle clk line to one */ + swI2CSCL(1); + swI2CWait(); + + /* Shift byte to be sent */ + value = value << 1; + } + + /* Set the SCL Low and SDA High (prepare to get input) */ + swI2CSCL(0); + swI2CSDA(1); + + /* Set the SCL High for ack */ + swI2CWait(); + swI2CSCL(1); + swI2CWait(); + + /* Read SDA, until SDA==0 */ + for (i = 0; i < 0xff; i++) { + if (!swI2CReadSDA()) + break; + + swI2CSCL(0); + swI2CWait(); + swI2CSCL(1); + swI2CWait(); + } + + /* Set the SCL Low and SDA High */ + swI2CSCL(0); + swI2CSDA(1); + + if (i < 0xff) + return 0; + else + return -1; } /* @@ -319,32 +309,31 @@ static long swI2CWriteByte(unsigned char data) */ static unsigned char swI2CReadByte(unsigned char ack) { - int i; - unsigned char data = 0; + int i; + unsigned char data = 0; - for(i=7; i>=0; i--) - { - /* Set the SCL to Low and SDA to High (Input) */ - swI2CSCL(0); - swI2CSDA(1); - swI2CWait(); + for (i = 7; i >= 0; i--) { + /* Set the SCL to Low and SDA to High (Input) */ + swI2CSCL(0); + swI2CSDA(1); + swI2CWait(); - /* Set the SCL High */ - swI2CSCL(1); - swI2CWait(); + /* Set the SCL High */ + swI2CSCL(1); + swI2CWait(); - /* Read data bits from SDA */ - data |= (swI2CReadSDA() << i); - } + /* Read data bits from SDA */ + data |= (swI2CReadSDA() << i); + } - if (ack) - swI2CAck(); + if (ack) + swI2CAck(); - /* Set the SCL Low and SDA High */ - swI2CSCL(0); - swI2CSDA(1); + /* Set the SCL Low and SDA High */ + swI2CSCL(0); + swI2CSDA(1); - return data; + return data; } /* @@ -361,29 +350,29 @@ static unsigned char swI2CReadByte(unsigned char ack) static long swI2CInit_SM750LE(unsigned char i2cClkGPIO, unsigned char i2cDataGPIO) { - int i; + int i; - /* Initialize the GPIO pin for the i2c Clock Register */ - g_i2cClkGPIODataReg = GPIO_DATA_SM750LE; - g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; + /* Initialize the GPIO pin for the i2c Clock Register */ + g_i2cClkGPIODataReg = GPIO_DATA_SM750LE; + g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; - /* Initialize the Clock GPIO Offset */ - g_i2cClockGPIO = i2cClkGPIO; + /* Initialize the Clock GPIO Offset */ + g_i2cClockGPIO = i2cClkGPIO; - /* Initialize the GPIO pin for the i2c Data Register */ - g_i2cDataGPIODataReg = GPIO_DATA_SM750LE; - g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; + /* Initialize the GPIO pin for the i2c Data Register */ + g_i2cDataGPIODataReg = GPIO_DATA_SM750LE; + g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; - /* Initialize the Data GPIO Offset */ - g_i2cDataGPIO = i2cDataGPIO; + /* Initialize the Data GPIO Offset */ + g_i2cDataGPIO = i2cDataGPIO; - /* Note that SM750LE don't have GPIO MUX and power is always on */ + /* Note that SM750LE don't have GPIO MUX and power is always on */ - /* Clear the i2c lines. */ - for(i=0; i<9; i++) - swI2CStop(); + /* Clear the i2c lines. */ + for (i = 0; i < 9; i++) + swI2CStop(); - return 0; + return 0; } /* @@ -398,49 +387,49 @@ static long swI2CInit_SM750LE(unsigned char i2cClkGPIO, * 0 - Success */ long swI2CInit( - unsigned char i2cClkGPIO, - unsigned char i2cDataGPIO + unsigned char i2cClkGPIO, + unsigned char i2cDataGPIO ) { - int i; + int i; - /* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */ - if ((i2cClkGPIO > 31) || (i2cDataGPIO > 31)) - return -1; + /* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */ + if ((i2cClkGPIO > 31) || (i2cDataGPIO > 31)) + return -1; - if (getChipType() == SM750LE) - return swI2CInit_SM750LE(i2cClkGPIO, i2cDataGPIO); + if (getChipType() == SM750LE) + return swI2CInit_SM750LE(i2cClkGPIO, i2cDataGPIO); - /* Initialize the GPIO pin for the i2c Clock Register */ - g_i2cClkGPIOMuxReg = GPIO_MUX; - g_i2cClkGPIODataReg = GPIO_DATA; - g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION; + /* Initialize the GPIO pin for the i2c Clock Register */ + g_i2cClkGPIOMuxReg = GPIO_MUX; + g_i2cClkGPIODataReg = GPIO_DATA; + g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION; - /* Initialize the Clock GPIO Offset */ - g_i2cClockGPIO = i2cClkGPIO; + /* Initialize the Clock GPIO Offset */ + g_i2cClockGPIO = i2cClkGPIO; - /* Initialize the GPIO pin for the i2c Data Register */ - g_i2cDataGPIOMuxReg = GPIO_MUX; - g_i2cDataGPIODataReg = GPIO_DATA; - g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION; + /* Initialize the GPIO pin for the i2c Data Register */ + g_i2cDataGPIOMuxReg = GPIO_MUX; + g_i2cDataGPIODataReg = GPIO_DATA; + g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION; - /* Initialize the Data GPIO Offset */ - g_i2cDataGPIO = i2cDataGPIO; + /* Initialize the Data GPIO Offset */ + g_i2cDataGPIO = i2cDataGPIO; - /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */ - POKE32(g_i2cClkGPIOMuxReg, - PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO)); - POKE32(g_i2cDataGPIOMuxReg, - PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO)); + /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */ + POKE32(g_i2cClkGPIOMuxReg, + PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO)); + POKE32(g_i2cDataGPIOMuxReg, + PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO)); - /* Enable GPIO power */ - enableGPIO(1); + /* Enable GPIO power */ + enableGPIO(1); - /* Clear the i2c lines. */ - for(i=0; i<9; i++) - swI2CStop(); + /* Clear the i2c lines. */ + for (i = 0; i < 9; i++) + swI2CStop(); - return 0; + return 0; } /* @@ -455,30 +444,30 @@ long swI2CInit( * Register value */ unsigned char swI2CReadReg( - unsigned char deviceAddress, - unsigned char registerIndex + unsigned char deviceAddress, + unsigned char registerIndex ) { - unsigned char data; + unsigned char data; - /* Send the Start signal */ - swI2CStart(); + /* Send the Start signal */ + swI2CStart(); - /* Send the device address */ - swI2CWriteByte(deviceAddress); + /* Send the device address */ + swI2CWriteByte(deviceAddress); - /* Send the register index */ - swI2CWriteByte(registerIndex); + /* Send the register index */ + swI2CWriteByte(registerIndex); - /* Get the bus again and get the data from the device read address */ - swI2CStart(); - swI2CWriteByte(deviceAddress + 1); - data = swI2CReadByte(1); + /* Get the bus again and get the data from the device read address */ + swI2CStart(); + swI2CWriteByte(deviceAddress + 1); + data = swI2CReadByte(1); - /* Stop swI2C and release the bus */ - swI2CStop(); + /* Stop swI2C and release the bus */ + swI2CStop(); - return data; + return data; } /* @@ -495,28 +484,27 @@ unsigned char swI2CReadReg( * -1 - Fail */ long swI2CWriteReg( - unsigned char deviceAddress, - unsigned char registerIndex, - unsigned char data + unsigned char deviceAddress, + unsigned char registerIndex, + unsigned char data ) { - long returnValue = 0; + long returnValue = 0; - /* Send the Start signal */ - swI2CStart(); + /* Send the Start signal */ + swI2CStart(); - /* Send the device address and read the data. All should return success - in order for the writing processed to be successful - */ - if ((swI2CWriteByte(deviceAddress) != 0) || - (swI2CWriteByte(registerIndex) != 0) || - (swI2CWriteByte(data) != 0)) - { - returnValue = -1; - } + /* Send the device address and read the data. All should return success + in order for the writing processed to be successful + */ + if ((swI2CWriteByte(deviceAddress) != 0) || + (swI2CWriteByte(registerIndex) != 0) || + (swI2CWriteByte(data) != 0)) { + returnValue = -1; + } - /* Stop i2c and release the bus */ - swI2CStop(); + /* Stop i2c and release the bus */ + swI2CStop(); - return returnValue; + return returnValue; } diff --git a/drivers/staging/sm750fb/ddk750_swi2c.h b/drivers/staging/sm750fb/ddk750_swi2c.h index ec5463b98..4af2b7aa1 100644 --- a/drivers/staging/sm750fb/ddk750_swi2c.h +++ b/drivers/staging/sm750fb/ddk750_swi2c.h @@ -29,8 +29,8 @@ * 0 - Success */ long swI2CInit( - unsigned char i2cClkGPIO, - unsigned char i2cDataGPIO + unsigned char i2cClkGPIO, + unsigned char i2cDataGPIO ); /* @@ -45,8 +45,8 @@ long swI2CInit( * Register value */ unsigned char swI2CReadReg( - unsigned char deviceAddress, - unsigned char registerIndex + unsigned char deviceAddress, + unsigned char registerIndex ); /* @@ -63,14 +63,14 @@ unsigned char swI2CReadReg( * -1 - Fail */ long swI2CWriteReg( - unsigned char deviceAddress, - unsigned char registerIndex, - unsigned char data + unsigned char deviceAddress, + unsigned char registerIndex, + unsigned char data ); /* - * These two functions are used to toggle the data on the SCL and SDA I2C lines. - * The used of these two functions are not recommended unless it is necessary. + * These two functions toggle the data on the SCL and SDA I2C lines. + * The use of these two functions is not recommended unless it is necessary. */ /* diff --git a/drivers/staging/sm750fb/modedb.h b/drivers/staging/sm750fb/modedb.h index c5275c6ff..83cb2e2ae 100644 --- a/drivers/staging/sm750fb/modedb.h +++ b/drivers/staging/sm750fb/modedb.h @@ -1,221 +1,233 @@ static const struct fb_videomode modedb2[] = { - { - /* 640x400 @ 70 Hz, 31.5 kHz hsync */ - NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 60 Hz, 31.5 kHz hsync */ - NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 56 Hz, 35.15 kHz hsync */ - NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */ - NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, - 0, FB_VMODE_INTERLACED - }, { - /* 640x400 @ 85 Hz, 37.86 kHz hsync */ - NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3, - FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 72 Hz, 36.5 kHz hsync */ - NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 75 Hz, 37.50 kHz hsync */ - NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 85 Hz, 43.27 kHz hsync */ - NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */ - NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, - 0, FB_VMODE_INTERLACED - }, { - /* 800x600 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 60 Hz, 48.4 kHz hsync */ - NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 100 Hz, 53.01 kHz hsync */ - NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 60 Hz, 53.5 kHz hsync */ - NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 85 Hz, 55.84 kHz hsync */ - NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 70 Hz, 56.5 kHz hsync */ - NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x960-60 VESA */ - NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA - }, { - /* 1280x1024-60 VESA */ - NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA - }, { - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, - 0, FB_VMODE_INTERLACED - }, { - /* 800x600 @ 100 Hz, 64.02 kHz hsync */ - NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 76 Hz, 62.5 kHz hsync */ - NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 70 Hz, 62.4 kHz hsync */ - NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */ - NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 60Hz, 63.9 kHz hsync */ - NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/ - NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/ - NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 85 Hz, 70.24 kHz hsync */ - NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 78 Hz, 70.8 kHz hsync */ - NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */ - NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 60Hz, 75.00 kHz hsync */ - NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 84 Hz, 76.0 kHz hsync */ - NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */ - NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 100Hz, 80.21 kHz hsync */ - NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */ - NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */ - NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 100 Hz, 89.62 kHz hsync */ - NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */ - NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */ - NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */ - NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */ - NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1800x1440 @ 64Hz, 96.15 kHz hsync */ - NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1800x1440 @ 70Hz, 104.52 kHz hsync */ - NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 512x384 @ 78 Hz, 31.50 kHz hsync */ - NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 512x384 @ 85 Hz, 34.38 kHz hsync */ - NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */ - NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */ - NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 320x240 @ 72 Hz, 36.5 kHz hsync */ - NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */ - NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */ - NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 63 Hz, 39.6 kHz hsync */ - NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3, - 0, FB_VMODE_DOUBLE - }, + { + /* 640x400 @ 70 Hz, 31.5 kHz hsync */ + NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 60 Hz, 31.5 kHz hsync */ + NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 56 Hz, 35.15 kHz hsync */ + NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */ + NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, + 0, FB_VMODE_INTERLACED + }, { + /* 640x400 @ 85 Hz, 37.86 kHz hsync */ + NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3, + FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 72 Hz, 36.5 kHz hsync */ + NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 75 Hz, 37.50 kHz hsync */ + NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 85 Hz, 43.27 kHz hsync */ + NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */ + NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, + 0, FB_VMODE_INTERLACED + }, { + /* 800x600 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 60 Hz, 48.4 kHz hsync */ + NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 100 Hz, 53.01 kHz hsync */ + NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 60 Hz, 53.5 kHz hsync */ + NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 85 Hz, 55.84 kHz hsync */ + NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 70 Hz, 56.5 kHz hsync */ + NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x960-60 VESA */ + NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA + }, { + /* 1280x1024-60 VESA */ + NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA + }, { + /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ + NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, + 0, FB_VMODE_INTERLACED + }, { + /* 800x600 @ 100 Hz, 64.02 kHz hsync */ + NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 76 Hz, 62.5 kHz hsync */ + NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 70 Hz, 62.4 kHz hsync */ + NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */ + NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 60Hz, 63.9 kHz hsync */ + NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/ + NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/ + NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 85 Hz, 70.24 kHz hsync */ + NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 78 Hz, 70.8 kHz hsync */ + NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */ + NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 60Hz, 75.00 kHz hsync */ + NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 84 Hz, 76.0 kHz hsync */ + NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */ + NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 100Hz, 80.21 kHz hsync */ + NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */ + NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */ + NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 100 Hz, 89.62 kHz hsync */ + NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */ + NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */ + NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */ + NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */ + NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1800x1440 @ 64Hz, 96.15 kHz hsync */ + NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1800x1440 @ 70Hz, 104.52 kHz hsync */ + NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 512x384 @ 78 Hz, 31.50 kHz hsync */ + NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 512x384 @ 85 Hz, 34.38 kHz hsync */ + NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */ + NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */ + NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 320x240 @ 72 Hz, 36.5 kHz hsync */ + NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */ + NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */ + NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 63 Hz, 39.6 kHz hsync */ + NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3, + 0, FB_VMODE_DOUBLE + }, }; static const int nmodedb2 = sizeof(modedb2); diff --git a/drivers/staging/sm750fb/readme b/drivers/staging/sm750fb/readme index ab9af7916..cfa45958b 100644 --- a/drivers/staging/sm750fb/readme +++ b/drivers/staging/sm750fb/readme @@ -5,7 +5,7 @@ Introduction: - 2D acceleration - 16MB integrated video memory -About the kernel module paramter of driver: +About the kernel module parameter of driver: Use 1280,8bpp index color and 60 hz mode: insmod ./sm750fb.ko g_option="1280x1024-8@60" @@ -20,16 +20,16 @@ About the kernel module paramter of driver: and user can use con2fb to link fbX and ttyX Notes: - 1) if you build the driver with built-in method, the paramter + 1) if you build the driver with built-in method, the parameter you edited in the grub config file will be also the - same format as above modular method,but additionaly add + same format as above modular method,but additionally add "video=sm750fb:" ahead of parameters,so,it looks like: video=sm750fb:noaccel,1280x1024@60,otherparam,etc... it equal to modular method with below command: insmod ./sm750fb.ko g_option="noaccel:1280x1024@60:otherparm:etc..." - 2) if you put 800x600 into the paramter without bpp and + 2) if you put 800x600 into the parameter without bpp and refresh rate, kernel driver will defaulty use 16bpp and 60hz Important: diff --git a/drivers/staging/sm750fb/sm750.c b/drivers/staging/sm750fb/sm750.c index dbbb2f879..8e201f19c 100644 --- a/drivers/staging/sm750fb/sm750.c +++ b/drivers/staging/sm750fb/sm750.c @@ -16,9 +16,6 @@ #include<linux/vmalloc.h> #include<linux/pagemap.h> #include <linux/console.h> -#ifdef CONFIG_MTRR -#include <asm/mtrr.h> -#endif #include <asm/fb.h> #include "sm750.h" #include "sm750_hw.h" @@ -47,9 +44,7 @@ typedef int (*PROC_SPEC_INITHW)(struct lynx_share*, struct pci_dev*); /* common var for all device */ static int g_hwcursor = 1; static int g_noaccel; -#ifdef CONFIG_MTRR static int g_nomtrr; -#endif static const char *g_fbmode[] = {NULL, NULL}; static const char *g_def_fbmode = "800x600-16@60"; static char *g_settings = NULL; @@ -93,9 +88,6 @@ static const struct fb_videomode lynx750_ext[] = { FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED}, - {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3, - FB_SYNC_HOR_HIGH_ACT|FB_VMODE_NONINTERLACED}, - /* 1360 x 768 [1.77083:1] */ {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, @@ -207,7 +199,7 @@ static void lynxfb_ops_fillrect(struct fb_info *info, /* * If not use spin_lock,system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ if (share->dual) spin_lock(&share->slock); @@ -239,7 +231,7 @@ static void lynxfb_ops_copyarea(struct fb_info *info, /* * If not use spin_lock, system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ if (share->dual) spin_lock(&share->slock); @@ -279,11 +271,14 @@ static void lynxfb_ops_imageblit(struct fb_info *info, } goto _do_work; } + /* TODO: Implement hardware acceleration for image->depth > 1 */ + cfb_imageblit(info, image); return; + _do_work: /* * If not use spin_lock, system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ if (share->dual) spin_lock(&share->slock); @@ -343,7 +338,7 @@ static int lynxfb_ops_set_par(struct fb_info *info) line_length = var->xres_virtual * var->bits_per_pixel / 8; line_length = PADDING(crtc->line_pad, line_length); fix->line_length = line_length; - pr_err("fix->line_length = %d\n", fix->line_length); + pr_info("fix->line_length = %d\n", fix->line_length); /* var->red,green,blue,transp are need to be set by driver * and these data should be set before setcolreg routine @@ -479,7 +474,7 @@ static int lynxfb_resume(struct pci_dev *pdev) ret = pci_set_power_state(pdev, PCI_D0); if (ret) { - pr_err("error:%d occured in pci_set_power_state\n", ret); + pr_err("error:%d occurred in pci_set_power_state\n", ret); return ret; } @@ -488,7 +483,7 @@ static int lynxfb_resume(struct pci_dev *pdev) pci_restore_state(pdev); ret = pci_enable_device(pdev); if (ret) { - pr_err("error:%d occured in pci_enable_device\n", ret); + pr_err("error:%d occurred in pci_enable_device\n", ret); return ret; } pci_set_master(pdev); @@ -979,7 +974,7 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) ret = fb_alloc_cmap(&info->cmap, 256, 0); if (ret < 0) { - pr_err("Could not allcate memory for cmap.\n"); + pr_err("Could not allocate memory for cmap.\n"); goto exit; } @@ -1026,8 +1021,8 @@ static void sm750fb_setup(struct lynx_share *share, char *src) } while ((opt = strsep(&src, ":")) != NULL && *opt != 0) { - pr_err("opt=%s\n", opt); - pr_err("src=%s\n", src); + pr_info("opt=%s\n", opt); + pr_info("src=%s\n", src); if (!strncmp(opt, "swap", strlen("swap"))) swap = 1; @@ -1092,7 +1087,7 @@ NO_PARAM: } static int lynxfb_pci_probe(struct pci_dev *pdev, - const struct pci_device_id * ent) + const struct pci_device_id *ent) { struct fb_info *info[] = {NULL, NULL}; struct lynx_share *share = NULL; @@ -1126,11 +1121,8 @@ static int lynxfb_pci_probe(struct pci_dev *pdev, pr_info("share->revid = %02x\n", share->revid); share->pdev = pdev; -#ifdef CONFIG_MTRR share->mtrr_off = g_nomtrr; share->mtrr.vram = 0; - share->mtrr.vram_added = 0; -#endif share->accel_off = g_noaccel; share->dual = g_dualview; spin_lock_init(&share->slock); @@ -1158,22 +1150,9 @@ static int lynxfb_pci_probe(struct pci_dev *pdev, goto err_map; } -#ifdef CONFIG_MTRR - if (!share->mtrr_off) { - pr_info("enable mtrr\n"); - share->mtrr.vram = mtrr_add(share->vidmem_start, - share->vidmem_size, - MTRR_TYPE_WRCOMB, 1); - - if (share->mtrr.vram < 0) { - /* don't block driver with the failure of MTRR */ - pr_err("Unable to setup MTRR.\n"); - } else { - share->mtrr.vram_added = 1; - pr_info("MTRR added succesfully\n"); - } - } -#endif + if (!share->mtrr_off) + share->mtrr.vram = arch_phys_wc_add(share->vidmem_start, + share->vidmem_size); memset_io(share->pvMem, 0, share->vidmem_size); @@ -1274,12 +1253,7 @@ static void lynxfb_pci_remove(struct pci_dev *pdev) /* release frame buffer */ framebuffer_release(info); } -#ifdef CONFIG_MTRR - if (share->mtrr.vram_added) - mtrr_del(share->mtrr.vram, - share->vidmem_start, - share->vidmem_size); -#endif + arch_phys_wc_del(share->mtrr.vram); iounmap(share->pvReg); iounmap(share->pvMem); @@ -1321,10 +1295,8 @@ static int __init lynxfb_setup(char *options) /* options that mean for any lynx chips are configured here */ if (!strncmp(opt, "noaccel", strlen("noaccel"))) g_noaccel = 1; -#ifdef CONFIG_MTRR else if (!strncmp(opt, "nomtrr", strlen("nomtrr"))) g_nomtrr = 1; -#endif else if (!strncmp(opt, "dual", strlen("dual"))) g_dualview = 1; else { diff --git a/drivers/staging/sm750fb/sm750.h b/drivers/staging/sm750fb/sm750.h index 0847d2bd9..cc80580bc 100644 --- a/drivers/staging/sm750fb/sm750.h +++ b/drivers/staging/sm750fb/sm750.h @@ -7,12 +7,10 @@ /* please use revision id to distinguish sm750le and sm750*/ #define SPC_SM750 0 -//#define SPC_SM750LE 8 - #define MB(x) ((x)<<20) #define MHZ(x) ((x) * 1000000) /* align should be 2,4,8,16 */ -#define PADDING(align,data) (((data)+(align)-1)&(~((align) -1))) +#define PADDING(align, data) (((data)+(align)-1)&(~((align) -1))) extern int smi_indent; @@ -27,15 +25,16 @@ struct lynx_accel{ int (*de_wait)(void);/* see if hardware ready to work */ - int (*de_fillrect)(struct lynx_accel *,u32,u32,u32, - u32,u32,u32,u32,u32,u32); + int (*de_fillrect)(struct lynx_accel *, u32, u32, u32, u32, + u32, u32, u32, u32, u32); - int (*de_copyarea)(struct lynx_accel *,u32,u32,u32,u32, - u32,u32,u32,u32, - u32,u32,u32,u32); + int (*de_copyarea)(struct lynx_accel *, u32, u32, u32, u32, + u32, u32, u32, u32, + u32, u32, u32, u32); - int (*de_imageblit)(struct lynx_accel *,const char *,u32,u32,u32, - u32,u32,u32,u32,u32,u32,u32,u32,u32); + int (*de_imageblit)(struct lynx_accel *, const char *, u32, u32, u32, u32, + u32, u32, u32, u32, + u32, u32, u32, u32); }; @@ -46,25 +45,22 @@ struct lynx_share{ /* common members */ u16 devid; u8 revid; - struct pci_dev * pdev; - struct fb_info * fbinfo[2]; + struct pci_dev *pdev; + struct fb_info *fbinfo[2]; struct lynx_accel accel; int accel_off; int dual; -#ifdef CONFIG_MTRR int mtrr_off; struct{ int vram; - int vram_added; }mtrr; -#endif /* all smi graphic adaptor got below attributes */ unsigned long vidmem_start; unsigned long vidreg_start; __u32 vidmem_size; __u32 vidreg_size; - void __iomem * pvReg; - unsigned char __iomem * pvMem; + void __iomem *pvReg; + unsigned char __iomem *pvMem; /* locks*/ spinlock_t slock; /* function pointers */ @@ -81,26 +77,26 @@ struct lynx_cursor{ int maxW; int maxH; /* base virtual address and offset of cursor image */ - char __iomem * vstart; + char __iomem *vstart; int offset; /* mmio addr of hw cursor */ volatile char __iomem * mmio; /* the lynx_share of this adaptor */ - struct lynx_share * share; + struct lynx_share *share; /* proc_routines */ void (*enable)(struct lynx_cursor *); void (*disable)(struct lynx_cursor *); - void (*setSize)(struct lynx_cursor *,int,int); - void (*setPos)(struct lynx_cursor *,int,int); - void (*setColor)(struct lynx_cursor *,u32,u32); - void (*setData)(struct lynx_cursor *,u16,const u8*,const u8*); + void (*setSize)(struct lynx_cursor *, int, int); + void (*setPos)(struct lynx_cursor *, int, int); + void (*setColor)(struct lynx_cursor *, u32, u32); + void (*setData)(struct lynx_cursor *, u16, const u8*, const u8*); }; struct lynxfb_crtc{ - unsigned char __iomem * vCursor;//virtual address of cursor - unsigned char __iomem * vScreen;//virtual address of on_screen - int oCursor;//cursor address offset in vidmem - int oScreen;//onscreen address offset in vidmem + unsigned char __iomem *vCursor; /* virtual address of cursor */ + unsigned char __iomem *vScreen; /* virtual address of on_screen */ + int oCursor; /* cursor address offset in vidmem */ + int oScreen; /* onscreen address offset in vidmem */ int channel;/* which channel this crtc stands for*/ resource_size_t vidmem_size;/* this view's video memory max size */ @@ -110,14 +106,14 @@ struct lynxfb_crtc{ u16 ypanstep; u16 ywrapstep; - void * priv; + void *priv; int(*proc_setMode)(struct lynxfb_crtc*, struct fb_var_screeninfo*, struct fb_fix_screeninfo*); - int(*proc_checkMode)(struct lynxfb_crtc*,struct fb_var_screeninfo*); - int(*proc_setColReg)(struct lynxfb_crtc*,ushort,ushort,ushort,ushort); + int(*proc_checkMode)(struct lynxfb_crtc*, struct fb_var_screeninfo*); + int(*proc_setColReg)(struct lynxfb_crtc*, ushort, ushort, ushort, ushort); void (*clear)(struct lynxfb_crtc*); /* pan display */ int (*proc_panDisplay)(struct lynxfb_crtc *, @@ -136,20 +132,20 @@ struct lynxfb_output{ paths=3:means output for both panel and crt paths */ - int * channel; + int *channel; /* which channel these outputs linked with,for sm750: *channel=0 means primary channel *channel=1 means secondary channel output->channel ==> &crtc->channel */ - void * priv; + void *priv; int(*proc_setMode)(struct lynxfb_output*, struct fb_var_screeninfo*, struct fb_fix_screeninfo*); - int(*proc_checkMode)(struct lynxfb_output*,struct fb_var_screeninfo*); - int(*proc_setBLANK)(struct lynxfb_output*,int); + int(*proc_checkMode)(struct lynxfb_output*, struct fb_var_screeninfo*); + int(*proc_setBLANK)(struct lynxfb_output*, int); void (*clear)(struct lynxfb_output*); }; @@ -159,8 +155,8 @@ struct lynxfb_par{ unsigned int pseudo_palette[256]; struct lynxfb_crtc crtc; struct lynxfb_output output; - struct fb_info * info; - struct lynx_share * share; + struct fb_info *info; + struct lynx_share *share; }; #ifndef offsetof @@ -171,7 +167,7 @@ struct lynxfb_par{ #define PS_TO_HZ(ps) \ ({ \ unsigned long long hz = 1000*1000*1000*1000ULL; \ - do_div(hz,ps); \ + do_div(hz, ps); \ (unsigned long)hz;}) static inline unsigned long ps_to_hz(unsigned int psvalue) diff --git a/drivers/staging/sm750fb/sm750_accel.c b/drivers/staging/sm750fb/sm750_accel.c index c5a372690..6eee4cd58 100644 --- a/drivers/staging/sm750fb/sm750_accel.c +++ b/drivers/staging/sm750fb/sm750_accel.c @@ -18,81 +18,81 @@ #include "sm750.h" #include "sm750_accel.h" #include "sm750_help.h" -static inline void write_dpr(struct lynx_accel * accel,int offset,u32 regValue) +static inline void write_dpr(struct lynx_accel *accel, int offset, u32 regValue) { - writel(regValue,accel->dprBase + offset); + writel(regValue, accel->dprBase + offset); } -static inline u32 read_dpr(struct lynx_accel * accel,int offset) +static inline u32 read_dpr(struct lynx_accel *accel, int offset) { return readl(accel->dprBase + offset); } -static inline void write_dpPort(struct lynx_accel * accel,u32 data) +static inline void write_dpPort(struct lynx_accel *accel, u32 data) { - writel(data,accel->dpPortBase); + writel(data, accel->dpPortBase); } -void hw_de_init(struct lynx_accel * accel) +void hw_de_init(struct lynx_accel *accel) { /* setup 2d engine registers */ - u32 reg,clr; + u32 reg, clr; - write_dpr(accel,DE_MASKS,0xFFFFFFFF); + write_dpr(accel, DE_MASKS, 0xFFFFFFFF); /* dpr1c */ - reg = FIELD_SET(0,DE_STRETCH_FORMAT,PATTERN_XY,NORMAL)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_Y,0)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_X,0)| - FIELD_SET(0,DE_STRETCH_FORMAT,ADDRESSING,XY)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,SOURCE_HEIGHT,3); - - clr = FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_XY)& - FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_Y)& - FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_X)& - FIELD_CLEAR(DE_STRETCH_FORMAT,ADDRESSING)& - FIELD_CLEAR(DE_STRETCH_FORMAT,SOURCE_HEIGHT); + reg = FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY, NORMAL)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_Y, 0)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X, 0)| + FIELD_SET(0, DE_STRETCH_FORMAT, ADDRESSING, XY)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, SOURCE_HEIGHT, 3); + + clr = FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_XY)& + FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_Y)& + FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_X)& + FIELD_CLEAR(DE_STRETCH_FORMAT, ADDRESSING)& + FIELD_CLEAR(DE_STRETCH_FORMAT, SOURCE_HEIGHT); /* DE_STRETCH bpp format need be initilized in setMode routine */ - write_dpr(accel,DE_STRETCH_FORMAT,(read_dpr(accel,DE_STRETCH_FORMAT) & clr) | reg); + write_dpr(accel, DE_STRETCH_FORMAT, (read_dpr(accel, DE_STRETCH_FORMAT) & clr) | reg); /* disable clipping and transparent */ - write_dpr(accel,DE_CLIP_TL,0);//dpr2c - write_dpr(accel,DE_CLIP_BR,0);//dpr30 + write_dpr(accel, DE_CLIP_TL, 0); /* dpr2c */ + write_dpr(accel, DE_CLIP_BR, 0); /* dpr30 */ - write_dpr(accel,DE_COLOR_COMPARE_MASK,0);//dpr24 - write_dpr(accel,DE_COLOR_COMPARE,0); + write_dpr(accel, DE_COLOR_COMPARE_MASK, 0); /* dpr24 */ + write_dpr(accel, DE_COLOR_COMPARE, 0); - reg = FIELD_SET(0,DE_CONTROL,TRANSPARENCY,DISABLE)| - FIELD_SET(0,DE_CONTROL,TRANSPARENCY_MATCH,OPAQUE)| - FIELD_SET(0,DE_CONTROL,TRANSPARENCY_SELECT,SOURCE); + reg = FIELD_SET(0, DE_CONTROL, TRANSPARENCY, DISABLE)| + FIELD_SET(0, DE_CONTROL, TRANSPARENCY_MATCH, OPAQUE)| + FIELD_SET(0, DE_CONTROL, TRANSPARENCY_SELECT, SOURCE); - clr = FIELD_CLEAR(DE_CONTROL,TRANSPARENCY)& - FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_MATCH)& - FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_SELECT); + clr = FIELD_CLEAR(DE_CONTROL, TRANSPARENCY)& + FIELD_CLEAR(DE_CONTROL, TRANSPARENCY_MATCH)& + FIELD_CLEAR(DE_CONTROL, TRANSPARENCY_SELECT); /* dpr0c */ - write_dpr(accel,DE_CONTROL,(read_dpr(accel,DE_CONTROL)&clr)|reg); + write_dpr(accel, DE_CONTROL, (read_dpr(accel, DE_CONTROL)&clr)|reg); } /* set2dformat only be called from setmode functions * but if you need dual framebuffer driver,need call set2dformat * every time you use 2d function */ -void hw_set2dformat(struct lynx_accel * accel,int fmt) +void hw_set2dformat(struct lynx_accel *accel, int fmt) { u32 reg; /* fmt=0,1,2 for 8,16,32,bpp on sm718/750/502 */ - reg = read_dpr(accel,DE_STRETCH_FORMAT); - reg = FIELD_VALUE(reg,DE_STRETCH_FORMAT,PIXEL_FORMAT,fmt); - write_dpr(accel,DE_STRETCH_FORMAT,reg); + reg = read_dpr(accel, DE_STRETCH_FORMAT); + reg = FIELD_VALUE(reg, DE_STRETCH_FORMAT, PIXEL_FORMAT, fmt); + write_dpr(accel, DE_STRETCH_FORMAT, reg); } -int hw_fillrect(struct lynx_accel * accel, - u32 base,u32 pitch,u32 Bpp, - u32 x,u32 y,u32 width,u32 height, - u32 color,u32 rop) +int hw_fillrect(struct lynx_accel *accel, + u32 base, u32 pitch, u32 Bpp, + u32 x, u32 y, u32 width, u32 height, + u32 color, u32 rop) { u32 deCtrl; @@ -100,44 +100,44 @@ int hw_fillrect(struct lynx_accel * accel, { /* int time wait and always busy,seems hardware * got something error */ - pr_debug("%s:De engine always bussy\n",__func__); + pr_debug("%s:De engine always bussy\n", __func__); return -1; } - write_dpr(accel,DE_WINDOW_DESTINATION_BASE,base);//dpr40 - write_dpr(accel,DE_PITCH, - FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch/Bpp)| - FIELD_VALUE(0,DE_PITCH,SOURCE,pitch/Bpp));//dpr10 + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, base); /* dpr40 */ + write_dpr(accel, DE_PITCH, + FIELD_VALUE(0, DE_PITCH, DESTINATION, pitch/Bpp)| + FIELD_VALUE(0, DE_PITCH, SOURCE, pitch/Bpp)); /* dpr10 */ - write_dpr(accel,DE_WINDOW_WIDTH, - FIELD_VALUE(0,DE_WINDOW_WIDTH,DESTINATION,pitch/Bpp)| - FIELD_VALUE(0,DE_WINDOW_WIDTH,SOURCE,pitch/Bpp));//dpr44 + write_dpr(accel, DE_WINDOW_WIDTH, + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, pitch/Bpp)| + FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, pitch/Bpp)); /* dpr44 */ - write_dpr(accel,DE_FOREGROUND,color);//DPR14 + write_dpr(accel, DE_FOREGROUND, color); /* DPR14 */ - write_dpr(accel,DE_DESTINATION, - FIELD_SET(0,DE_DESTINATION,WRAP,DISABLE)| - FIELD_VALUE(0,DE_DESTINATION,X,x)| - FIELD_VALUE(0,DE_DESTINATION,Y,y));//dpr4 + write_dpr(accel, DE_DESTINATION, + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE)| + FIELD_VALUE(0, DE_DESTINATION, X, x)| + FIELD_VALUE(0, DE_DESTINATION, Y, y)); /* dpr4 */ - write_dpr(accel,DE_DIMENSION, - FIELD_VALUE(0,DE_DIMENSION,X,width)| - FIELD_VALUE(0,DE_DIMENSION,Y_ET,height));//dpr8 + write_dpr(accel, DE_DIMENSION, + FIELD_VALUE(0, DE_DIMENSION, X, width)| + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr8 */ deCtrl = - FIELD_SET(0,DE_CONTROL,STATUS,START)| - FIELD_SET(0,DE_CONTROL,DIRECTION,LEFT_TO_RIGHT)| - FIELD_SET(0,DE_CONTROL,LAST_PIXEL,ON)| - FIELD_SET(0,DE_CONTROL,COMMAND,RECTANGLE_FILL)| - FIELD_SET(0,DE_CONTROL,ROP_SELECT,ROP2)| - FIELD_VALUE(0,DE_CONTROL,ROP,rop);//dpr0xc - - write_dpr(accel,DE_CONTROL,deCtrl); + FIELD_SET(0, DE_CONTROL, STATUS, START)| + FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)| + FIELD_SET(0, DE_CONTROL, LAST_PIXEL, ON)| + FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL)| + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2)| + FIELD_VALUE(0, DE_CONTROL, ROP, rop); /* dpr0xc */ + + write_dpr(accel, DE_CONTROL, deCtrl); return 0; } int hw_copyarea( -struct lynx_accel * accel, +struct lynx_accel *accel, unsigned int sBase, /* Address of source: offset in frame buffer */ unsigned int sPitch, /* Pitch value of source surface in BYTE */ unsigned int sx, @@ -236,40 +236,40 @@ unsigned int rop2) /* ROP value */ /* 2D Source Base. It is an address offset (128 bit aligned) from the beginning of frame buffer. */ - write_dpr(accel,DE_WINDOW_SOURCE_BASE, sBase);//dpr40 + write_dpr(accel, DE_WINDOW_SOURCE_BASE, sBase); /* dpr40 */ /* 2D Destination Base. It is an address offset (128 bit aligned) from the beginning of frame buffer. */ - write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);//dpr44 + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* dpr44 */ #if 0 /* Program pitch (distance between the 1st points of two adjacent lines). Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel convertion. + pixel values. Need Byte to pixel conversion. */ if(Bpp == 3){ sx *= 3; dx *= 3; width *= 3; - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) | - FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch)); /* dpr10 */ } else #endif { - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) | - FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp)));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp))); /* dpr10 */ } /* Screen Window width in Pixels. 2D engine uses this value to calculate the linear address in frame buffer for a given point. */ - write_dpr(accel,DE_WINDOW_WIDTH, + write_dpr(accel, DE_WINDOW_WIDTH, FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) | - FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp)));//dpr3c + FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp))); /* dpr3c */ if (accel->de_wait() != 0){ return -1; @@ -277,17 +277,17 @@ unsigned int rop2) /* ROP value */ { - write_dpr(accel,DE_SOURCE, + write_dpr(accel, DE_SOURCE, FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) | FIELD_VALUE(0, DE_SOURCE, X_K1, sx) | - FIELD_VALUE(0, DE_SOURCE, Y_K2, sy));//dpr0 - write_dpr(accel,DE_DESTINATION, + FIELD_VALUE(0, DE_SOURCE, Y_K2, sy)); /* dpr0 */ + write_dpr(accel, DE_DESTINATION, FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X, dx) | - FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04 - write_dpr(accel,DE_DIMENSION, + FIELD_VALUE(0, DE_DESTINATION, Y, dy)); /* dpr04 */ + write_dpr(accel, DE_DIMENSION, FIELD_VALUE(0, DE_DIMENSION, X, width) | - FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08 + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr08 */ de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | @@ -297,17 +297,17 @@ unsigned int rop2) /* ROP value */ FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT) : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL, STATUS, START); - write_dpr(accel,DE_CONTROL,de_ctrl);//dpr0c + write_dpr(accel, DE_CONTROL, de_ctrl); /* dpr0c */ } return 0; } -static unsigned int deGetTransparency(struct lynx_accel * accel) +static unsigned int deGetTransparency(struct lynx_accel *accel) { unsigned int de_ctrl; - de_ctrl = read_dpr(accel,DE_CONTROL); + de_ctrl = read_dpr(accel, DE_CONTROL); de_ctrl &= FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) | @@ -346,65 +346,64 @@ int hw_imageblit(struct lynx_accel *accel, if(accel->de_wait() != 0) { -// inf_msg("*** ImageBlit return -1 ***\n"); return -1; } /* 2D Source Base. Use 0 for HOST Blt. */ - write_dpr(accel,DE_WINDOW_SOURCE_BASE, 0); + write_dpr(accel, DE_WINDOW_SOURCE_BASE, 0); /* 2D Destination Base. It is an address offset (128 bit aligned) from the beginning of frame buffer. */ - write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase); + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); #if 0 /* Program pitch (distance between the 1st points of two adjacent lines). Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel convertion. + pixel values. Need Byte to pixel conversion. */ if(bytePerPixel == 3 ){ dx *= 3; width *= 3; startBit *= 3; - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) | - FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch)); /* dpr10 */ } else #endif { - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) | - FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel)); /* dpr10 */ } /* Screen Window width in Pixels. 2D engine uses this value to calculate the linear address in frame buffer for a given point. */ - write_dpr(accel,DE_WINDOW_WIDTH, + write_dpr(accel, DE_WINDOW_WIDTH, FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) | FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (dPitch/bytePerPixel))); /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used. For mono bitmap, use startBit for X_K1. */ - write_dpr(accel,DE_SOURCE, + write_dpr(accel, DE_SOURCE, FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) | - FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit));//dpr00 + FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit)); /* dpr00 */ - write_dpr(accel,DE_DESTINATION, + write_dpr(accel, DE_DESTINATION, FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X, dx) | - FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04 + FIELD_VALUE(0, DE_DESTINATION, Y, dy)); /* dpr04 */ - write_dpr(accel,DE_DIMENSION, + write_dpr(accel, DE_DIMENSION, FIELD_VALUE(0, DE_DIMENSION, X, width) | - FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08 + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr08 */ - write_dpr(accel,DE_FOREGROUND, fColor); - write_dpr(accel,DE_BACKGROUND, bColor); + write_dpr(accel, DE_FOREGROUND, fColor); + write_dpr(accel, DE_BACKGROUND, bColor); de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | @@ -412,7 +411,7 @@ int hw_imageblit(struct lynx_accel *accel, FIELD_SET(0, DE_CONTROL, HOST, MONO) | FIELD_SET(0, DE_CONTROL, STATUS, START); - write_dpr(accel,DE_CONTROL, de_ctrl | deGetTransparency(accel)); + write_dpr(accel, DE_CONTROL, de_ctrl | deGetTransparency(accel)); /* Write MONO data (line by line) to 2D Engine data port */ for (i=0; i<height; i++) diff --git a/drivers/staging/sm750fb/sm750_accel.h b/drivers/staging/sm750fb/sm750_accel.h index 3ee0bd892..d3d256c21 100644 --- a/drivers/staging/sm750fb/sm750_accel.h +++ b/drivers/staging/sm750fb/sm750_accel.h @@ -113,7 +113,7 @@ #define DE_CONTROL_TRANSPARENCY_ENABLE 1 #define DE_CONTROL_ROP 7:0 -// Pseudo fields. +/* Pseudo fields. */ #define DE_CONTROL_SHORT_STROKE_DIR 27:24 #define DE_CONTROL_SHORT_STROKE_DIR_225 0 @@ -234,17 +234,17 @@ #define BOTTOM_TO_TOP 1 #define RIGHT_TO_LEFT 1 -void hw_set2dformat(struct lynx_accel * accel,int fmt); +void hw_set2dformat(struct lynx_accel *accel, int fmt); -void hw_de_init(struct lynx_accel * accel); +void hw_de_init(struct lynx_accel *accel); -int hw_fillrect(struct lynx_accel * accel, - u32 base,u32 pitch,u32 Bpp, - u32 x,u32 y,u32 width,u32 height, - u32 color,u32 rop); +int hw_fillrect(struct lynx_accel *accel, + u32 base, u32 pitch, u32 Bpp, + u32 x, u32 y, u32 width, u32 height, + u32 color, u32 rop); int hw_copyarea( -struct lynx_accel * accel, +struct lynx_accel *accel, unsigned int sBase, /* Address of source: offset in frame buffer */ unsigned int sPitch, /* Pitch value of source surface in BYTE */ unsigned int sx, diff --git a/drivers/staging/sm750fb/sm750_cursor.c b/drivers/staging/sm750fb/sm750_cursor.c index 68d5cbc3e..405e24b67 100644 --- a/drivers/staging/sm750fb/sm750_cursor.c +++ b/drivers/staging/sm750fb/sm750_cursor.c @@ -23,8 +23,8 @@ #define PEEK32(addr) \ readl(cursor->mmio + (addr)) -#define POKE32(addr,data) \ -writel((data),cursor->mmio + (addr)) +#define POKE32(addr, data) \ +writel((data), cursor->mmio + (addr)) /* cursor control for voyager and 718/750*/ #define HWC_ADDRESS 0x0 @@ -58,45 +58,45 @@ writel((data),cursor->mmio + (addr)) /* hw_cursor_xxx works for voyager,718 and 750 */ -void hw_cursor_enable(struct lynx_cursor * cursor) +void hw_cursor_enable(struct lynx_cursor *cursor) { u32 reg; - reg = FIELD_VALUE(0,HWC_ADDRESS,ADDRESS,cursor->offset)| - FIELD_SET(0,HWC_ADDRESS,EXT,LOCAL)| - FIELD_SET(0,HWC_ADDRESS,ENABLE,ENABLE); - POKE32(HWC_ADDRESS,reg); + reg = FIELD_VALUE(0, HWC_ADDRESS, ADDRESS, cursor->offset)| + FIELD_SET(0, HWC_ADDRESS, EXT, LOCAL)| + FIELD_SET(0, HWC_ADDRESS, ENABLE, ENABLE); + POKE32(HWC_ADDRESS, reg); } -void hw_cursor_disable(struct lynx_cursor * cursor) +void hw_cursor_disable(struct lynx_cursor *cursor) { - POKE32(HWC_ADDRESS,0); + POKE32(HWC_ADDRESS, 0); } -void hw_cursor_setSize(struct lynx_cursor * cursor, - int w,int h) +void hw_cursor_setSize(struct lynx_cursor *cursor, + int w, int h) { cursor->w = w; cursor->h = h; } -void hw_cursor_setPos(struct lynx_cursor * cursor, - int x,int y) +void hw_cursor_setPos(struct lynx_cursor *cursor, + int x, int y) { u32 reg; - reg = FIELD_VALUE(0,HWC_LOCATION,Y,y)| - FIELD_VALUE(0,HWC_LOCATION,X,x); - POKE32(HWC_LOCATION,reg); + reg = FIELD_VALUE(0, HWC_LOCATION, Y, y)| + FIELD_VALUE(0, HWC_LOCATION, X, x); + POKE32(HWC_LOCATION, reg); } -void hw_cursor_setColor(struct lynx_cursor * cursor, - u32 fg,u32 bg) +void hw_cursor_setColor(struct lynx_cursor *cursor, + u32 fg, u32 bg) { - POKE32(HWC_COLOR_12,(fg<<16)|(bg&0xffff)); - POKE32(HWC_COLOR_3,0xffe0); + POKE32(HWC_COLOR_12, (fg<<16)|(bg&0xffff)); + POKE32(HWC_COLOR_3, 0xffe0); } -void hw_cursor_setData(struct lynx_cursor * cursor, - u16 rop,const u8* pcol,const u8* pmsk) +void hw_cursor_setData(struct lynx_cursor *cursor, + u16 rop, const u8* pcol, const u8* pmsk) { - int i,j,count,pitch,offset; - u8 color,mask,opr; + int i, j, count, pitch, offset; + u8 color, mask, opr; u16 data; void __iomem *pbuffer, *pstart; @@ -141,10 +141,10 @@ void hw_cursor_setData(struct lynx_cursor * cursor, { if(opr & (0x80 >> j)) - { //use fg color,id = 2 + { /* use fg color,id = 2 */ data |= 2 << (j*2); }else{ - //use bg color,id = 1 + /* use bg color,id = 1 */ data |= 1 << (j*2); } } @@ -183,10 +183,10 @@ void hw_cursor_setData(struct lynx_cursor * cursor, } -void hw_cursor_setData2(struct lynx_cursor * cursor, - u16 rop,const u8* pcol,const u8* pmsk) +void hw_cursor_setData2(struct lynx_cursor *cursor, + u16 rop, const u8* pcol, const u8* pmsk) { - int i,j,count,pitch,offset; + int i, j, count, pitch, offset; u8 color, mask; u16 data; void __iomem *pbuffer, *pstart; @@ -221,10 +221,10 @@ void hw_cursor_setData2(struct lynx_cursor * cursor, { if(opr & (0x80 >> j)) - { //use fg color,id = 2 + { /* use fg color,id = 2 */ data |= 2 << (j*2); }else{ - //use bg color,id = 1 + /* use bg color,id = 1 */ data |= 1 << (j*2); } } @@ -238,7 +238,6 @@ void hw_cursor_setData2(struct lynx_cursor * cursor, /* assume pitch is 1,2,4,8,...*/ if(!(i&(pitch-1))) - //if((i+1) % pitch == 0) { /* need a return */ pstart += offset; diff --git a/drivers/staging/sm750fb/sm750_cursor.h b/drivers/staging/sm750fb/sm750_cursor.h index 8cede0721..e1716a600 100644 --- a/drivers/staging/sm750fb/sm750_cursor.h +++ b/drivers/staging/sm750fb/sm750_cursor.h @@ -2,16 +2,16 @@ #define LYNX_CURSOR_H__ /* hw_cursor_xxx works for voyager,718 and 750 */ -void hw_cursor_enable(struct lynx_cursor * cursor); -void hw_cursor_disable(struct lynx_cursor * cursor); -void hw_cursor_setSize(struct lynx_cursor * cursor, - int w,int h); -void hw_cursor_setPos(struct lynx_cursor * cursor, - int x,int y); -void hw_cursor_setColor(struct lynx_cursor * cursor, - u32 fg,u32 bg); -void hw_cursor_setData(struct lynx_cursor * cursor, - u16 rop,const u8* data,const u8* mask); -void hw_cursor_setData2(struct lynx_cursor * cursor, - u16 rop,const u8* data,const u8* mask); +void hw_cursor_enable(struct lynx_cursor *cursor); +void hw_cursor_disable(struct lynx_cursor *cursor); +void hw_cursor_setSize(struct lynx_cursor *cursor, + int w, int h); +void hw_cursor_setPos(struct lynx_cursor *cursor, + int x, int y); +void hw_cursor_setColor(struct lynx_cursor *cursor, + u32 fg, u32 bg); +void hw_cursor_setData(struct lynx_cursor *cursor, + u16 rop, const u8* data, const u8* mask); +void hw_cursor_setData2(struct lynx_cursor *cursor, + u16 rop, const u8* data, const u8* mask); #endif diff --git a/drivers/staging/sm750fb/sm750_help.h b/drivers/staging/sm750fb/sm750_help.h index e0128d2a9..05777f72c 100644 --- a/drivers/staging/sm750fb/sm750_help.h +++ b/drivers/staging/sm750fb/sm750_help.h @@ -1,29 +1,21 @@ #ifndef LYNX_HELP_H__ #define LYNX_HELP_H__ -/*****************************************************************************\ - * FIELD MACROS * -\*****************************************************************************/ +/* FIELD MACROS */ #define _LSB(f) (0 ? f) #define _MSB(f) (1 ? f) #define _COUNT(f) (_MSB(f) - _LSB(f) + 1) #define RAW_MASK(f) (0xFFFFFFFF >> (32 - _COUNT(f))) #define GET_MASK(f) (RAW_MASK(f) << _LSB(f)) -#define GET_FIELD(d,f) (((d) >> _LSB(f)) & RAW_MASK(f)) -#define TEST_FIELD(d,f,v) (GET_FIELD(d,f) == f ## _ ## v) -#define SET_FIELD(d,f,v) (((d) & ~GET_MASK(f)) | \ +#define GET_FIELD(d, f) (((d) >> _LSB(f)) & RAW_MASK(f)) +#define TEST_FIELD(d, f, v) (GET_FIELD(d, f) == f ## _ ## v) +#define SET_FIELD(d, f, v) (((d) & ~GET_MASK(f)) | \ (((f ## _ ## v) & RAW_MASK(f)) << _LSB(f))) -#define SET_FIELDV(d,f,v) (((d) & ~GET_MASK(f)) | \ +#define SET_FIELDV(d, f, v) (((d) & ~GET_MASK(f)) | \ (((v) & RAW_MASK(f)) << _LSB(f))) - -//////////////////////////////////////////////////////////////////////////////// -// // -// Internal macros // -// // -//////////////////////////////////////////////////////////////////////////////// - +/* Internal macros */ #define _F_START(f) (0 ? f) #define _F_END(f) (1 ? f) #define _F_SIZE(f) (1 + _F_END(f) - _F_START(f)) @@ -31,13 +23,7 @@ #define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f)) #define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f)) - -//////////////////////////////////////////////////////////////////////////////// -// // -// Global macros // -// // -//////////////////////////////////////////////////////////////////////////////// - +/* Global macros */ #define FIELD_GET(x, reg, field) \ ( \ _F_NORMALIZE((x), reg ## _ ## field) \ @@ -60,13 +46,7 @@ ~ _F_MASK(reg ## _ ## field) \ ) - -//////////////////////////////////////////////////////////////////////////////// -// // -// Field Macros // -// // -//////////////////////////////////////////////////////////////////////////////// - +/* Field Macros */ #define FIELD_START(field) (0 ? field) #define FIELD_END(field) (1 ? field) #define FIELD_SIZE(field) (1 + FIELD_END(field) - FIELD_START(field)) @@ -91,7 +71,7 @@ (unsigned short) ((((r) & 0xF8) << 8) | (((g) & 0xFC) << 3) | (((b) & 0xF8) >> 3)) \ ) -static inline unsigned int absDiff(unsigned int a,unsigned int b) +static inline unsigned int absDiff(unsigned int a, unsigned int b) { if(a<b) return b-a; @@ -100,7 +80,7 @@ static inline unsigned int absDiff(unsigned int a,unsigned int b) } /* n / d + 1 / 2 = (2n + d) / 2d */ -#define roundedDiv(num,denom) ((2 * (num) + (denom)) / (2 * (denom))) +#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MB(x) ((x)<<20) #define KB(x) ((x)<<10) #define MHz(x) ((x) * 1000000) diff --git a/drivers/staging/sm750fb/sm750_hw.c b/drivers/staging/sm750fb/sm750_hw.c index 9f0d06da1..84381bc41 100644 --- a/drivers/staging/sm750fb/sm750_hw.c +++ b/drivers/staging/sm750fb/sm750_hw.c @@ -27,10 +27,10 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev) { int ret; - struct sm750_share * spec_share; + struct sm750_share *spec_share; - spec_share = container_of(share, struct sm750_share,share); + spec_share = container_of(share, struct sm750_share, share); ret = 0; share->vidreg_start = pci_resource_start(pdev, 1); @@ -64,7 +64,7 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev) share->accel.dprBase = share->pvReg + DE_BASE_ADDR_TYPE1; share->accel.dpPortBase = share->pvReg + DE_PORT_ADDR_TYPE1; - ddk750_set_mmio(share->pvReg,share->devid, share->revid); + ddk750_set_mmio(share->pvReg, share->devid, share->revid); share->vidmem_start = pci_resource_start(pdev, 0); /* don't use pdev_resource[x].end - resource[x].start to @@ -78,15 +78,14 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev) /* reserve the vidmem space of smi adaptor */ #if 0 - if((ret = pci_request_region(pdev,0,_moduleName_))) + if((ret = pci_request_region(pdev, 0, _moduleName_))) { pr_err("Can not request PCI regions.\n"); goto exit; } #endif - share->pvMem = ioremap(share->vidmem_start, - share->vidmem_size); + share->pvMem = ioremap_wc(share->vidmem_start, share->vidmem_size); if(!share->pvMem){ pr_err("Map video memory failed\n"); @@ -101,12 +100,12 @@ exit: -int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) +int hw_sm750_inithw(struct lynx_share *share, struct pci_dev *pdev) { - struct sm750_share * spec_share; - struct init_status * parm; + struct sm750_share *spec_share; + struct init_status *parm; - spec_share = container_of(share, struct sm750_share,share); + spec_share = container_of(share, struct sm750_share, share); parm = &spec_share->state.initParm; if(parm->chip_clk == 0) parm->chip_clk = (getChipType() == SM750LE)? @@ -172,7 +171,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) /* Set up GPIO for software I2C to program DVI chip in the Xilinx SP605 board, in order to have video signal. */ - swI2CInit(0,1); + swI2CInit(0, 1); /* Customer may NOT use CH7301 DVI chip, which has to be @@ -194,14 +193,13 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) /* init 2d engine */ if(!share->accel_off){ hw_sm750_initAccel(share); -// share->accel.de_wait = hw_sm750_deWait; } return 0; } -resource_size_t hw_sm750_getVMSize(struct lynx_share * share) +resource_size_t hw_sm750_getVMSize(struct lynx_share *share) { resource_size_t ret; @@ -267,10 +265,10 @@ void hw_sm750_output_clear(struct lynxfb_output* output) int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var) { - struct lynx_share * share; + struct lynx_share *share; - share = container_of(crtc, struct lynxfb_par,crtc)->share; + share = container_of(crtc, struct lynxfb_par, crtc)->share; switch (var->bits_per_pixel){ case 8: @@ -298,12 +296,12 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var, struct fb_fix_screeninfo* fix) { - int ret,fmt; + int ret, fmt; u32 reg; mode_parameter_t modparm; clock_type_t clock; - struct lynx_share * share; - struct lynxfb_par * par; + struct lynx_share *share; + struct lynxfb_par *par; ret = 0; @@ -329,7 +327,6 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, #endif /* set timing */ -// modparm.pixel_clock = PS_TO_HZ(var->pixclock); modparm.pixel_clock = ps_to_hz(var->pixclock); modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG; modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG; @@ -365,7 +362,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, reg = var->xres * (var->bits_per_pixel >> 3); /* crtc->channel is not equal to par->index on numeric,be aware of that */ - reg = PADDING(crtc->line_pad,reg); + reg = PADDING(crtc->line_pad, reg); POKE32(PANEL_FB_WIDTH, FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)| @@ -383,7 +380,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, POKE32(PANEL_PLANE_BR, FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)| - FIELD_VALUE(0, PANEL_PLANE_BR,RIGHT, var->xres - 1)); + FIELD_VALUE(0, PANEL_PLANE_BR, RIGHT, var->xres - 1)); /* set pixel format */ reg = PEEK32(PANEL_DISPLAY_CTRL); @@ -424,17 +421,17 @@ void hw_sm750_crtc_clear(struct lynxfb_crtc* crtc) int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index, ushort red, ushort green, ushort blue) { - static unsigned int add[]={PANEL_PALETTE_RAM,CRT_PALETTE_RAM}; + static unsigned int add[]={PANEL_PALETTE_RAM, CRT_PALETTE_RAM}; POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue); return 0; } int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ - int dpms,crtdb; + int dpms, crtdb; switch(blank) { -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_UNBLANK: #else case VESA_NO_BLANKING: @@ -442,13 +439,13 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ dpms = CRT_DISPLAY_CTRL_DPMS_0; crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_NORMAL: dpms = CRT_DISPLAY_CTRL_DPMS_0; crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_VSYNC_SUSPEND: #else case VESA_VSYNC_SUSPEND: @@ -456,7 +453,7 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ dpms = CRT_DISPLAY_CTRL_DPMS_2; crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_HSYNC_SUSPEND: #else case VESA_HSYNC_SUSPEND: @@ -464,7 +461,7 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ dpms = CRT_DISPLAY_CTRL_DPMS_1; crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_POWERDOWN: #else case VESA_POWERDOWN: @@ -483,7 +480,7 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ return 0; } -int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) +int hw_sm750_setBLANK(struct lynxfb_output* output, int blank) { unsigned int dpms, pps, crtdb; @@ -491,7 +488,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) switch (blank) { -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_UNBLANK: #else case VESA_NO_BLANKING: @@ -501,7 +498,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) pps = PANEL_DISPLAY_CTRL_DATA_ENABLE; crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_NORMAL: pr_info("flag = FB_BLANK_NORMAL \n"); dpms = SYSTEM_CTRL_DPMS_VPHP; @@ -509,7 +506,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_VSYNC_SUSPEND: #else case VESA_VSYNC_SUSPEND: @@ -518,7 +515,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_HSYNC_SUSPEND: #else case VESA_HSYNC_SUSPEND: @@ -527,7 +524,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; crtdb = CRT_DISPLAY_CTRL_BLANK_ON; break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10) case FB_BLANK_POWERDOWN: #else case VESA_POWERDOWN: @@ -540,8 +537,8 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) if(output->paths & sm750_crt){ - POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); - POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb)); + POKE32(SYSTEM_CTRL, FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); + POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); } if(output->paths & sm750_panel){ @@ -552,28 +549,28 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) } -void hw_sm750_initAccel(struct lynx_share * share) +void hw_sm750_initAccel(struct lynx_share *share) { u32 reg; enable2DEngine(1); if(getChipType() == SM750LE){ reg = PEEK32(DE_STATE1); - reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON); - POKE32(DE_STATE1,reg); + reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, ON); + POKE32(DE_STATE1, reg); reg = PEEK32(DE_STATE1); - reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF); + reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, OFF); POKE32(DE_STATE1, reg); }else{ /* engine reset */ reg = PEEK32(SYSTEM_CTRL); - reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON); + reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, ON); POKE32(SYSTEM_CTRL, reg); reg = PEEK32(SYSTEM_CTRL); - reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,OFF); + reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, OFF); POKE32(SYSTEM_CTRL, reg); } @@ -603,9 +600,9 @@ int hw_sm750_deWait(void) int i=0x10000000; while(i--){ unsigned int dwVal = PEEK32(SYSTEM_CTRL); - if((FIELD_GET(dwVal,SYSTEM_CTRL,DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) && - (FIELD_GET(dwVal,SYSTEM_CTRL,DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) && - (FIELD_GET(dwVal,SYSTEM_CTRL,DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY)) + if((FIELD_GET(dwVal, SYSTEM_CTRL, DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) && + (FIELD_GET(dwVal, SYSTEM_CTRL, DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) && + (FIELD_GET(dwVal, SYSTEM_CTRL, DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY)) { return 0; } @@ -619,7 +616,7 @@ int hw_sm750_pan_display(struct lynxfb_crtc *crtc, const struct fb_info *info) { uint32_t total; - //check params + /* check params */ if ((var->xoffset + var->xres > var->xres_virtual) || (var->yoffset + var->yres > var->yres_virtual)) { return -EINVAL; diff --git a/drivers/staging/sm750fb/sm750_hw.h b/drivers/staging/sm750fb/sm750_hw.h index b05be5e99..93288b3a9 100644 --- a/drivers/staging/sm750fb/sm750_hw.h +++ b/drivers/staging/sm750fb/sm750_hw.h @@ -8,9 +8,6 @@ #define SM750LE_REVISION_ID (unsigned char)0xfe #endif -//#define DEFAULT_MEM_CLOCK (DEFAULT_SM750_CHIP_CLOCK/1) -//#define DEFAULT_MASTER_CLOCK (DEFAULT_SM750_CHIP_CLOCK/3) - enum sm750_pnltype{ @@ -65,7 +62,7 @@ struct sm750_state{ }; /* sm750_share stands for a presentation of two frame buffer - that use one sm750 adaptor, it is similiar to the super class of lynx_share + that use one sm750 adaptor, it is similar to the super class of lynx_share in C++ */ @@ -81,20 +78,20 @@ struct sm750_share{ */ }; -int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev); -int hw_sm750_inithw(struct lynx_share*,struct pci_dev *); +int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev); +int hw_sm750_inithw(struct lynx_share*, struct pci_dev *); void hw_sm750_initAccel(struct lynx_share *); int hw_sm750_deWait(void); int hw_sm750le_deWait(void); resource_size_t hw_sm750_getVMSize(struct lynx_share *); -int hw_sm750_output_checkMode(struct lynxfb_output*,struct fb_var_screeninfo*); -int hw_sm750_output_setMode(struct lynxfb_output*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*); -int hw_sm750_crtc_checkMode(struct lynxfb_crtc*,struct fb_var_screeninfo*); -int hw_sm750_crtc_setMode(struct lynxfb_crtc*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*); -int hw_sm750_setColReg(struct lynxfb_crtc*,ushort,ushort,ushort,ushort); -int hw_sm750_setBLANK(struct lynxfb_output*,int); -int hw_sm750le_setBLANK(struct lynxfb_output*,int); +int hw_sm750_output_checkMode(struct lynxfb_output*, struct fb_var_screeninfo*); +int hw_sm750_output_setMode(struct lynxfb_output*, struct fb_var_screeninfo*, struct fb_fix_screeninfo*); +int hw_sm750_crtc_checkMode(struct lynxfb_crtc*, struct fb_var_screeninfo*); +int hw_sm750_crtc_setMode(struct lynxfb_crtc*, struct fb_var_screeninfo*, struct fb_fix_screeninfo*); +int hw_sm750_setColReg(struct lynxfb_crtc*, ushort, ushort, ushort, ushort); +int hw_sm750_setBLANK(struct lynxfb_output*, int); +int hw_sm750le_setBLANK(struct lynxfb_output*, int); void hw_sm750_crtc_clear(struct lynxfb_crtc*); void hw_sm750_output_clear(struct lynxfb_output*); int hw_sm750_pan_display(struct lynxfb_crtc *crtc, |