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author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2015-08-05 17:04:01 -0300 |
commit | 57f0f512b273f60d52568b8c6b77e17f5636edc0 (patch) | |
tree | 5e910f0e82173f4ef4f51111366a3f1299037a7b /include/linux/platform_data/mtd-nand-omap2.h |
Initial import
Diffstat (limited to 'include/linux/platform_data/mtd-nand-omap2.h')
-rw-r--r-- | include/linux/platform_data/mtd-nand-omap2.h | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h new file mode 100644 index 000000000..090bbab01 --- /dev/null +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2006 Micron Technology Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MTD_NAND_OMAP2_H +#define _MTD_NAND_OMAP2_H + +#include <linux/mtd/partitions.h> + +#define GPMC_BCH_NUM_REMAINDER 8 + +enum nand_io { + NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ + NAND_OMAP_POLLED, /* polled mode, without prefetch */ + NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */ + NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ +}; + +enum omap_ecc { + /* + * 1-bit ECC: calculation and correction by SW + * ECC stored at end of spare area + */ + OMAP_ECC_HAM1_CODE_SW = 0, + + /* + * 1-bit ECC: calculation by GPMC, Error detection by Software + * ECC layout compatible with ROM code layout + */ + OMAP_ECC_HAM1_CODE_HW, + /* 4-bit ECC calculation by GPMC, Error detection by Software */ + OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, + /* 4-bit ECC calculation by GPMC, Error detection by ELM */ + OMAP_ECC_BCH4_CODE_HW, + /* 8-bit ECC calculation by GPMC, Error detection by Software */ + OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, + /* 8-bit ECC calculation by GPMC, Error detection by ELM */ + OMAP_ECC_BCH8_CODE_HW, + /* 16-bit ECC calculation by GPMC, Error detection by ELM */ + OMAP_ECC_BCH16_CODE_HW, +}; + +struct gpmc_nand_regs { + void __iomem *gpmc_status; + void __iomem *gpmc_nand_command; + void __iomem *gpmc_nand_address; + void __iomem *gpmc_nand_data; + void __iomem *gpmc_prefetch_config1; + void __iomem *gpmc_prefetch_config2; + void __iomem *gpmc_prefetch_control; + void __iomem *gpmc_prefetch_status; + void __iomem *gpmc_ecc_config; + void __iomem *gpmc_ecc_control; + void __iomem *gpmc_ecc_size_config; + void __iomem *gpmc_ecc1_result; + void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER]; +}; + +struct omap_nand_platform_data { + int cs; + struct mtd_partition *parts; + int nr_parts; + bool dev_ready; + bool flash_bbt; + enum nand_io xfer_type; + int devsize; + enum omap_ecc ecc_opt; + struct gpmc_nand_regs reg; + + /* for passing the partitions */ + struct device_node *of_node; + struct device_node *elm_of_node; +}; +#endif |