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diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
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+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * Device Tree for the HREF+ prior to the v60 variant.
+ */
+
+#include "ste-dbx5x0.dtsi"
+#include "ste-href-ab8500.dtsi"
+#include "ste-href.dtsi"
+
+/ {
+ gpio_keys {
+ button@1 {
+ gpios = <&tc3589x_gpio 7 0x4>;
+ };
+ };
+
+ soc {
+ i2c@80004000 {
+ tps61052@33 {
+ compatible = "tps61052";
+ reg = <0x33>;
+ };
+
+ tc35892@42 {
+ compatible = "toshiba,tc35892";
+ reg = <0x42>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&tc35892_hrefprev60_mode>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ tc3589x_gpio: tc3589x_gpio {
+ compatible = "tc3589x-gpio";
+ interrupts = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+
+ ssp@80002000 {
+ /*
+ * On the first generation boards, this SSP/SPI port was connected
+ * to the AB8500.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp0_hrefprev60_mode>;
+ };
+
+ // External Micro SD slot
+ sdi0_per1@80126000 {
+ cd-gpios = <&tc3589x_gpio 3 0x4>;
+ };
+
+ vmmci: regulator-gpio {
+ gpios = <&tc3589x_gpio 18 0x4>;
+ enable-gpio = <&tc3589x_gpio 17 0x4>;
+ };
+
+ pinctrl {
+ /* Set this up using hogs */
+ pinctrl-names = "default";
+ pinctrl-0 = <&ipgpio_hrefprev60_mode>;
+
+ ssp0 {
+ ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
+ hrefprev60_mux {
+ function = "ssp0";
+ groups = "ssp0_a_1";
+ };
+ hrefprev60_cfg1 {
+ pins = "GPIO145_C13"; /* RXD */
+ ste,config = <&in_pd>;
+ };
+
+ };
+ };
+ sdi0 {
+ /* This additional pin needed on early MOP500 and HREFs previous to v60 */
+ sdi0_default_mode: sdi0_default {
+ hrefprev60_mux {
+ function = "mc0";
+ groups = "mc0dat31dir_a_1";
+ };
+ hrefprev60_cfg1 {
+ pins = "GPIO21_AB3"; /* DAT31DIR */
+ ste,config = <&out_hi>;
+ };
+
+ };
+ };
+ tc35892 {
+ tc35892_hrefprev60_mode: tc35892_hrefprev60 {
+ hrefprev60_cfg {
+ pins = "GPIO217_AH12";
+ ste,config = <&gpio_in_pu>;
+ };
+ };
+ };
+ ipgpio {
+ ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
+ hrefprev60_mux {
+ function = "ipgpio";
+ groups = "ipgpio0_c_1", "ipgpio1_c_1";
+ };
+ hrefprev60_cfg1 {
+ pins = "GPIO6_AF6", "GPIO7_AG5";
+ ste,config = <&in_pu>;
+ };
+ };
+ };
+ };
+ };
+};