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-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c11
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c60
-rw-r--r--arch/arm/mach-ux500/cpu.c20
-rw-r--r--arch/arm/mach-ux500/id.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c35
-rw-r--r--arch/arm/mach-ux500/pm.c15
-rw-r--r--arch/arm/mach-ux500/setup.h16
7 files changed, 59 insertions, 100 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index e97ee556f..7557bede7 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -6,6 +6,7 @@
#include <linux/io.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <asm/hardware/cache-l2x0.h>
@@ -15,7 +16,14 @@
static int __init ux500_l2x0_unlock(void)
{
int i;
- void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE);
+ struct device_node *np;
+ void __iomem *l2x0_base;
+
+ np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
+ l2x0_base = of_iomap(np, 0);
+ of_node_put(np);
+ if (!l2x0_base)
+ return -ENODEV;
/*
* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
@@ -30,6 +38,7 @@ static int __init ux500_l2x0_unlock(void)
writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
i * L2X0_LOCKDOWN_STRIDE);
}
+ iounmap(l2x0_base);
return 0;
}
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 6f63954c8..16913800b 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -43,60 +43,10 @@ static struct prcmu_pdata db8500_prcmu_pdata = {
.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
};
-/* minimum static i/o mapping required to boot U8500 platforms */
-static struct map_desc u8500_uart_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
-};
-/* U8500 and U9540 common io_desc */
-static struct map_desc u8500_common_io_desc[] __initdata = {
- /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
- __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
-
- __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
-
- __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
-};
-
-/* U8500 IO map specific description */
-static struct map_desc u8500_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
-
-};
-
-/* U9540 IO map specific description */
-static struct map_desc u9540_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
- __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
-};
-
static void __init u8500_map_io(void)
{
- /*
- * Map the UARTs early so that the DEBUG_LL stuff continues to work.
- */
- iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
-
- ux500_map_io();
-
- iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
-
- if (cpu_is_ux540_family())
- iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
- else
- iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
+ debug_ll_io_init();
+ ux500_setup_id();
}
/*
@@ -125,14 +75,18 @@ static struct arm_pmu_platdata db8500_pmu_platdata = {
static const char *db8500_read_soc_id(void)
{
- void __iomem *uid = __io_address(U8500_BB_UID_BASE);
+ void __iomem *uid;
+ uid = ioremap(U8500_BB_UID_BASE, 0x20);
+ if (!uid)
+ return NULL;
/* Throw these device-specific numbers into the entropy pool */
add_device_randomness(uid, 0x14);
return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
readl((u32 *)uid+0),
readl((u32 *)uid+1), readl((u32 *)uid+2),
readl((u32 *)uid+3), readl((u32 *)uid+4));
+ iounmap(uid);
}
static struct device * __init db8500_soc_device_init(void)
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 6ced0f680..e31d3d61c 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -16,6 +16,7 @@
#include <linux/stat.h>
#include <linux/of.h>
#include <linux/of_irq.h>
+#include <linux/of_address.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
@@ -52,31 +53,36 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)
*/
void __init ux500_init_irq(void)
{
+ struct device_node *np;
+ struct resource r;
+
gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
irqchip_init();
+ np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
+ of_address_to_resource(np, 0, &r);
+ of_node_put(np);
+ if (!r.start) {
+ pr_err("could not find PRCMU base resource\n");
+ return;
+ }
+ prcmu_early_init(r.start, r.end-r.start);
+ ux500_pm_init(r.start, r.end-r.start);
/*
* Init clocks here so that they are available for system timer
* initialization.
*/
if (cpu_is_u8500_family()) {
- prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
- ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
-
u8500_of_clk_init(U8500_CLKRST1_BASE,
U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE,
U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE);
} else if (cpu_is_u9540()) {
- prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
- ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE);
} else if (cpu_is_u8540()) {
- prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
- ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE);
diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c
index 392f2fdb3..1e81e9900 100644
--- a/arch/arm/mach-ux500/id.c
+++ b/arch/arm/mach-ux500/id.c
@@ -72,7 +72,7 @@ static unsigned int partnumber(unsigned int asicid)
* DB9540 0x413fc090 0xFFFFDBF4 0x009540xx
*/
-void __init ux500_map_io(void)
+void __init ux500_setup_id(void)
{
unsigned int cpuid = read_cpuid_id();
unsigned int asicid = 0;
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index a44967f31..62b1de922 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,6 +16,8 @@
#include <linux/device.h>
#include <linux/smp.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -26,6 +28,9 @@
#include "db8500-regs.h"
#include "id.h"
+static void __iomem *scu_base;
+static void __iomem *backupram;
+
/* This is called from headsmp.S to wakeup the secondary core */
extern void u8500_secondary_startup(void);
@@ -41,16 +46,6 @@ static void write_pen_release(int val)
sync_cache_w(&pen_release);
}
-static void __iomem *scu_base_addr(void)
-{
- if (cpu_is_u8500_family() || cpu_is_ux540_family())
- return __io_address(U8500_SCU_BASE);
- else
- ux500_unknown_soc();
-
- return NULL;
-}
-
static DEFINE_SPINLOCK(boot_lock);
static void ux500_secondary_init(unsigned int cpu)
@@ -104,13 +99,6 @@ static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init wakeup_secondary(void)
{
- void __iomem *backupram;
-
- if (cpu_is_u8500_family() || cpu_is_ux540_family())
- backupram = __io_address(U8500_BACKUPRAM0_BASE);
- else
- ux500_unknown_soc();
-
/*
* write the address of secondary startup into the backup ram register
* at offset 0x1FF4, then write the magic number 0xA1FEED01 to the
@@ -135,10 +123,16 @@ static void __init wakeup_secondary(void)
*/
static void __init ux500_smp_init_cpus(void)
{
- void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
+ struct device_node *np;
- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+ np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+ scu_base = of_iomap(np, 0);
+ of_node_put(np);
+ if (!scu_base)
+ return;
+ backupram = ioremap(U8500_BACKUPRAM0_BASE, SZ_8K);
+ ncores = scu_get_core_count(scu_base);
/* sanity check */
if (ncores > nr_cpu_ids) {
@@ -153,8 +147,7 @@ static void __init ux500_smp_init_cpus(void)
static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
{
-
- scu_enable(scu_base_addr());
+ scu_enable(scu_base);
wakeup_secondary();
}
diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c
index 2cb587b50..8538910db 100644
--- a/arch/arm/mach-ux500/pm.c
+++ b/arch/arm/mach-ux500/pm.c
@@ -15,6 +15,8 @@
#include <linux/io.h>
#include <linux/suspend.h>
#include <linux/platform_data/arm-ux500-pm.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "db8500-regs.h"
#include "pm_domains.h"
@@ -42,6 +44,7 @@
#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C)
static void __iomem *prcmu_base;
+static void __iomem *dist_base;
/* This function decouple the gic from the prcmu */
int prcmu_gic_decouple(void)
@@ -88,7 +91,6 @@ bool prcmu_gic_pending_irq(void)
{
u32 pr; /* Pending register */
u32 er; /* Enable register */
- void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
int i;
/* 5 registers. STI & PPI not skipped */
@@ -143,7 +145,6 @@ bool prcmu_is_cpu_in_wfi(int cpu)
int prcmu_copy_gic_settings(void)
{
u32 er; /* Enable register */
- void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
int i;
/* We skip the STI and PPI */
@@ -179,11 +180,21 @@ static const struct platform_suspend_ops ux500_suspend_ops = {
void __init ux500_pm_init(u32 phy_base, u32 size)
{
+ struct device_node *np;
+
prcmu_base = ioremap(phy_base, size);
if (!prcmu_base) {
pr_err("could not remap PRCMU for PM functions\n");
return;
}
+ np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
+ dist_base = of_iomap(np, 0);
+ of_node_put(np);
+ if (!dist_base) {
+ pr_err("could not remap GIC dist base for PM functions\n");
+ return;
+ }
+
/*
* On watchdog reboot the GIC is in some cases decoupled.
* This will make sure that the GIC is correctly configured.
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index 2dea8b59d..1fb6ad278 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -18,7 +18,7 @@
void ux500_restart(enum reboot_mode mode, const char *cmd);
-void __init ux500_map_io(void);
+void __init ux500_setup_id(void);
extern void __init ux500_init_irq(void);
@@ -26,20 +26,6 @@ extern struct device *ux500_soc_device_init(const char *soc_id);
extern void ux500_timer_init(void);
-#define __IO_DEV_DESC(x, sz) { \
- .virtual = IO_ADDRESS(x), \
- .pfn = __phys_to_pfn(x), \
- .length = sz, \
- .type = MT_DEVICE, \
-}
-
-#define __MEM_DEV_DESC(x, sz) { \
- .virtual = IO_ADDRESS(x), \
- .pfn = __phys_to_pfn(x), \
- .length = sz, \
- .type = MT_MEMORY_RWX, \
-}
-
extern struct smp_operations ux500_smp_ops;
extern void ux500_cpu_die(unsigned int cpu);