diff options
Diffstat (limited to 'arch/arm64/boot/dts/socionext')
| -rw-r--r-- | arch/arm64/boot/dts/socionext/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts (renamed from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts) | 17 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi (renamed from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi) | 41 |
3 files changed, 24 insertions, 36 deletions
diff --git a/arch/arm64/boot/dts/socionext/Makefile b/arch/arm64/boot/dts/socionext/Makefile index 8d727717c..299b67ec4 100644 --- a/arch/arm64/boot/dts/socionext/Makefile +++ b/arch/arm64/boot/dts/socionext/Makefile @@ -1,4 +1,4 @@ -dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld10-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld20-ref.dtb always := $(dtb-y) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts index 3e533178b..b0ed44313 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for UniPhier PH1-LD10 Reference Board + * Device Tree Source for UniPhier PH1-LD20 Reference Board * * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> * @@ -43,12 +43,12 @@ */ /dts-v1/; -/include/ "uniphier-ph1-ld10.dtsi" +/include/ "uniphier-ph1-ld20.dtsi" /include/ "uniphier-support-card.dtsi" / { - model = "UniPhier PH1-LD10 Reference Board"; - compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10"; + model = "UniPhier PH1-LD20 Reference Board"; + compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20"; memory { device_type = "memory"; @@ -70,18 +70,9 @@ i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; - i2c6 = &i2c6; }; }; -&extbus { - ranges = <1 0x00000000 0x42000000 0x02000000>; -}; - -&support_card { - ranges = <0x00000000 1 0x01f00000 0x00100000>; -}; - ðsc { interrupts = <0 48 4>; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi index 0296af9cb..651c9d9d2 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi @@ -1,5 +1,5 @@ /* - * Device Tree Source for UniPhier PH1-LD10 SoC + * Device Tree Source for UniPhier PH1-LD20 SoC * * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> * @@ -43,7 +43,7 @@ */ / { - compatible = "socionext,ph1-ld10"; + compatible = "socionext,ph1-ld20"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&gic>; @@ -133,12 +133,6 @@ #size-cells = <1>; ranges = <0 0 0 0xffffffff>; - extbus: extbus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - }; - serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; status = "disabled"; @@ -207,15 +201,12 @@ i2c2: i2c@58782000 { compatible = "socionext,uniphier-fi2c"; - status = "disabled"; reg = <0x58782000 0x80>; #address-cells = <1>; #size-cells = <0>; interrupts = <0 43 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; clocks = <&i2c_clk>; - clock-frequency = <100000>; + clock-frequency = <400000>; }; i2c3: i2c@58783000 { @@ -233,12 +224,15 @@ i2c4: i2c@58784000 { compatible = "socionext,uniphier-fi2c"; + status = "disabled"; reg = <0x58784000 0x80>; #address-cells = <1>; #size-cells = <0>; interrupts = <0 45 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; clocks = <&i2c_clk>; - clock-frequency = <400000>; + clock-frequency = <100000>; }; i2c5: i2c@58785000 { @@ -251,18 +245,21 @@ clock-frequency = <400000>; }; - i2c6: i2c@58786000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 26 4>; - clocks = <&i2c_clk>; - clock-frequency = <400000>; + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; }; pinctrl: pinctrl@5f801000 { - compatible = "socionext,ph1-ld10-pinctrl", "syscon"; + compatible = "socionext,ph1-ld20-pinctrl", "syscon"; reg = <0x5f801000 0xe00>; }; |