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Diffstat (limited to 'arch/mips/include/asm/mach-tx49xx')
-rw-r--r--arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h24
-rw-r--r--arch/mips/include/asm/mach-tx49xx/ioremap.h43
-rw-r--r--arch/mips/include/asm/mach-tx49xx/kmalloc.h6
-rw-r--r--arch/mips/include/asm/mach-tx49xx/mangle-port.h26
-rw-r--r--arch/mips/include/asm/mach-tx49xx/spaces.h17
-rw-r--r--arch/mips/include/asm/mach-tx49xx/war.h24
6 files changed, 140 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
new file mode 100644
index 000000000..7f5144c6c
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
@@ -0,0 +1,24 @@
+#ifndef __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_llsc 1
+#define cpu_has_64bits 1
+#define cpu_has_inclusive_pcaches 0
+
+#define cpu_has_mips16 0
+#define cpu_has_mdmx 0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips 0
+#define cpu_has_vtag_icache 0
+#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_dsp 0
+#define cpu_has_dsp2 0
+#define cpu_has_mipsmt 0
+#define cpu_has_userlocal 0
+
+#define cpu_has_mips32r1 0
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
+#endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/ioremap.h b/arch/mips/include/asm/mach-tx49xx/ioremap.h
new file mode 100644
index 000000000..4b6a8441b
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/ioremap.h
@@ -0,0 +1,43 @@
+/*
+ * include/asm-mips/mach-tx49xx/ioremap.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MACH_TX49XX_IOREMAP_H
+#define __ASM_MACH_TX49XX_IOREMAP_H
+
+#include <linux/types.h>
+
+/*
+ * Allow physical addresses to be fixed up to help peripherals located
+ * outside the low 32-bit range -- generic pass-through version.
+ */
+static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
+{
+ return phys_addr;
+}
+
+static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
+ unsigned long flags)
+{
+#ifdef CONFIG_64BIT
+#define TXX9_DIRECTMAP_BASE 0xfff000000ul
+#else
+#define TXX9_DIRECTMAP_BASE 0xff000000ul
+#endif
+ if (offset >= TXX9_DIRECTMAP_BASE &&
+ offset < TXX9_DIRECTMAP_BASE + 0x400000)
+ return (void __iomem *)(unsigned long)(int)offset;
+ return NULL;
+}
+
+static inline int plat_iounmap(const volatile void __iomem *addr)
+{
+ return (unsigned long)addr >=
+ (unsigned long)(int)(TXX9_DIRECTMAP_BASE & 0xffffffff);
+}
+
+#endif /* __ASM_MACH_TX49XX_IOREMAP_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/kmalloc.h b/arch/mips/include/asm/mach-tx49xx/kmalloc.h
new file mode 100644
index 000000000..ff9a8b86c
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/kmalloc.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_TX49XX_KMALLOC_H
+#define __ASM_MACH_TX49XX_KMALLOC_H
+
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
+#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h
new file mode 100644
index 000000000..490867b03
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H
+#define __ASM_MACH_TX49XX_MANGLE_PORT_H
+
+#define __swizzle_addr_b(port) (port)
+#define __swizzle_addr_w(port) (port)
+#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
+
+#define ioswabb(a, x) (x)
+#define __mem_ioswabb(a, x) (x)
+#if defined(CONFIG_TOSHIBA_RBTX4939) && \
+ IS_ENABLED(CONFIG_SMC91X) && \
+ defined(__BIG_ENDIAN)
+#define NEEDS_TXX9_IOSWABW
+extern u16 (*ioswabw)(volatile u16 *a, u16 x);
+extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
+#else
+#define ioswabw(a, x) le16_to_cpu(x)
+#define __mem_ioswabw(a, x) (x)
+#endif
+#define ioswabl(a, x) le32_to_cpu(x)
+#define __mem_ioswabl(a, x) (x)
+#define ioswabq(a, x) le64_to_cpu(x)
+#define __mem_ioswabq(a, x) (x)
+
+#endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/spaces.h b/arch/mips/include/asm/mach-tx49xx/spaces.h
new file mode 100644
index 000000000..0cb10a6f4
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/spaces.h
@@ -0,0 +1,17 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_TX49XX_SPACES_H
+#define _ASM_TX49XX_SPACES_H
+
+#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
+
+#include <asm/mach-generic/spaces.h>
+
+#endif /* __ASM_TX49XX_SPACES_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/war.h b/arch/mips/include/asm/mach-tx49xx/war.h
new file mode 100644
index 000000000..a8e2c586a
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/war.h
@@ -0,0 +1,24 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_TX49XX_WAR_H
+#define __ASM_MIPS_MACH_TX49XX_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 1
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_TX49XX_WAR_H */