From 57f0f512b273f60d52568b8c6b77e17f5636edc0 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Wed, 5 Aug 2015 17:04:01 -0300 Subject: Initial import --- arch/arm/mach-sa1100/pm.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 arch/arm/mach-sa1100/pm.c (limited to 'arch/arm/mach-sa1100/pm.c') diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c new file mode 100644 index 000000000..34853d5df --- /dev/null +++ b/arch/arm/mach-sa1100/pm.c @@ -0,0 +1,126 @@ +/* + * SA1100 Power Management Routines + * + * Copyright (c) 2001 Cliff Brake + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + * + * History: + * + * 2001-02-06: Cliff Brake Initial code + * + * 2001-02-25: Sukjae Cho & + * Chester Kuo + * Save more value for the resume function! Support + * Bitsy/Assabet/Freebird board + * + * 2001-08-29: Nicolas Pitre + * Cleaned up, pushed platform dependent stuff + * in the platform specific files. + * + * 2002-05-27: Nicolas Pitre Killed sleep.h and the kmalloced save array. + * Storage is local on the stack now. + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +extern int sa1100_finish_suspend(unsigned long); + +#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x +#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] + +/* + * List of global SA11x0 peripheral registers to preserve. + * More ones like CP and general purpose register values are preserved + * on the stack and then the stack pointer is stored last in sleep.S. + */ +enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR, + SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR, + + SLEEP_SAVE_Ser1SDCR0, + + SLEEP_SAVE_COUNT +}; + + +static int sa11x0_pm_enter(suspend_state_t state) +{ + unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT]; + + gpio = GPLR; + + /* save vital registers */ + SAVE(GPDR); + SAVE(GAFR); + + SAVE(PPDR); + SAVE(PPSR); + SAVE(PPAR); + SAVE(PSDR); + + SAVE(Ser1SDCR0); + + /* Clear previous reset status */ + RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR; + + /* set resume return address */ + PSPR = virt_to_phys(cpu_resume); + + /* go zzz */ + cpu_suspend(0, sa1100_finish_suspend); + + /* + * Ensure not to come back here if it wasn't intended + */ + RCSR = RCSR_SMR; + PSPR = 0; + + /* + * Ensure interrupt sources are disabled; we will re-init + * the interrupt subsystem via the device manager. + */ + ICLR = 0; + ICCR = 1; + ICMR = 0; + + /* restore registers */ + RESTORE(GPDR); + RESTORE(GAFR); + + RESTORE(PPDR); + RESTORE(PPSR); + RESTORE(PPAR); + RESTORE(PSDR); + + RESTORE(Ser1SDCR0); + + GPSR = gpio; + GPCR = ~gpio; + + /* + * Clear the peripheral sleep-hold bit. + */ + PSSR = PSSR_PH; + + return 0; +} + +static const struct platform_suspend_ops sa11x0_pm_ops = { + .enter = sa11x0_pm_enter, + .valid = suspend_valid_only_mem, +}; + +int __init sa11x0_pm_init(void) +{ + suspend_set_ops(&sa11x0_pm_ops); + return 0; +} -- cgit v1.2.3-54-g00ecf