From 57f0f512b273f60d52568b8c6b77e17f5636edc0 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Wed, 5 Aug 2015 17:04:01 -0300 Subject: Initial import --- arch/sh/include/asm/hw_irq.h | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/sh/include/asm/hw_irq.h (limited to 'arch/sh/include/asm/hw_irq.h') diff --git a/arch/sh/include/asm/hw_irq.h b/arch/sh/include/asm/hw_irq.h new file mode 100644 index 000000000..693d44184 --- /dev/null +++ b/arch/sh/include/asm/hw_irq.h @@ -0,0 +1,35 @@ +#ifndef __ASM_SH_HW_IRQ_H +#define __ASM_SH_HW_IRQ_H + +#include +#include +#include + +extern atomic_t irq_err_count; + +struct ipr_data { + unsigned char irq; + unsigned char ipr_idx; /* Index for the IPR registered */ + unsigned char shift; /* Number of bits to shift the data */ + unsigned char priority; /* The priority */ +}; + +struct ipr_desc { + unsigned long *ipr_offsets; + unsigned int nr_offsets; + struct ipr_data *ipr_data; + unsigned int nr_irqs; + struct irq_chip chip; +}; + +void register_ipr_controller(struct ipr_desc *); + +void __init plat_irq_setup(void); +void __init plat_irq_setup_sh3(void); +void __init plat_irq_setup_pins(int mode); + +enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, + IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, + IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; + +#endif /* __ASM_SH_HW_IRQ_H */ -- cgit v1.2.3-54-g00ecf