From 863981e96738983919de841ec669e157e6bdaeb0 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Sun, 11 Sep 2016 04:34:46 -0300 Subject: Linux-libre 4.7.1-gnu --- arch/tile/Kconfig | 69 ++++++++++++++++--------------------- arch/tile/configs/tilegx_defconfig | 5 +-- arch/tile/configs/tilepro_defconfig | 5 +-- arch/tile/gxio/mpipe.c | 2 +- arch/tile/include/asm/atomic_64.h | 17 +++++++-- arch/tile/include/asm/pgtable.h | 1 - arch/tile/include/asm/thread_info.h | 2 +- arch/tile/include/uapi/asm/unistd.h | 1 + arch/tile/kernel/pci_gx.c | 4 +-- arch/tile/kernel/perf_event.c | 6 ++-- arch/tile/kernel/process.c | 7 ++-- arch/tile/kernel/setup.c | 4 +-- arch/tile/kernel/unaligned.c | 4 +-- arch/tile/mm/hugetlbpage.c | 7 +++- arch/tile/mm/init.c | 2 +- arch/tile/mm/pgtable.c | 2 +- 16 files changed, 70 insertions(+), 68 deletions(-) (limited to 'arch/tile') diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 81719302b..4820a0283 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -3,47 +3,38 @@ config TILE def_bool y - select HAVE_PERF_EVENTS - select USE_PMC if PERF_EVENTS - select HAVE_DMA_API_DEBUG - select HAVE_KVM if !TILEGX - select GENERIC_FIND_FIRST_BIT - select SYSCTL_EXCEPTION_TRACE - select CC_OPTIMIZE_FOR_SIZE - select HAVE_DEBUG_KMEMLEAK - select GENERIC_IRQ_PROBE - select GENERIC_PENDING_IRQ if SMP - select GENERIC_IRQ_SHOW - select HAVE_DEBUG_BUGVERBOSE - select VIRT_TO_BUS - select SYS_HYPERVISOR + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAVE_NMI_SAFE_CMPXCHG - select GENERIC_CLOCKEVENTS - select MODULES_USE_ELF_RELA - select HAVE_ARCH_TRACEHOOK - select HAVE_SYSCALL_TRACEPOINTS - select USER_STACKTRACE_SUPPORT - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE - select HAVE_DEBUG_STACKOVERFLOW select ARCH_WANT_FRAME_POINTERS - select HAVE_CONTEXT_TRACKING + select CC_OPTIMIZE_FOR_SIZE select EDAC_SUPPORT + select GENERIC_CLOCKEVENTS + select GENERIC_FIND_FIRST_BIT + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_PENDING_IRQ if SMP select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNLEN_USER select HAVE_ARCH_SECCOMP_FILTER - -# FIXME: investigate whether we need/want these options. -# select HAVE_IOREMAP_PROT -# select HAVE_OPTPROBES -# select HAVE_REGS_AND_STACK_ACCESS_API -# select HAVE_HW_BREAKPOINT -# select PERF_EVENTS -# select HAVE_USER_RETURN_NOTIFIER -# config NO_BOOTMEM -# config ARCH_SUPPORTS_DEBUG_PAGEALLOC -# config HUGETLB_PAGE_SIZE_VARIABLE + select HAVE_ARCH_TRACEHOOK + select HAVE_CONTEXT_TRACKING + select HAVE_DEBUG_BUGVERBOSE + select HAVE_DEBUG_KMEMLEAK + select HAVE_DEBUG_STACKOVERFLOW + select HAVE_DMA_API_DEBUG + select HAVE_EXIT_THREAD + select HAVE_KVM if !TILEGX + select HAVE_NMI if USE_PMC + select HAVE_PERF_EVENTS + select HAVE_SYSCALL_TRACEPOINTS + select MODULES_USE_ELF_RELA + select SYSCTL_EXCEPTION_TRACE + select SYS_HYPERVISOR + select USER_STACKTRACE_SUPPORT + select USE_PMC if PERF_EVENTS + select VIRT_TO_BUS config MMU def_bool y @@ -130,17 +121,17 @@ config HVC_TILE # 64-bit TILE-Gx toolchain, so force CONFIG_TILEGX on. config TILEGX def_bool ARCH != "tilepro" - select SPARSE_IRQ + select ARCH_SUPPORTS_ATOMIC_RMW select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ - select HAVE_FUNCTION_TRACER - select HAVE_FUNCTION_GRAPH_TRACER + select HAVE_ARCH_JUMP_LABEL + select HAVE_ARCH_KGDB select HAVE_DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD + select HAVE_FUNCTION_GRAPH_TRACER + select HAVE_FUNCTION_TRACER select HAVE_KPROBES select HAVE_KRETPROBES - select HAVE_ARCH_KGDB - select ARCH_SUPPORTS_ATOMIC_RMW - select HAVE_ARCH_JUMP_LABEL + select SPARSE_IRQ config TILEPRO def_bool !TILEGX diff --git a/arch/tile/configs/tilegx_defconfig b/arch/tile/configs/tilegx_defconfig index 3f3dfb8b1..fd122ef45 100644 --- a/arch/tile/configs/tilegx_defconfig +++ b/arch/tile/configs/tilegx_defconfig @@ -16,7 +16,6 @@ CONFIG_CGROUP_DEBUG=y CONFIG_CGROUP_DEVICE=y CONFIG_CPUSETS=y CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y CONFIG_CGROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y CONFIG_BLK_CGROUP=y @@ -89,7 +88,6 @@ CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y -CONFIG_IPV6_PRIVACY=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y @@ -221,8 +219,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_TUN=y CONFIG_VETH=m CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6131=y -CONFIG_NET_DSA_MV88E6123=y +CONFIG_NET_DSA_MV88E6XXX=y CONFIG_SKY2=y CONFIG_PTP_1588_CLOCK_TILEGX=y # CONFIG_WLAN is not set diff --git a/arch/tile/configs/tilepro_defconfig b/arch/tile/configs/tilepro_defconfig index ef9e27eb2..eb6a55944 100644 --- a/arch/tile/configs/tilepro_defconfig +++ b/arch/tile/configs/tilepro_defconfig @@ -15,7 +15,6 @@ CONFIG_CGROUP_DEBUG=y CONFIG_CGROUP_DEVICE=y CONFIG_CPUSETS=y CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y CONFIG_CGROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y CONFIG_BLK_CGROUP=y @@ -85,7 +84,6 @@ CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y -CONFIG_IPV6_PRIVACY=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y @@ -340,8 +338,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_TUN=y CONFIG_VETH=m CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6131=y -CONFIG_NET_DSA_MV88E6123=y +CONFIG_NET_DSA_MV88E6XXX=y # CONFIG_NET_VENDOR_3COM is not set CONFIG_E1000E=y # CONFIG_WLAN is not set diff --git a/arch/tile/gxio/mpipe.c b/arch/tile/gxio/mpipe.c index f102048d9..34de300ab 100644 --- a/arch/tile/gxio/mpipe.c +++ b/arch/tile/gxio/mpipe.c @@ -122,7 +122,7 @@ size_t gxio_mpipe_calc_buffer_stack_bytes(unsigned long buffers) { const int BUFFERS_PER_LINE = 12; - /* Count the number of cachlines. */ + /* Count the number of cachelines. */ unsigned long lines = (buffers + BUFFERS_PER_LINE - 1) / BUFFERS_PER_LINE; diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h index 51cabc26e..b0531a623 100644 --- a/arch/tile/include/asm/atomic_64.h +++ b/arch/tile/include/asm/atomic_64.h @@ -37,12 +37,25 @@ static inline void atomic_add(int i, atomic_t *v) __insn_fetchadd4((void *)&v->counter, i); } +/* + * Note a subtlety of the locking here. We are required to provide a + * full memory barrier before and after the operation. However, we + * only provide an explicit mb before the operation. After the + * operation, we use barrier() to get a full mb for free, because: + * + * (1) The barrier directive to the compiler prohibits any instructions + * being statically hoisted before the barrier; + * (2) the microarchitecture will not issue any further instructions + * until the fetchadd result is available for the "+ i" add instruction; + * (3) the smb_mb before the fetchadd ensures that no other memory + * operations are in flight at this point. + */ static inline int atomic_add_return(int i, atomic_t *v) { int val; smp_mb(); /* barrier for proper semantics */ val = __insn_fetchadd4((void *)&v->counter, i) + i; - barrier(); /* the "+ i" above will wait on memory */ + barrier(); /* equivalent to smp_mb(); see block comment above */ return val; } @@ -95,7 +108,7 @@ static inline long atomic64_add_return(long i, atomic64_t *v) int val; smp_mb(); /* barrier for proper semantics */ val = __insn_fetchadd((void *)&v->counter, i) + i; - barrier(); /* the "+ i" above will wait on memory */ + barrier(); /* equivalent to smp_mb; see atomic_add_return() */ return val; } diff --git a/arch/tile/include/asm/pgtable.h b/arch/tile/include/asm/pgtable.h index 96cecf555..2a26cc4fe 100644 --- a/arch/tile/include/asm/pgtable.h +++ b/arch/tile/include/asm/pgtable.h @@ -487,7 +487,6 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) } #ifdef CONFIG_TRANSPARENT_HUGEPAGE -#define has_transparent_hugepage() 1 #define pmd_trans_huge pmd_huge_page #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h index 4b7cef9e9..c1467ac59 100644 --- a/arch/tile/include/asm/thread_info.h +++ b/arch/tile/include/asm/thread_info.h @@ -78,7 +78,7 @@ struct thread_info { #ifndef __ASSEMBLY__ -void arch_release_thread_info(struct thread_info *info); +void arch_release_thread_stack(unsigned long *stack); /* How to get the thread information struct from C. */ register unsigned long stack_pointer __asm__("sp"); diff --git a/arch/tile/include/uapi/asm/unistd.h b/arch/tile/include/uapi/asm/unistd.h index 3866397aa..24e9187e8 100644 --- a/arch/tile/include/uapi/asm/unistd.h +++ b/arch/tile/include/uapi/asm/unistd.h @@ -12,6 +12,7 @@ * more details. */ +#define __ARCH_WANT_RENAMEAT #if !defined(__LP64__) || defined(__SYSCALL_COMPAT) /* Use the flavor of this syscall that matches the 32-bit API better. */ #define __ARCH_WANT_SYNC_FILE_RANGE2 diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index aa2b44cd8..0e7a5d09e 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -40,7 +40,7 @@ #include /* - * This file containes the routines to search for PCI buses, + * This file contains the routines to search for PCI buses, * enumerate the buses, and configure any attached devices. */ @@ -434,7 +434,7 @@ int __init tile_pci_init(void) /* * Now determine which PCIe ports are configured to operate in RC - * mode. There is a differece in the port configuration capability + * mode. There is a difference in the port configuration capability * between the Gx36 and Gx72 devices. * * The Gx36 has configuration capability for each of the 3 PCIe diff --git a/arch/tile/kernel/perf_event.c b/arch/tile/kernel/perf_event.c index 8767060d7..6394c1ccb 100644 --- a/arch/tile/kernel/perf_event.c +++ b/arch/tile/kernel/perf_event.c @@ -941,7 +941,7 @@ arch_initcall(init_hw_perf_events); /* * Tile specific backtracing code for perf_events. */ -static inline void perf_callchain(struct perf_callchain_entry *entry, +static inline void perf_callchain(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { struct KBacktraceIterator kbt; @@ -992,13 +992,13 @@ static inline void perf_callchain(struct perf_callchain_entry *entry, } } -void perf_callchain_user(struct perf_callchain_entry *entry, +void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { perf_callchain(entry, regs); } -void perf_callchain_kernel(struct perf_callchain_entry *entry, +void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { perf_callchain(entry, regs); diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c index b5f30d376..a465d8372 100644 --- a/arch/tile/kernel/process.c +++ b/arch/tile/kernel/process.c @@ -73,8 +73,9 @@ void arch_cpu_idle(void) /* * Release a thread_info structure */ -void arch_release_thread_info(struct thread_info *info) +void arch_release_thread_stack(unsigned long *stack) { + struct thread_info *info = (void *)stack; struct single_step_state *step_state = info->step_state; if (step_state) { @@ -541,7 +542,7 @@ void flush_thread(void) /* * Free current thread data structures etc.. */ -void exit_thread(void) +void exit_thread(struct task_struct *tsk) { #ifdef CONFIG_HARDWALL /* @@ -550,7 +551,7 @@ void exit_thread(void) * the last reference to a hardwall fd, it would already have * been released and deactivated at this point.) */ - hardwall_deactivate_all(current); + hardwall_deactivate_all(tsk); #endif } diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index a992238e9..153020abd 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c @@ -962,9 +962,7 @@ static void __init setup_numa_mapping(void) cpumask_set_cpu(best_cpu, &node_2_cpu_mask[node]); cpu_2_node[best_cpu] = node; cpumask_clear_cpu(best_cpu, &unbound_cpus); - node = next_node(node, default_nodes); - if (node == MAX_NUMNODES) - node = first_node(default_nodes); + node = next_node_in(node, default_nodes); } /* Print out node assignments and set defaults for disabled cpus */ diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c index 0db5f7c9d..9772a3554 100644 --- a/arch/tile/kernel/unaligned.c +++ b/arch/tile/kernel/unaligned.c @@ -188,7 +188,7 @@ static void find_regs(tilegx_bundle_bits bundle, uint64_t *rd, uint64_t *ra, * Parse fault bundle, find potential used registers and mark * corresponding bits in reg_map and alias_map. These 2 bit maps * are used to find the scratch registers and determine if there - * is register alais. + * is register alias. */ if (bundle & TILEGX_BUNDLE_MODE_MASK) { /* Y Mode Bundle. */ @@ -1529,7 +1529,7 @@ void do_unaligned(struct pt_regs *regs, int vecnum) } - /* Read the bundle casued the exception! */ + /* Read the bundle caused the exception! */ pc = (tilegx_bundle_bits __user *)(regs->pc); if (get_user(bundle, pc) != 0) { /* Probably never be here since pc is valid user address.*/ diff --git a/arch/tile/mm/hugetlbpage.c b/arch/tile/mm/hugetlbpage.c index e212c6468..77ceaa343 100644 --- a/arch/tile/mm/hugetlbpage.c +++ b/arch/tile/mm/hugetlbpage.c @@ -308,11 +308,16 @@ static bool saw_hugepagesz; static __init int setup_hugepagesz(char *opt) { + int rc; + if (!saw_hugepagesz) { saw_hugepagesz = true; memset(huge_shift, 0, sizeof(huge_shift)); } - return __setup_hugepagesz(memparse(opt, NULL)); + rc = __setup_hugepagesz(memparse(opt, NULL)); + if (rc) + hugetlb_bad_size(); + return rc; } __setup("hugepagesz=", setup_hugepagesz); diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c index a0582b7f4..adce25462 100644 --- a/arch/tile/mm/init.c +++ b/arch/tile/mm/init.c @@ -679,7 +679,7 @@ static void __init init_free_pfn_range(unsigned long start, unsigned long end) * Hacky direct set to avoid unnecessary * lock take/release for EVERY page here. */ - p->_count.counter = 0; + p->_refcount.counter = 0; p->_mapcount.counter = -1; } init_page_count(page); diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c index 7bf2491a9..c4d5bf841 100644 --- a/arch/tile/mm/pgtable.c +++ b/arch/tile/mm/pgtable.c @@ -231,7 +231,7 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd) struct page *pgtable_alloc_one(struct mm_struct *mm, unsigned long address, int order) { - gfp_t flags = GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO; + gfp_t flags = GFP_KERNEL|__GFP_ZERO; struct page *p; int i; -- cgit v1.2.3-54-g00ecf