From 03dd4cb26d967f9588437b0fc9cc0e8353322bb7 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Fri, 25 Mar 2016 03:53:42 -0300 Subject: Linux-libre 4.5-gnu --- drivers/clk/bcm/Kconfig | 10 +++ drivers/clk/bcm/Makefile | 2 + drivers/clk/bcm/clk-bcm2835-aux.c | 85 +++++++++++++++++++++ drivers/clk/bcm/clk-bcm2835.c | 155 +++++++++++++++++++++++++------------- drivers/clk/bcm/clk-bcm63xx.c | 22 ++++++ 5 files changed, 220 insertions(+), 54 deletions(-) create mode 100644 drivers/clk/bcm/clk-bcm2835-aux.c create mode 100644 drivers/clk/bcm/clk-bcm63xx.c (limited to 'drivers/clk/bcm') diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig index 85260fb96..f28784591 100644 --- a/drivers/clk/bcm/Kconfig +++ b/drivers/clk/bcm/Kconfig @@ -1,3 +1,13 @@ +config CLK_BCM_63XX + bool "Broadcom BCM63xx clock support" + depends on ARCH_BCM_63XX || COMPILE_TEST + depends on COMMON_CLK + select COMMON_CLK_IPROC + default ARCH_BCM_63XX + help + Enable common clock framework support for Broadcom BCM63xx DSL SoCs + based on the ARM architecture + config CLK_BCM_KONA bool "Broadcom Kona CCU clock support" depends on ARCH_BCM_MOBILE || COMPILE_TEST diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile index 3fc95060d..1d79bd2c3 100644 --- a/drivers/clk/bcm/Makefile +++ b/drivers/clk/bcm/Makefile @@ -1,9 +1,11 @@ +obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o +obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c new file mode 100644 index 000000000..e4f89e28b --- /dev/null +++ b/drivers/clk/bcm/clk-bcm2835-aux.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2015 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define BCM2835_AUXIRQ 0x00 +#define BCM2835_AUXENB 0x04 + +static int bcm2835_aux_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct clk_onecell_data *onecell; + const char *parent; + struct clk *parent_clk; + struct resource *res; + void __iomem *reg, *gate; + + parent_clk = devm_clk_get(dev, NULL); + if (IS_ERR(parent_clk)) + return PTR_ERR(parent_clk); + parent = __clk_get_name(parent_clk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg = devm_ioremap_resource(dev, res); + if (!reg) + return -ENODEV; + + onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL); + if (!onecell) + return -ENOMEM; + onecell->clk_num = BCM2835_AUX_CLOCK_COUNT; + onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT, + sizeof(*onecell->clks), GFP_KERNEL); + if (!onecell->clks) + return -ENOMEM; + + gate = reg + BCM2835_AUXENB; + onecell->clks[BCM2835_AUX_CLOCK_UART] = + clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL); + + onecell->clks[BCM2835_AUX_CLOCK_SPI1] = + clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL); + + onecell->clks[BCM2835_AUX_CLOCK_SPI2] = + clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL); + + of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell); + + return 0; +} + +static const struct of_device_id bcm2835_aux_clk_of_match[] = { + { .compatible = "brcm,bcm2835-aux", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match); + +static struct platform_driver bcm2835_aux_clk_driver = { + .driver = { + .name = "bcm2835-aux-clk", + .of_match_table = bcm2835_aux_clk_of_match, + }, + .probe = bcm2835_aux_clk_probe, +}; +builtin_platform_driver(bcm2835_aux_clk_driver); + +MODULE_AUTHOR("Eric Anholt "); +MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 39bf58202..015e687ff 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -807,6 +807,16 @@ static const struct bcm2835_clock_data bcm2835_clock_emmc_data = { .frac_bits = 8, }; +static const struct bcm2835_clock_data bcm2835_clock_pwm_data = { + .name = "pwm", + .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents), + .parents = bcm2835_clock_per_parents, + .ctl_reg = CM_PWMCTL, + .div_reg = CM_PWMDIV, + .int_bits = 12, + .frac_bits = 12, +}; + struct bcm2835_pll { struct clk_hw hw; struct bcm2835_cprman *cprman; @@ -1148,22 +1158,24 @@ static int bcm2835_clock_is_on(struct clk_hw *hw) static u32 bcm2835_clock_choose_div(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) + unsigned long parent_rate, + bool round_up) { struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); const struct bcm2835_clock_data *data = clock->data; - u32 unused_frac_mask = GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0); + u32 unused_frac_mask = + GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1; u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS; + u64 rem; u32 div; - do_div(temp, rate); + rem = do_div(temp, rate); div = temp; - /* Round and mask off the unused bits */ - if (unused_frac_mask != 0) { - div += unused_frac_mask >> 1; - div &= ~unused_frac_mask; - } + /* Round up and mask off the unused bits */ + if (round_up && ((div & unused_frac_mask) != 0 || rem != 0)) + div += unused_frac_mask + 1; + div &= ~unused_frac_mask; /* Clamp to the limits. */ div = max(div, unused_frac_mask + 1); @@ -1197,16 +1209,6 @@ static long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock, return temp; } -static long bcm2835_clock_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *parent_rate) -{ - struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); - u32 div = bcm2835_clock_choose_div(hw, rate, *parent_rate); - - return bcm2835_clock_rate_from_divisor(clock, *parent_rate, div); -} - static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -1271,20 +1273,82 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw, struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); struct bcm2835_cprman *cprman = clock->cprman; const struct bcm2835_clock_data *data = clock->data; - u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate); + u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false); cprman_write(cprman, data->div_reg, div); return 0; } +static int bcm2835_clock_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); + struct clk_hw *parent, *best_parent = NULL; + unsigned long rate, best_rate = 0; + unsigned long prate, best_prate = 0; + size_t i; + u32 div; + + /* + * Select parent clock that results in the closest but lower rate + */ + for (i = 0; i < clk_hw_get_num_parents(hw); ++i) { + parent = clk_hw_get_parent_by_index(hw, i); + if (!parent) + continue; + prate = clk_hw_get_rate(parent); + div = bcm2835_clock_choose_div(hw, req->rate, prate, true); + rate = bcm2835_clock_rate_from_divisor(clock, prate, div); + if (rate > best_rate && rate <= req->rate) { + best_parent = parent; + best_prate = prate; + best_rate = rate; + } + } + + if (!best_parent) + return -EINVAL; + + req->best_parent_hw = best_parent; + req->best_parent_rate = best_prate; + + req->rate = best_rate; + + return 0; +} + +static int bcm2835_clock_set_parent(struct clk_hw *hw, u8 index) +{ + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); + struct bcm2835_cprman *cprman = clock->cprman; + const struct bcm2835_clock_data *data = clock->data; + u8 src = (index << CM_SRC_SHIFT) & CM_SRC_MASK; + + cprman_write(cprman, data->ctl_reg, src); + return 0; +} + +static u8 bcm2835_clock_get_parent(struct clk_hw *hw) +{ + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); + struct bcm2835_cprman *cprman = clock->cprman; + const struct bcm2835_clock_data *data = clock->data; + u32 src = cprman_read(cprman, data->ctl_reg); + + return (src & CM_SRC_MASK) >> CM_SRC_SHIFT; +} + + static const struct clk_ops bcm2835_clock_clk_ops = { .is_prepared = bcm2835_clock_is_on, .prepare = bcm2835_clock_on, .unprepare = bcm2835_clock_off, .recalc_rate = bcm2835_clock_get_rate, .set_rate = bcm2835_clock_set_rate, - .round_rate = bcm2835_clock_round_rate, + .determine_rate = bcm2835_clock_determine_rate, + .set_parent = bcm2835_clock_set_parent, + .get_parent = bcm2835_clock_get_parent, }; static int bcm2835_vpu_clock_is_on(struct clk_hw *hw) @@ -1300,7 +1364,9 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = { .is_prepared = bcm2835_vpu_clock_is_on, .recalc_rate = bcm2835_clock_get_rate, .set_rate = bcm2835_clock_set_rate, - .round_rate = bcm2835_clock_round_rate, + .determine_rate = bcm2835_clock_determine_rate, + .set_parent = bcm2835_clock_set_parent, + .get_parent = bcm2835_clock_get_parent, }; static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman, @@ -1394,45 +1460,23 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman, { struct bcm2835_clock *clock; struct clk_init_data init; - const char *parent; + const char *parents[1 << CM_SRC_BITS]; + size_t i; /* - * Most of the clock generators have a mux field, so we - * instantiate a generic mux as our parent to handle it. + * Replace our "xosc" references with the oscillator's + * actual name. */ - if (data->num_mux_parents) { - const char *parents[1 << CM_SRC_BITS]; - int i; - - parent = devm_kasprintf(cprman->dev, GFP_KERNEL, - "mux_%s", data->name); - if (!parent) - return NULL; - - /* - * Replace our "xosc" references with the oscillator's - * actual name. - */ - for (i = 0; i < data->num_mux_parents; i++) { - if (strcmp(data->parents[i], "xosc") == 0) - parents[i] = cprman->osc_name; - else - parents[i] = data->parents[i]; - } - - clk_register_mux(cprman->dev, parent, - parents, data->num_mux_parents, - CLK_SET_RATE_PARENT, - cprman->regs + data->ctl_reg, - CM_SRC_SHIFT, CM_SRC_BITS, - 0, &cprman->regs_lock); - } else { - parent = data->parents[0]; + for (i = 0; i < data->num_mux_parents; i++) { + if (strcmp(data->parents[i], "xosc") == 0) + parents[i] = cprman->osc_name; + else + parents[i] = data->parents[i]; } memset(&init, 0, sizeof(init)); - init.parent_names = &parent; - init.num_parents = 1; + init.parent_names = parents; + init.num_parents = data->num_mux_parents; init.name = data->name; init.flags = CLK_IGNORE_UNUSED; @@ -1550,6 +1594,9 @@ static int bcm2835_clk_probe(struct platform_device *pdev) cprman->regs + CM_PERIICTL, CM_GATE_BIT, 0, &cprman->regs_lock); + clks[BCM2835_CLOCK_PWM] = + bcm2835_register_clock(cprman, &bcm2835_clock_pwm_data); + return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, &cprman->onecell); } diff --git a/drivers/clk/bcm/clk-bcm63xx.c b/drivers/clk/bcm/clk-bcm63xx.c new file mode 100644 index 000000000..fbc17ae5f --- /dev/null +++ b/drivers/clk/bcm/clk-bcm63xx.c @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include "clk-iproc.h" + +static void __init bcm63138_armpll_init(struct device_node *node) +{ + iproc_armpll_setup(node); +} +CLK_OF_DECLARE(bcm63138_armpll, "brcm,bcm63138-armpll", bcm63138_armpll_init); -- cgit v1.2.3-54-g00ecf