From 57f0f512b273f60d52568b8c6b77e17f5636edc0 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Wed, 5 Aug 2015 17:04:01 -0300 Subject: Initial import --- drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h | 45 +++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h') diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h new file mode 100644 index 000000000..d8adc1108 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h @@ -0,0 +1,45 @@ +#ifndef __NVKM_SW_NV50_H__ +#define __NVKM_SW_NV50_H__ +#include +#include + +struct nv50_sw_oclass { + struct nvkm_oclass base; + struct nvkm_oclass *cclass; + struct nvkm_oclass *sclass; +}; + +struct nv50_sw_priv { + struct nvkm_sw base; +}; + +int nv50_sw_ctor(struct nvkm_object *, struct nvkm_object *, + struct nvkm_oclass *, void *, u32, + struct nvkm_object **); + +struct nv50_sw_cclass { + struct nvkm_oclass base; + int (*vblank)(struct nvkm_notify *); +}; + +struct nv50_sw_chan { + struct nvkm_sw_chan base; + struct { + struct nvkm_notify notify[4]; + u32 channel; + u32 ctxdma; + u64 offset; + u32 value; + } vblank; +}; + +int nv50_sw_context_ctor(struct nvkm_object *, + struct nvkm_object *, + struct nvkm_oclass *, void *, u32, + struct nvkm_object **); +void nv50_sw_context_dtor(struct nvkm_object *); + +int nv50_sw_mthd_vblsem_value(struct nvkm_object *, u32, void *, u32); +int nv50_sw_mthd_vblsem_release(struct nvkm_object *, u32, void *, u32); +int nv50_sw_mthd_flip(struct nvkm_object *, u32, void *, u32); +#endif -- cgit v1.2.3-54-g00ecf