From 03dd4cb26d967f9588437b0fc9cc0e8353322bb7 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Fri, 25 Mar 2016 03:53:42 -0300 Subject: Linux-libre 4.5-gnu --- drivers/gpu/drm/panel/panel-simple.c | 123 +++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) (limited to 'drivers/gpu/drm/panel/panel-simple.c') diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f97b73ec4..f88a631c4 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -44,6 +44,10 @@ struct panel_desc { unsigned int bpc; + /** + * @width: width (in millimeters) of the panel's active display area + * @height: height (in millimeters) of the panel's active display area + */ struct { unsigned int width; unsigned int height; @@ -832,6 +836,34 @@ static const struct panel_desc innolux_g121i1_l01 = { }, }; +static const struct drm_display_mode innolux_g121x1_l03_mode = { + .clock = 65000, + .hdisplay = 1024, + .hsync_start = 1024 + 0, + .hsync_end = 1024 + 1, + .htotal = 1024 + 0 + 1 + 320, + .vdisplay = 768, + .vsync_start = 768 + 38, + .vsync_end = 768 + 38 + 1, + .vtotal = 768 + 38 + 1 + 0, + .vrefresh = 60, +}; + +static const struct panel_desc innolux_g121x1_l03 = { + .modes = &innolux_g121x1_l03_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 246, + .height = 185, + }, + .delay = { + .enable = 200, + .unprepare = 200, + .disable = 400, + }, +}; + static const struct drm_display_mode innolux_n116bge_mode = { .clock = 76420, .hdisplay = 1366, @@ -902,6 +934,30 @@ static const struct panel_desc innolux_zj070na_01p = { }, }; +static const struct display_timing kyo_tcg121xglp_timing = { + .pixelclock = { 52000000, 65000000, 71000000 }, + .hactive = { 1024, 1024, 1024 }, + .hfront_porch = { 2, 2, 2 }, + .hback_porch = { 2, 2, 2 }, + .hsync_len = { 86, 124, 244 }, + .vactive = { 768, 768, 768 }, + .vfront_porch = { 2, 2, 2 }, + .vback_porch = { 2, 2, 2 }, + .vsync_len = { 6, 34, 73 }, + .flags = DISPLAY_FLAGS_DE_HIGH, +}; + +static const struct panel_desc kyo_tcg121xglp = { + .timings = &kyo_tcg121xglp_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 246, + .height = 184, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, +}; + static const struct drm_display_mode lg_lb070wv8_mode = { .clock = 33246, .hdisplay = 800, @@ -1027,6 +1083,30 @@ static const struct panel_desc ortustech_com43h4m85ulc = { .bus_format = MEDIA_BUS_FMT_RGB888_1X24, }; +static const struct drm_display_mode qd43003c0_40_mode = { + .clock = 9000, + .hdisplay = 480, + .hsync_start = 480 + 8, + .hsync_end = 480 + 8 + 4, + .htotal = 480 + 8 + 4 + 39, + .vdisplay = 272, + .vsync_start = 272 + 4, + .vsync_end = 272 + 4 + 10, + .vtotal = 272 + 4 + 10 + 2, + .vrefresh = 60, +}; + +static const struct panel_desc qd43003c0_40 = { + .modes = &qd43003c0_40_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 95, + .height = 53, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, +}; + static const struct drm_display_mode samsung_ltn101nt05_mode = { .clock = 54030, .hdisplay = 1024, @@ -1157,6 +1237,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible ="innolux,g121i1-l01", .data = &innolux_g121i1_l01 + }, { + .compatible = "innolux,g121x1-l03", + .data = &innolux_g121x1_l03, }, { .compatible = "innolux,n116bge", .data = &innolux_n116bge, @@ -1166,6 +1249,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "innolux,zj070na-01p", .data = &innolux_zj070na_01p, + }, { + .compatible = "kyo,tcg121xglp", + .data = &kyo_tcg121xglp, }, { .compatible = "lg,lb070wv8", .data = &lg_lb070wv8, @@ -1181,6 +1267,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "ortustech,com43h4m85ulc", .data = &ortustech_com43h4m85ulc, + }, { + .compatible = "qiaodian,qd43003c0-40", + .data = &qd43003c0_40, }, { .compatible = "samsung,ltn101nt05", .data = &samsung_ltn101nt05, @@ -1263,6 +1352,36 @@ static const struct panel_desc_dsi auo_b080uan01 = { .lanes = 4, }; +static const struct drm_display_mode boe_tv080wum_nl0_mode = { + .clock = 160000, + .hdisplay = 1200, + .hsync_start = 1200 + 120, + .hsync_end = 1200 + 120 + 20, + .htotal = 1200 + 120 + 20 + 21, + .vdisplay = 1920, + .vsync_start = 1920 + 21, + .vsync_end = 1920 + 21 + 3, + .vtotal = 1920 + 21 + 3 + 18, + .vrefresh = 60, + .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, +}; + +static const struct panel_desc_dsi boe_tv080wum_nl0 = { + .desc = { + .modes = &boe_tv080wum_nl0_mode, + .num_modes = 1, + .size = { + .width = 107, + .height = 172, + }, + }, + .flags = MIPI_DSI_MODE_VIDEO | + MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_SYNC_PULSE, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, +}; + static const struct drm_display_mode lg_ld070wx3_sl01_mode = { .clock = 71000, .hdisplay = 800, @@ -1348,10 +1467,14 @@ static const struct panel_desc_dsi panasonic_vvx10f004b00 = { .lanes = 4, }; + static const struct of_device_id dsi_of_match[] = { { .compatible = "auo,b080uan01", .data = &auo_b080uan01 + }, { + .compatible = "boe,tv080wum-nl0", + .data = &boe_tv080wum_nl0 }, { .compatible = "lg,ld070wx3-sl01", .data = &lg_ld070wx3_sl01 -- cgit v1.2.3-54-g00ecf