From 863981e96738983919de841ec669e157e6bdaeb0 Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Sun, 11 Sep 2016 04:34:46 -0300 Subject: Linux-libre 4.7.1-gnu --- drivers/media/platform/vsp1/vsp1_bru.c | 359 +++++++++++++++------------------ 1 file changed, 161 insertions(+), 198 deletions(-) (limited to 'drivers/media/platform/vsp1/vsp1_bru.c') diff --git a/drivers/media/platform/vsp1/vsp1_bru.c b/drivers/media/platform/vsp1/vsp1_bru.c index cb0dbc15d..b1068c018 100644 --- a/drivers/media/platform/vsp1/vsp1_bru.c +++ b/drivers/media/platform/vsp1/vsp1_bru.c @@ -18,6 +18,8 @@ #include "vsp1.h" #include "vsp1_bru.h" +#include "vsp1_dl.h" +#include "vsp1_pipe.h" #include "vsp1_rwpf.h" #include "vsp1_video.h" @@ -28,9 +30,10 @@ * Device Access */ -static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data) +static inline void vsp1_bru_write(struct vsp1_bru *bru, struct vsp1_dl_list *dl, + u32 reg, u32 data) { - vsp1_mod_write(&bru->entity, reg, data); + vsp1_dl_list_write(dl, reg, data); } /* ----------------------------------------------------------------------------- @@ -42,13 +45,9 @@ static int bru_s_ctrl(struct v4l2_ctrl *ctrl) struct vsp1_bru *bru = container_of(ctrl->handler, struct vsp1_bru, ctrls); - if (!vsp1_entity_is_streaming(&bru->entity)) - return 0; - switch (ctrl->id) { case V4L2_CID_BG_COLOR: - vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, ctrl->val | - (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT)); + bru->bgcolor = ctrl->val; break; } @@ -60,116 +59,7 @@ static const struct v4l2_ctrl_ops bru_ctrl_ops = { }; /* ----------------------------------------------------------------------------- - * V4L2 Subdevice Core Operations - */ - -static int bru_s_stream(struct v4l2_subdev *subdev, int enable) -{ - struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity); - struct vsp1_bru *bru = to_bru(subdev); - struct v4l2_mbus_framefmt *format; - unsigned int flags; - unsigned int i; - int ret; - - ret = vsp1_entity_set_streaming(&bru->entity, enable); - if (ret < 0) - return ret; - - if (!enable) - return 0; - - format = &bru->entity.formats[bru->entity.source_pad]; - - /* The hardware is extremely flexible but we have no userspace API to - * expose all the parameters, nor is it clear whether we would have use - * cases for all the supported modes. Let's just harcode the parameters - * to sane default values for now. - */ - - /* Disable dithering and enable color data normalization unless the - * format at the pipeline output is premultiplied. - */ - flags = pipe->output ? pipe->output->format.flags : 0; - vsp1_bru_write(bru, VI6_BRU_INCTRL, - flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ? - 0 : VI6_BRU_INCTRL_NRM); - - /* Set the background position to cover the whole output image. */ - vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE, - (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) | - (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT)); - vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0); - - /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP - * unit with a NOP operation to make BRU input 1 available as the - * Blend/ROP unit B SRC input. - */ - vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) | - VI6_BRU_ROP_CROP(VI6_ROP_NOP) | - VI6_BRU_ROP_AROP(VI6_ROP_NOP)); - - for (i = 0; i < bru->entity.source_pad; ++i) { - bool premultiplied = false; - u32 ctrl = 0; - - /* Configure all Blend/ROP units corresponding to an enabled BRU - * input for alpha blending. Blend/ROP units corresponding to - * disabled BRU inputs are used in ROP NOP mode to ignore the - * SRC input. - */ - if (bru->inputs[i].rpf) { - ctrl |= VI6_BRU_CTRL_RBC; - - premultiplied = bru->inputs[i].rpf->format.flags - & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA; - } else { - ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP) - | VI6_BRU_CTRL_AROP(VI6_ROP_NOP); - } - - /* Select the virtual RPF as the Blend/ROP unit A DST input to - * serve as a background color. - */ - if (i == 0) - ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF; - - /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to - * D in that order. The Blend/ROP unit B SRC is hardwired to the - * ROP unit output, the corresponding register bits must be set - * to 0. - */ - if (i != 1) - ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i); - - vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl); - - /* Harcode the blending formula to - * - * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa - * DSTa = DSTa * (1 - SRCa) + SRCa - * - * when the SRC input isn't premultiplied, and to - * - * DSTc = DSTc * (1 - SRCa) + SRCc - * DSTa = DSTa * (1 - SRCa) + SRCa - * - * otherwise. - */ - vsp1_bru_write(bru, VI6_BRU_BLD(i), - VI6_BRU_BLD_CCMDX_255_SRC_A | - (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY : - VI6_BRU_BLD_CCMDY_SRC_A) | - VI6_BRU_BLD_ACMDX_255_SRC_A | - VI6_BRU_BLD_ACMDY_COEFY | - (0xff << VI6_BRU_BLD_COEFY_SHIFT)); - } - - return 0; -} - -/* ----------------------------------------------------------------------------- - * V4L2 Subdevice Pad Operations + * V4L2 Subdevice Operations */ /* @@ -186,24 +76,9 @@ static int bru_enum_mbus_code(struct v4l2_subdev *subdev, MEDIA_BUS_FMT_ARGB8888_1X32, MEDIA_BUS_FMT_AYUV8_1X32, }; - struct vsp1_bru *bru = to_bru(subdev); - struct v4l2_mbus_framefmt *format; - - if (code->pad == BRU_PAD_SINK(0)) { - if (code->index >= ARRAY_SIZE(codes)) - return -EINVAL; - - code->code = codes[code->index]; - } else { - if (code->index) - return -EINVAL; - - format = vsp1_entity_get_pad_format(&bru->entity, cfg, - BRU_PAD_SINK(0), code->which); - code->code = format->code; - } - return 0; + return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes, + ARRAY_SIZE(codes)); } static int bru_enum_frame_size(struct v4l2_subdev *subdev, @@ -227,32 +102,14 @@ static int bru_enum_frame_size(struct v4l2_subdev *subdev, static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg, - unsigned int pad, u32 which) -{ - switch (which) { - case V4L2_SUBDEV_FORMAT_TRY: - return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad); - case V4L2_SUBDEV_FORMAT_ACTIVE: - return &bru->inputs[pad].compose; - default: - return NULL; - } -} - -static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_format *fmt) + unsigned int pad) { - struct vsp1_bru *bru = to_bru(subdev); - - fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad, - fmt->which); - - return 0; + return v4l2_subdev_get_try_compose(&bru->entity.subdev, cfg, pad); } -static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg, - unsigned int pad, struct v4l2_mbus_framefmt *fmt, - enum v4l2_subdev_format_whence which) +static void bru_try_format(struct vsp1_bru *bru, + struct v4l2_subdev_pad_config *config, + unsigned int pad, struct v4l2_mbus_framefmt *fmt) { struct v4l2_mbus_framefmt *format; @@ -266,8 +123,8 @@ static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config * default: /* The BRU can't perform format conversion. */ - format = vsp1_entity_get_pad_format(&bru->entity, cfg, - BRU_PAD_SINK(0), which); + format = vsp1_entity_get_pad_format(&bru->entity, config, + BRU_PAD_SINK(0)); fmt->code = format->code; break; } @@ -278,23 +135,28 @@ static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config * fmt->colorspace = V4L2_COLORSPACE_SRGB; } -static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, +static int bru_set_format(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt) { struct vsp1_bru *bru = to_bru(subdev); + struct v4l2_subdev_pad_config *config; struct v4l2_mbus_framefmt *format; - bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which); + config = vsp1_entity_get_pad_config(&bru->entity, cfg, fmt->which); + if (!config) + return -EINVAL; + + bru_try_format(bru, config, fmt->pad, &fmt->format); - format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad, - fmt->which); + format = vsp1_entity_get_pad_format(&bru->entity, config, fmt->pad); *format = fmt->format; /* Reset the compose rectangle */ if (fmt->pad != bru->entity.source_pad) { struct v4l2_rect *compose; - compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which); + compose = bru_get_compose(bru, config, fmt->pad); compose->left = 0; compose->top = 0; compose->width = format->width; @@ -306,8 +168,8 @@ static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_con unsigned int i; for (i = 0; i <= bru->entity.source_pad; ++i) { - format = vsp1_entity_get_pad_format(&bru->entity, cfg, - i, fmt->which); + format = vsp1_entity_get_pad_format(&bru->entity, + config, i); format->code = fmt->format.code; } } @@ -320,6 +182,7 @@ static int bru_get_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_selection *sel) { struct vsp1_bru *bru = to_bru(subdev); + struct v4l2_subdev_pad_config *config; if (sel->pad == bru->entity.source_pad) return -EINVAL; @@ -333,7 +196,12 @@ static int bru_get_selection(struct v4l2_subdev *subdev, return 0; case V4L2_SEL_TGT_COMPOSE: - sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which); + config = vsp1_entity_get_pad_config(&bru->entity, cfg, + sel->which); + if (!config) + return -EINVAL; + + sel->r = *bru_get_compose(bru, config, sel->pad); return 0; default: @@ -346,6 +214,7 @@ static int bru_set_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_selection *sel) { struct vsp1_bru *bru = to_bru(subdev); + struct v4l2_subdev_pad_config *config; struct v4l2_mbus_framefmt *format; struct v4l2_rect *compose; @@ -355,57 +224,161 @@ static int bru_set_selection(struct v4l2_subdev *subdev, if (sel->target != V4L2_SEL_TGT_COMPOSE) return -EINVAL; + config = vsp1_entity_get_pad_config(&bru->entity, cfg, sel->which); + if (!config) + return -EINVAL; + /* The compose rectangle top left corner must be inside the output * frame. */ - format = vsp1_entity_get_pad_format(&bru->entity, cfg, - bru->entity.source_pad, sel->which); + format = vsp1_entity_get_pad_format(&bru->entity, config, + bru->entity.source_pad); sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1); sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1); /* Scaling isn't supported, the compose rectangle size must be identical * to the sink format size. */ - format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad, - sel->which); + format = vsp1_entity_get_pad_format(&bru->entity, config, sel->pad); sel->r.width = format->width; sel->r.height = format->height; - compose = bru_get_compose(bru, cfg, sel->pad, sel->which); + compose = bru_get_compose(bru, config, sel->pad); *compose = sel->r; return 0; } -/* ----------------------------------------------------------------------------- - * V4L2 Subdevice Operations - */ - -static struct v4l2_subdev_video_ops bru_video_ops = { - .s_stream = bru_s_stream, -}; - static struct v4l2_subdev_pad_ops bru_pad_ops = { + .init_cfg = vsp1_entity_init_cfg, .enum_mbus_code = bru_enum_mbus_code, .enum_frame_size = bru_enum_frame_size, - .get_fmt = bru_get_format, + .get_fmt = vsp1_subdev_get_pad_format, .set_fmt = bru_set_format, .get_selection = bru_get_selection, .set_selection = bru_set_selection, }; static struct v4l2_subdev_ops bru_ops = { - .video = &bru_video_ops, .pad = &bru_pad_ops, }; +/* ----------------------------------------------------------------------------- + * VSP1 Entity Operations + */ + +static void bru_configure(struct vsp1_entity *entity, + struct vsp1_pipeline *pipe, + struct vsp1_dl_list *dl) +{ + struct vsp1_bru *bru = to_bru(&entity->subdev); + struct v4l2_mbus_framefmt *format; + unsigned int flags; + unsigned int i; + + format = vsp1_entity_get_pad_format(&bru->entity, bru->entity.config, + bru->entity.source_pad); + + /* The hardware is extremely flexible but we have no userspace API to + * expose all the parameters, nor is it clear whether we would have use + * cases for all the supported modes. Let's just harcode the parameters + * to sane default values for now. + */ + + /* Disable dithering and enable color data normalization unless the + * format at the pipeline output is premultiplied. + */ + flags = pipe->output ? pipe->output->format.flags : 0; + vsp1_bru_write(bru, dl, VI6_BRU_INCTRL, + flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ? + 0 : VI6_BRU_INCTRL_NRM); + + /* Set the background position to cover the whole output image and + * configure its color. + */ + vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_SIZE, + (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) | + (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT)); + vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_LOC, 0); + + vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_COL, bru->bgcolor | + (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT)); + + /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP + * unit with a NOP operation to make BRU input 1 available as the + * Blend/ROP unit B SRC input. + */ + vsp1_bru_write(bru, dl, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) | + VI6_BRU_ROP_CROP(VI6_ROP_NOP) | + VI6_BRU_ROP_AROP(VI6_ROP_NOP)); + + for (i = 0; i < bru->entity.source_pad; ++i) { + bool premultiplied = false; + u32 ctrl = 0; + + /* Configure all Blend/ROP units corresponding to an enabled BRU + * input for alpha blending. Blend/ROP units corresponding to + * disabled BRU inputs are used in ROP NOP mode to ignore the + * SRC input. + */ + if (bru->inputs[i].rpf) { + ctrl |= VI6_BRU_CTRL_RBC; + + premultiplied = bru->inputs[i].rpf->format.flags + & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA; + } else { + ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP) + | VI6_BRU_CTRL_AROP(VI6_ROP_NOP); + } + + /* Select the virtual RPF as the Blend/ROP unit A DST input to + * serve as a background color. + */ + if (i == 0) + ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF; + + /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to + * D in that order. The Blend/ROP unit B SRC is hardwired to the + * ROP unit output, the corresponding register bits must be set + * to 0. + */ + if (i != 1) + ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i); + + vsp1_bru_write(bru, dl, VI6_BRU_CTRL(i), ctrl); + + /* Harcode the blending formula to + * + * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa + * DSTa = DSTa * (1 - SRCa) + SRCa + * + * when the SRC input isn't premultiplied, and to + * + * DSTc = DSTc * (1 - SRCa) + SRCc + * DSTa = DSTa * (1 - SRCa) + SRCa + * + * otherwise. + */ + vsp1_bru_write(bru, dl, VI6_BRU_BLD(i), + VI6_BRU_BLD_CCMDX_255_SRC_A | + (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY : + VI6_BRU_BLD_CCMDY_SRC_A) | + VI6_BRU_BLD_ACMDX_255_SRC_A | + VI6_BRU_BLD_ACMDY_COEFY | + (0xff << VI6_BRU_BLD_COEFY_SHIFT)); + } +} + +static const struct vsp1_entity_operations bru_entity_ops = { + .configure = bru_configure, +}; + /* ----------------------------------------------------------------------------- * Initialization and Cleanup */ struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1) { - struct v4l2_subdev *subdev; struct vsp1_bru *bru; int ret; @@ -413,31 +386,21 @@ struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1) if (bru == NULL) return ERR_PTR(-ENOMEM); + bru->entity.ops = &bru_entity_ops; bru->entity.type = VSP1_ENTITY_BRU; - ret = vsp1_entity_init(vsp1, &bru->entity, - vsp1->info->num_bru_inputs + 1); + ret = vsp1_entity_init(vsp1, &bru->entity, "bru", + vsp1->info->num_bru_inputs + 1, &bru_ops); if (ret < 0) return ERR_PTR(ret); - /* Initialize the V4L2 subdev. */ - subdev = &bru->entity.subdev; - v4l2_subdev_init(subdev, &bru_ops); - - subdev->entity.ops = &vsp1->media_ops; - subdev->internal_ops = &vsp1_subdev_internal_ops; - snprintf(subdev->name, sizeof(subdev->name), "%s bru", - dev_name(vsp1->dev)); - v4l2_set_subdevdata(subdev, bru); - subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; - - vsp1_entity_init_formats(subdev, NULL); - /* Initialize the control handler. */ v4l2_ctrl_handler_init(&bru->ctrls, 1); v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR, 0, 0xffffff, 1, 0); + bru->bgcolor = 0; + bru->entity.subdev.ctrl_handler = &bru->ctrls; if (bru->ctrls.error) { -- cgit v1.2.3-54-g00ecf