From d635711daa98be86d4c7fd01499c34f566b54ccb Mon Sep 17 00:00:00 2001 From: André Fabian Silva Delgado Date: Fri, 10 Jun 2016 05:30:17 -0300 Subject: Linux-libre 4.6.2-gnu --- include/linux/clk/at91_pmc.h | 12 ------------ include/linux/clk/renesas.h | 35 +++++++++++++++++++++++++++++++++++ include/linux/clk/shmobile.h | 35 ----------------------------------- include/linux/clk/ti.h | 8 ++++---- 4 files changed, 39 insertions(+), 51 deletions(-) create mode 100644 include/linux/clk/renesas.h delete mode 100644 include/linux/clk/shmobile.h (limited to 'include/linux/clk') diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index 1e6932222..17f413bbb 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -16,18 +16,6 @@ #ifndef AT91_PMC_H #define AT91_PMC_H -#ifndef __ASSEMBLY__ -extern void __iomem *at91_pmc_base; - -#define at91_pmc_read(field) \ - readl_relaxed(at91_pmc_base + field) - -#define at91_pmc_write(field, value) \ - writel_relaxed(value, at91_pmc_base + field) -#else -.extern at91_pmc_base -#endif - #define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ #define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */ diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h new file mode 100644 index 000000000..7adfd80fb --- /dev/null +++ b/include/linux/clk/renesas.h @@ -0,0 +1,35 @@ +/* + * Copyright 2013 Ideas On Board SPRL + * Copyright 2013, 2014 Horms Solutions Ltd. + * + * Contact: Laurent Pinchart + * Contact: Simon Horman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_CLK_RENESAS_H_ +#define __LINUX_CLK_RENESAS_H_ + +#include + +struct device; +struct device_node; +struct generic_pm_domain; + +void r8a7778_clocks_init(u32 mode); +void r8a7779_clocks_init(u32 mode); +void rcar_gen2_clocks_init(u32 mode); + +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +void cpg_mstp_add_clk_domain(struct device_node *np); +int cpg_mstp_attach_dev(struct generic_pm_domain *domain, struct device *dev); +void cpg_mstp_detach_dev(struct generic_pm_domain *domain, struct device *dev); +#else +static inline void cpg_mstp_add_clk_domain(struct device_node *np) {} +#endif + +#endif diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h deleted file mode 100644 index cb19cc186..000000000 --- a/include/linux/clk/shmobile.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright 2013 Ideas On Board SPRL - * Copyright 2013, 2014 Horms Solutions Ltd. - * - * Contact: Laurent Pinchart - * Contact: Simon Horman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef __LINUX_CLK_SHMOBILE_H_ -#define __LINUX_CLK_SHMOBILE_H_ - -#include - -struct device; -struct device_node; -struct generic_pm_domain; - -void r8a7778_clocks_init(u32 mode); -void r8a7779_clocks_init(u32 mode); -void rcar_gen2_clocks_init(u32 mode); - -#ifdef CONFIG_PM_GENERIC_DOMAINS_OF -void cpg_mstp_add_clk_domain(struct device_node *np); -int cpg_mstp_attach_dev(struct generic_pm_domain *domain, struct device *dev); -void cpg_mstp_detach_dev(struct generic_pm_domain *domain, struct device *dev); -#else -static inline void cpg_mstp_add_clk_domain(struct device_node *np) {} -#endif - -#endif diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 9a638601c..dc5164a6d 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -23,8 +23,8 @@ * @mult_div1_reg: register containing the DPLL M and N bitfields * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg - * @clk_bypass: struct clk pointer to the clock's bypass clock input - * @clk_ref: struct clk pointer to the clock's reference clock input + * @clk_bypass: struct clk_hw pointer to the clock's bypass clock input + * @clk_ref: struct clk_hw pointer to the clock's reference clock input * @control_reg: register containing the DPLL mode bitfield * @enable_mask: mask of the DPLL mode bitfield in @control_reg * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() @@ -69,8 +69,8 @@ struct dpll_data { void __iomem *mult_div1_reg; u32 mult_mask; u32 div1_mask; - struct clk *clk_bypass; - struct clk *clk_ref; + struct clk_hw *clk_bypass; + struct clk_hw *clk_ref; void __iomem *control_reg; u32 enable_mask; unsigned long last_rounded_rate; -- cgit v1.2.3-54-g00ecf