blob: 2a5bac37f9a2268209a59a607352d0e5d9dd9bfe (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
|
* Mediatek Video Processor Unit
Video Processor Unit is a HW video controller. It controls HW Codec including
H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
Required properties:
- compatible: "mediatek,mt8173-vpu"
- reg: Must contain an entry for each entry in reg-names.
- reg-names: Must include the following entries:
"tcm": tcm base
"cfg_reg": Main configuration registers base
- interrupts: interrupt number to the cpu.
- clocks : clock name from clock manager
- clock-names: must be main. It is the main clock of VPU
Optional properties:
- memory-region: phandle to a node describing memory (see
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
to be used for VPU extended memory; if not present, VPU may be located
anywhere in the memory
Example:
vpu: vpu@10020000 {
compatible = "mediatek,mt8173-vpu";
reg = <0 0x10020000 0 0x30000>,
<0 0x10050000 0 0x100>;
reg-names = "tcm", "cfg_reg";
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topckgen TOP_SCP_SEL>;
clock-names = "main";
};
|
