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-rw-r--r--extra/xulrunner/mips.patch114
1 files changed, 114 insertions, 0 deletions
diff --git a/extra/xulrunner/mips.patch b/extra/xulrunner/mips.patch
new file mode 100644
index 000000000..f9de910b2
--- /dev/null
+++ b/extra/xulrunner/mips.patch
@@ -0,0 +1,114 @@
+--- ../../tmp.ne6Bz1oy72/xulrunner/src/mozilla-2.0/js/src/assembler/jit/ExecutableAllocator.h 2011-03-18 20:33:47.000000000 -0300
++++ js/src/assembler/jit/ExecutableAllocator.h 2011-03-30 15:45:07.537247142 -0300
+@@ -44,9 +44,7 @@
+ #include <e32std.h>
+ #endif
+
+-#if WTF_CPU_MIPS && WTF_PLATFORM_LINUX
+ #include <sys/cachectl.h>
+-#endif
+
+ #if WTF_PLATFORM_WINCE
+ // From pkfuncs.h (private header file from the Platform Builder)
+@@ -311,89 +309,10 @@
+ #endif
+
+
+-#if WTF_CPU_X86 || WTF_CPU_X86_64
+- static void cacheFlush(void*, size_t)
+- {
+- }
+-#elif WTF_CPU_MIPS
+ static void cacheFlush(void* code, size_t size)
+ {
+-#if WTF_COMPILER_GCC && (GCC_VERSION >= 40300)
+-#if WTF_MIPS_ISA_REV(2) && (GCC_VERSION < 40403)
+- int lineSize;
+- asm("rdhwr %0, $1" : "=r" (lineSize));
+- //
+- // Modify "start" and "end" to avoid GCC 4.3.0-4.4.2 bug in
+- // mips_expand_synci_loop that may execute synci one more time.
+- // "start" points to the fisrt byte of the cache line.
+- // "end" points to the last byte of the line before the last cache line.
+- // Because size is always a multiple of 4, this is safe to set
+- // "end" to the last byte.
+- //
+- intptr_t start = reinterpret_cast<intptr_t>(code) & (-lineSize);
+- intptr_t end = ((reinterpret_cast<intptr_t>(code) + size - 1) & (-lineSize)) - 1;
+- __builtin___clear_cache(reinterpret_cast<char*>(start), reinterpret_cast<char*>(end));
+-#else
+- intptr_t end = reinterpret_cast<intptr_t>(code) + size;
+- __builtin___clear_cache(reinterpret_cast<char*>(code), reinterpret_cast<char*>(end));
+-#endif
+-#else
+ _flush_cache(reinterpret_cast<char*>(code), size, BCACHE);
+-#endif
+- }
+-#elif WTF_CPU_ARM_THUMB2 && WTF_PLATFORM_IPHONE
+- static void cacheFlush(void* code, size_t size)
+- {
+- sys_dcache_flush(code, size);
+- sys_icache_invalidate(code, size);
+- }
+-#elif WTF_CPU_ARM_THUMB2 && WTF_PLATFORM_LINUX
+- static void cacheFlush(void* code, size_t size)
+- {
+- asm volatile (
+- "push {r7}\n"
+- "mov r0, %0\n"
+- "mov r1, %1\n"
+- "movw r7, #0x2\n"
+- "movt r7, #0xf\n"
+- "movs r2, #0x0\n"
+- "svc 0x0\n"
+- "pop {r7}\n"
+- :
+- : "r" (code), "r" (reinterpret_cast<char*>(code) + size)
+- : "r0", "r1", "r2");
+- }
+-#elif WTF_PLATFORM_SYMBIAN
+- static void cacheFlush(void* code, size_t size)
+- {
+- User::IMB_Range(code, static_cast<char*>(code) + size);
+- }
+-#elif WTF_CPU_ARM_TRADITIONAL && WTF_PLATFORM_LINUX && WTF_COMPILER_RVCT
+- static __asm void cacheFlush(void* code, size_t size);
+-#elif WTF_CPU_ARM_TRADITIONAL && (WTF_PLATFORM_LINUX || WTF_PLATFORM_ANDROID) && WTF_COMPILER_GCC
+- static void cacheFlush(void* code, size_t size)
+- {
+- asm volatile (
+- "push {r7}\n"
+- "mov r0, %0\n"
+- "mov r1, %1\n"
+- "mov r7, #0xf0000\n"
+- "add r7, r7, #0x2\n"
+- "mov r2, #0x0\n"
+- "svc 0x0\n"
+- "pop {r7}\n"
+- :
+- : "r" (code), "r" (reinterpret_cast<char*>(code) + size)
+- : "r0", "r1", "r2");
+- }
+-#elif WTF_PLATFORM_WINCE
+- static void cacheFlush(void* code, size_t size)
+- {
+- CacheRangeFlush(code, size, CACHE_SYNC_ALL);
+ }
+-#else
+- #error "The cacheFlush support is missing on this platform."
+-#endif
+
+ private:
+
+--- js/src/Makefile.in.orig 2011-03-30 22:02:39.725318514 -0300
++++ js/src/Makefile.in 2011-03-30 22:02:51.689347820 -0300
+@@ -914,7 +914,7 @@
+ # Needed to "configure" it correctly. Unfortunately these
+ # flags wind up being applied to all code in js/src, not just
+ # the code in js/src/assembler.
+-CXXFLAGS += -DUSE_SYSTEM_MALLOC=1 -DENABLE_ASSEMBLER=1 -DENABLE_JIT=1
++CXXFLAGS += -DUSE_SYSTEM_MALLOC=1 -DENABLE_JIT=1
+
+ INCLUDES += -I$(srcdir)/assembler -I$(srcdir)/yarr
+
+