diff options
Diffstat (limited to 'arch/arm/mach-imx')
30 files changed, 141 insertions, 208 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index dd905b960..ee9a318ca 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -1,10 +1,10 @@ menuconfig ARCH_MXC bool "Freescale i.MX family" depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M - select ARCH_REQUIRE_GPIOLIB select ARCH_SUPPORTS_BIG_ENDIAN select CLKSRC_IMX_GPT select GENERIC_IRQ_CHIP + select GPIOLIB select PINCTRL select PM_OPP if PM select SOC_BUS @@ -44,9 +44,6 @@ config MXC_USE_EPIT uses the same clocks as the GPT. Anyway, on some systems the GPT may be in use for other purposes. -config ARCH_HAS_RNGA - bool - config HAVE_IMX_ANATOP bool @@ -90,7 +87,6 @@ config SOC_IMX27 config SOC_IMX31 bool select CPU_V6 - select IMX_HAVE_PLATFORM_MXC_RNGA select MXC_AVIC select SMP_ON_UP if SMP diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 9fbe624a5..9f5fffd62 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -8,8 +8,8 @@ obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o -obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o -obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o pm-imx3.o +obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o +obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o imx5-pm-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c index 7fa176e79..1afccae04 100644 --- a/arch/arm/mach-imx/avic.c +++ b/arch/arm/mach-imx/avic.c @@ -55,23 +55,20 @@ static void __iomem *avic_base; static struct irq_domain *domain; #ifdef CONFIG_FIQ -static int avic_set_irq_fiq(unsigned int irq, unsigned int type) +static int avic_set_irq_fiq(unsigned int hwirq, unsigned int type) { - struct irq_data *d = irq_get_irq_data(irq); unsigned int irqt; - irq = d->hwirq; - - if (irq >= AVIC_NUM_IRQS) + if (hwirq >= AVIC_NUM_IRQS) return -EINVAL; - if (irq < AVIC_NUM_IRQS / 2) { - irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); - imx_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); + if (hwirq < AVIC_NUM_IRQS / 2) { + irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq); + imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL); } else { - irq -= AVIC_NUM_IRQS / 2; - irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); - imx_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); + hwirq -= AVIC_NUM_IRQS / 2; + irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq); + imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH); } return 0; diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 58a384644..a8f469333 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -32,7 +32,6 @@ void imx27_init_early(void); void imx31_init_early(void); void imx35_init_early(void); void mxc_init_irq(void __iomem *); -void tzic_init_irq(void); void mx1_init_irq(void); void mx21_init_irq(void); void mx27_init_irq(void); @@ -55,6 +54,7 @@ struct platform_device *mxc_register_gpio(char *name, int id, void mxc_set_cpu_type(unsigned int type); void mxc_restart(enum reboot_mode, const char *); void mxc_arch_reset_init(void __iomem *); +void imx1_reset_init(void __iomem *); void imx_set_aips(void __iomem *); void imx_aips_allow_unprivileged_access(const char *compat); int mxc_device_init(void); @@ -67,6 +67,7 @@ void imx_gpc_set_arm_power_in_lpm(bool power_off); void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); void imx25_pm_init(void); +void imx27_pm_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index 3403bac94..4f2d1c772 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -60,13 +60,9 @@ static int get_mx51_srev(void) /* * Returns: * the silicon revision of the cpu - * -EINVAL - not a mx51 */ int mx51_revision(void) { - if (!cpu_is_mx51()) - return -EINVAL; - if (mx5_cpu_rev == -1) mx5_cpu_rev = get_mx51_srev(); @@ -112,13 +108,9 @@ static int get_mx53_srev(void) /* * Returns: * the silicon revision of the cpu - * -EINVAL - not a mx53 */ int mx53_revision(void) { - if (!cpu_is_mx53()) - return -EINVAL; - if (mx5_cpu_rev == -1) mx5_cpu_rev = get_mx53_srev(); diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6a96b7cf4..b3347d323 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -10,8 +10,6 @@ #include "common.h" unsigned int __mxc_cpu_type; -EXPORT_SYMBOL(__mxc_cpu_type); - static unsigned int imx_soc_revision; void mxc_set_cpu_type(unsigned int type) diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c index 353bb8774..db0f48c4b 100644 --- a/arch/arm/mach-imx/cpuidle-imx6q.c +++ b/arch/arm/mach-imx/cpuidle-imx6q.c @@ -10,6 +10,8 @@ #include <linux/module.h> #include <asm/cpuidle.h> +#include <soc/imx/cpuidle.h> + #include "common.h" #include "cpuidle.h" #include "hardware.h" @@ -62,6 +64,24 @@ static struct cpuidle_driver imx6q_cpuidle_driver = { .safe_state_index = 0, }; +/* + * i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from waking the + * CPUs when they are in wait(unclocked) state. As the hardware workaround isn't + * applicable to all boards, disable the deeper idle state when the workaround + * isn't present and the FEC is in use. + */ +void imx6q_cpuidle_fec_irqs_used(void) +{ + imx6q_cpuidle_driver.states[1].disabled = true; +} +EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_used); + +void imx6q_cpuidle_fec_irqs_unused(void) +{ + imx6q_cpuidle_driver.states[1].disabled = false; +} +EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused); + int __init imx6q_cpuidle_init(void) { /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig index 3a5529892..6ffe57267 100644 --- a/arch/arm/mach-imx/devices/Kconfig +++ b/arch/arm/mach-imx/devices/Kconfig @@ -57,10 +57,6 @@ config IMX_HAVE_PLATFORM_MXC_MMC config IMX_HAVE_PLATFORM_MXC_NAND bool -config IMX_HAVE_PLATFORM_MXC_RNGA - bool - select ARCH_HAS_RNGA - config IMX_HAVE_PLATFORM_MXC_RTC bool diff --git a/arch/arm/mach-imx/devices/devices.c b/arch/arm/mach-imx/devices/devices.c index 8eab5440d..300451727 100644 --- a/arch/arm/mach-imx/devices/devices.c +++ b/arch/arm/mach-imx/devices/devices.c @@ -22,6 +22,9 @@ #include <linux/err.h> #include <linux/platform_device.h> +#include "../common.h" +#include "devices-common.h" + struct device mxc_aips_bus = { .init_name = "mxc_aips", }; diff --git a/arch/arm/mach-imx/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c index 26483fa94..cd1fe69d8 100644 --- a/arch/arm/mach-imx/devices/platform-gpio-mxc.c +++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c @@ -7,6 +7,7 @@ * Free Software Foundation. */ #include "devices-common.h" +#include "../common.h" struct platform_device *__init mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index fd8720532..0df062d8b 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c @@ -271,6 +271,12 @@ static int __init imx_gpc_init(struct device_node *node, for (i = 0; i < IMR_NUM; i++) writel_relaxed(~0, gpc_base + GPC_IMR1 + i * 4); + /* + * Clear the OF_POPULATED flag set in of_irq_init so that + * later the GPC power domain driver will not be skipped. + */ + of_node_clear_flag(node, OF_POPULATED); + return 0; } IRQCHIP_DECLARE(imx_gpc, "fsl,imx6q-gpc", imx_gpc_init); diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index 530a728c2..a754b8a48 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c @@ -27,5 +27,6 @@ DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") .map_io = mx27_map_io, .init_early = imx27_init_early, .init_irq = mx27_init_irq, + .init_late = imx27_pm_init, .dt_compat = imx27_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index 32100222a..62e6b4fb5 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c @@ -28,10 +28,22 @@ static void __init imx31_dt_timer_init(void) mx31_clocks_init_dt(); } +/* FIXME: replace with DT binding */ +static const struct resource imx31_rnga_res[] __initconst = { + DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), +}; + +static void __init imx31_dt_mach_init(void) +{ + platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, + ARRAY_SIZE(imx31_rnga_res)); +} + DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") .map_io = mx31_map_io, .init_early = imx31_init_early, .init_irq = mx31_init_irq, .init_time = imx31_dt_timer_init, + .init_machine = imx31_dt_mach_init, .dt_compat = imx31_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/imx35-dt.c b/arch/arm/mach-imx/imx35-dt.c index e93960372..99bb63ded 100644 --- a/arch/arm/mach-imx/imx35-dt.c +++ b/arch/arm/mach-imx/imx35-dt.c @@ -20,20 +20,16 @@ #include "common.h" #include "mx35.h" -static void __init imx35_irq_init(void) -{ - imx_init_l2cache(); - mx35_init_irq(); -} - static const char * const imx35_dt_board_compat[] __initconst = { "fsl,imx35", NULL }; DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .map_io = mx35_map_io, .init_early = imx35_init_early, - .init_irq = imx35_irq_init, + .init_irq = mx35_init_irq, .dt_compat = imx35_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/irq-common.c b/arch/arm/mach-imx/irq-common.c index 0a920d184..210d36eba 100644 --- a/arch/arm/mach-imx/irq-common.c +++ b/arch/arm/mach-imx/irq-common.c @@ -33,8 +33,10 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) gc = irq_get_chip_data(irq); if (gc && gc->private) { exirq = gc->private; - if (exirq->set_irq_fiq) - ret = exirq->set_irq_fiq(irq, type); + if (exirq->set_irq_fiq) { + struct irq_data *d = irq_get_irq_data(irq); + ret = exirq->set_irq_fiq(irqd_to_hwirq(d), type); + } } return ret; diff --git a/arch/arm/mach-imx/mach-imx50.c b/arch/arm/mach-imx/mach-imx50.c index ecf58b9e9..4cab5f612 100644 --- a/arch/arm/mach-imx/mach-imx50.c +++ b/arch/arm/mach-imx/mach-imx50.c @@ -22,6 +22,5 @@ static const char * const imx50_dt_board_compat[] __initconst = { }; DT_MACHINE_START(IMX50_DT, "Freescale i.MX50 (Device Tree Support)") - .init_irq = tzic_init_irq, .dt_compat = imx50_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index 10a82a4f1..3835b6a34 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -53,7 +53,7 @@ static void __init imx51_dt_init(void) imx51_ipu_mipi_setup(); imx_src_init(); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + imx_aips_allow_unprivileged_access("fsl,imx51-aipstz"); } static void __init imx51_init_late(void) @@ -69,7 +69,6 @@ static const char * const imx51_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") .init_early = imx51_init_early, - .init_irq = tzic_init_irq, .init_machine = imx51_dt_init, .init_late = imx51_init_late, .dt_compat = imx51_dt_board_compat, diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 18b5c5c13..07c2e8dca 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -32,8 +32,6 @@ static void __init imx53_dt_init(void) { imx_src_init(); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - imx_aips_allow_unprivileged_access("fsl,imx53-aipstz"); } @@ -49,7 +47,6 @@ static const char * const imx53_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") .init_early = imx53_init_early, - .init_irq = tzic_init_irq, .init_machine = imx53_dt_init, .init_late = imx53_init_late, .dt_compat = imx53_dt_board_compat, diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index cb27d566d..97fd25105 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -220,7 +220,7 @@ static void __init imx6q_1588_init(void) IMX6Q_GPR1_ENET_CLK_SEL_MASK, clksel); else - pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n"); + pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n"); clk_put(enet_ref); put_ptp_clk: @@ -278,7 +278,7 @@ static void __init imx6q_init_machine(void) imx6q_enet_phy_init(); - of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); + of_platform_default_populate(NULL, NULL, parent); imx_anatop_init(); cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init(); @@ -407,6 +407,8 @@ static const char * const imx6q_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .smp = smp_ops(imx_smp_ops), .map_io = imx6q_map_io, .init_irq = imx6q_init_irq, diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 300326373..04084900d 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -52,7 +52,7 @@ static void __init imx6sl_init_machine(void) if (parent == NULL) pr_warn("failed to initialize soc device\n"); - of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); + of_platform_default_populate(NULL, NULL, parent); imx6sl_fec_init(); imx_anatop_init(); @@ -75,6 +75,8 @@ static const char * const imx6sl_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .init_irq = imx6sl_init_irq, .init_machine = imx6sl_init_machine, .init_late = imx6sl_init_late, diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index 6a0b0614d..7f52d9b1e 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -72,7 +72,7 @@ static void __init imx6sx_init_machine(void) if (parent == NULL) pr_warn("failed to initialize soc device\n"); - of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); + of_platform_default_populate(NULL, NULL, parent); imx6sx_enet_init(); imx_anatop_init(); @@ -103,6 +103,8 @@ static const char * const imx6sx_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .init_irq = imx6sx_init_irq, .init_machine = imx6sx_init_machine, .dt_compat = imx6sx_dt_compat, diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index b56de4b8c..6bb7d9cf1 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -64,7 +64,7 @@ static void __init imx6ul_init_machine(void) if (parent == NULL) pr_warn("failed to initialize soc device\n"); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + of_platform_default_populate(NULL, NULL, parent); imx6ul_enet_init(); imx_anatop_init(); imx6ul_pm_init(); diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index b450f525a..26ca744d3 100644 --- a/arch/arm/mach-imx/mach-imx7d.c +++ b/arch/arm/mach-imx/mach-imx7d.c @@ -93,7 +93,6 @@ static void __init imx7d_init_machine(void) if (parent == NULL) pr_warn("failed to initialize soc device\n"); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); imx_anatop_init(); imx7d_enet_init(); } @@ -107,6 +106,7 @@ static void __init imx7d_init_irq(void) static const char *const imx7d_dt_compat[] __initconst = { "fsl,imx7d", + "fsl,imx7s", NULL, }; diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index e065fedb3..9a42f19be 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -50,7 +50,7 @@ void __init mx1_init_irq(void) void __init imx1_soc_init(void) { - mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); + imx1_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); mxc_device_init(); mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index 7d82a5a5b..862b9b776 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -98,4 +98,6 @@ void __init imx27_soc_init(void) /* imx27 has the imx21 type audmux */ platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, ARRAY_SIZE(imx27_audmux_res)); + + imx27_pm_init(); } diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 0256e17d2..500d13df6 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -19,6 +19,7 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/err.h> +#include <linux/io.h> #include <linux/pinctrl/machine.h> #include <asm/pgtable.h> @@ -38,8 +39,6 @@ static void imx3_idle(void) { unsigned long reg = 0; - mx3_cpu_lp_set(MX3_WAIT); - __asm__ __volatile__( /* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n" @@ -135,11 +134,20 @@ void __init mx31_map_io(void) iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); } +static void imx31_idle(void) +{ + int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_LPM_MASK; + imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); + + imx3_idle(); +} + void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); arch_ioremap_caller = imx3_ioremap_caller; - arm_pm_idle = imx3_idle; + arm_pm_idle = imx31_idle; mx3_ccm_base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); } @@ -167,6 +175,10 @@ static const struct resource imx31_audmux_res[] __initconst = { DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), }; +static const struct resource imx31_rnga_res[] __initconst = { + DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), +}; + void __init imx31_soc_init(void) { int to_version = mx31_revision() >> 4; @@ -195,6 +207,8 @@ void __init imx31_soc_init(void) platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res, ARRAY_SIZE(imx31_audmux_res)); + platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, + ARRAY_SIZE(imx31_rnga_res)); } #endif /* ifdef CONFIG_SOC_IMX31 */ @@ -212,11 +226,21 @@ void __init mx35_map_io(void) iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); } +static void imx35_idle(void) +{ + int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_LPM_MASK; + reg |= MXC_CCM_CCMR_LPM_WAIT_MX35; + imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); + + imx3_idle(); +} + void __init imx35_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); - arm_pm_idle = imx3_idle; + arm_pm_idle = imx35_idle; arch_ioremap_caller = imx3_ioremap_caller; mx3_ccm_base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR); } diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index d32704256..34f2ff625 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -45,105 +45,7 @@ #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; -#endif - -#ifdef CONFIG_SOC_IMX1 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX1 -# endif -# define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) -#else -# define cpu_is_mx1() (0) -#endif - -#ifdef CONFIG_SOC_IMX21 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX21 -# endif -# define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) -#else -# define cpu_is_mx21() (0) -#endif -#ifdef CONFIG_SOC_IMX25 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX25 -# endif -# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25) -#else -# define cpu_is_mx25() (0) -#endif - -#ifdef CONFIG_SOC_IMX27 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX27 -# endif -# define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) -#else -# define cpu_is_mx27() (0) -#endif - -#ifdef CONFIG_SOC_IMX31 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX31 -# endif -# define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) -#else -# define cpu_is_mx31() (0) -#endif - -#ifdef CONFIG_SOC_IMX35 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX35 -# endif -# define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) -#else -# define cpu_is_mx35() (0) -#endif - -#ifdef CONFIG_SOC_IMX51 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX51 -# endif -# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51) -#else -# define cpu_is_mx51() (0) -#endif - -#ifdef CONFIG_SOC_IMX53 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX53 -# endif -# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53) -#else -# define cpu_is_mx53() (0) -#endif - -#ifndef __ASSEMBLY__ #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) { @@ -190,9 +92,6 @@ int tzic_enable_wake(void); extern struct cpu_op *(*get_cpu_op)(int *op); #endif -#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) -#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) - #define imx_readl readl_relaxed #define imx_readw readw_relaxed #define imx_writel writel_relaxed diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index 43096c899..d94353556 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c @@ -37,13 +37,7 @@ static const struct platform_suspend_ops mx27_suspend_ops = { .valid = suspend_valid_only_mem, }; -static int __init mx27_pm_init(void) +void __init imx27_pm_init(void) { - if (!cpu_is_mx27()) - return 0; - suspend_set_ops(&mx27_suspend_ops); - return 0; } - -device_initcall(mx27_pm_init); diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 105d1ce4e..c06af650e 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -34,25 +34,19 @@ static void __iomem *wdog_base; static struct clk *wdog_clk; +static int wcr_enable = (1 << 2); /* * Reset the system. It is called by machine_restart(). */ void mxc_restart(enum reboot_mode mode, const char *cmd) { - unsigned int wcr_enable; - if (!wdog_base) goto reset_fallback; if (!IS_ERR(wdog_clk)) clk_enable(wdog_clk); - if (cpu_is_mx1()) - wcr_enable = (1 << 0); - else - wcr_enable = (1 << 2); - /* Assert SRS signal */ imx_writew(wcr_enable, wdog_base); /* @@ -89,6 +83,14 @@ void __init mxc_arch_reset_init(void __iomem *base) clk_prepare(wdog_clk); } +#ifdef CONFIG_SOC_IMX1 +void __init imx1_reset_init(void __iomem *base) +{ + wcr_enable = (1 << 0); + mxc_arch_reset_init(base); +} +#endif + #ifdef CONFIG_CACHE_L2X0 void __init imx_init_l2cache(void) { @@ -98,38 +100,28 @@ void __init imx_init_l2cache(void) np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); if (!np) - goto out; + return; l2x0_base = of_iomap(np, 0); - if (!l2x0_base) { - of_node_put(np); - goto out; - } + if (!l2x0_base) + goto put_node; - if (readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN) - goto skip_if_enabled; + if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { + /* Configure the L2 PREFETCH and POWER registers */ + val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); + val |= L310_PREFETCH_CTRL_DBL_LINEFILL | + L310_PREFETCH_CTRL_INSTR_PREFETCH | + L310_PREFETCH_CTRL_DATA_PREFETCH; - /* Configure the L2 PREFETCH and POWER registers */ - val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); - val |= 0x70800000; - /* - * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 - * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 - * But according to ARM PL310 errata: 752271 - * ID: 752271: Double linefill feature can cause data corruption - * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 - * Workaround: The only workaround to this erratum is to disable the - * double linefill feature. This is the default behavior. - */ - if (cpu_is_imx6q()) - val &= ~(1 << 30 | 1 << 23); - writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); + /* Set perfetch offset to improve performance */ + val &= ~L310_PREFETCH_CTRL_OFFSET_MASK; + val |= 15; + + writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); + } -skip_if_enabled: iounmap(l2x0_base); +put_node: of_node_put(np); - -out: - l2x0_of_init(0, ~0); } #endif diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c index ae23d50f7..4ca37c3f1 100644 --- a/arch/arm/mach-imx/tzic.c +++ b/arch/arm/mach-imx/tzic.c @@ -9,12 +9,11 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include <linux/module.h> -#include <linux/moduleparam.h> #include <linux/init.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/irqchip.h> #include <linux/irqdomain.h> #include <linux/of.h> #include <linux/of_address.h> @@ -56,14 +55,14 @@ static struct irq_domain *domain; #define TZIC_NUM_IRQS 128 #ifdef CONFIG_FIQ -static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) +static int tzic_set_irq_fiq(unsigned int hwirq, unsigned int type) { unsigned int index, mask, value; - index = irq >> 5; + index = hwirq >> 5; if (unlikely(index >= 4)) return -EINVAL; - mask = 1U << (irq & 0x1F); + mask = 1U << (hwirq & 0x1F); value = imx_readl(tzic_base + TZIC_INTSEC0(index)) | mask; if (type) @@ -153,13 +152,11 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) * interrupts. It registers the interrupt enable and disable functions * to the kernel for each interrupt source. */ -void __init tzic_init_irq(void) +static int __init tzic_init_dt(struct device_node *np, struct device_node *p) { - struct device_node *np; int irq_base; int i; - np = of_find_compatible_node(NULL, NULL, "fsl,tzic"); tzic_base = of_iomap(np, 0); WARN_ON(!tzic_base); @@ -199,7 +196,10 @@ void __init tzic_init_irq(void) #endif pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); + + return 0; } +IRQCHIP_DECLARE(tzic, "fsl,tzic", tzic_init_dt); /** * tzic_enable_wake() - enable wakeup interrupt |