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Texas Instruments OMAP4 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap4-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
Required nodes:
- DISPC
Optional nodes:
- DSS Submodules: RFBI, VENC, DSI, HDMI
- Video port for DPI output
DPI Endpoint required properties:
- data-lines: number of lines used
DISPC
-----
Required properties:
- compatible: "ti,omap4-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
RFBI
----
Required properties:
- compatible: "ti,omap4-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
- clocks: handles to fclk and iclk
- clock-names: "fck", "ick"
Optional nodes:
- Video port for RFBI output
- RFBI controlled peripherals
VENC
----
Required properties:
- compatible: "ti,omap4-venc"
- reg: address and length of the register space
- ti,hwmods: "dss_venc"
- vdda-supply: power supply for DAC
- clocks: handle to fclk
- clock-names: "fck"
Optional nodes:
- Video port for VENC output
VENC Endpoint required properties:
- ti,invert-polarity: invert the polarity of the video signal
- ti,channels: 1 for composite, 2 for s-video
DSI
---
Required properties:
- compatible: "ti,omap4-dsi"
- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
- reg-names: "proto", "phy", "pll"
- interrupts: the DSI interrupt line
- ti,hwmods: "dss_dsi1" or "dss_dsi2"
- vdd-supply: power supply for DSI
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for DSI output
- DSI controlled peripherals
DSI Endpoint required properties:
- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
DATA1+, DATA1-, ...
HDMI
----
Required properties:
- compatible: "ti,omap4-hdmi"
- reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',
'core'
- reg-names: "wp", "pll", "phy", "core"
- interrupts: the HDMI interrupt line
- ti,hwmods: "dss_hdmi"
- vdda-supply: vdda power supply
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for HDMI output
HDMI Endpoint optional properties:
- lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)
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