diff options
-rw-r--r-- | PATCHCFG | 12 | ||||
-rw-r--r-- | patches/aufs2-base-20100116.patch (renamed from patches/aufs2-base-20091203.patch) | 2 | ||||
-rw-r--r-- | patches/aufs2-standalone-20100116.patch (renamed from patches/aufs2-standalone-20091203.patch) | 12 | ||||
-rw-r--r-- | patches/revert-powermanagement-intel-2.6.32.patch | 157 |
4 files changed, 15 insertions, 168 deletions
@@ -10,22 +10,18 @@ SRCNAME="linux-2.6.32-ARCH" # filename%patchlevel (file must be in patches/ subdirectory) PATCHES=( # add upstream patch from 2.6.32 series - ftp://ftp.kernel.org/pub/linux/kernel/v2.6/patch-2.6.32.3.bz2%1 + ftp://ftp.kernel.org/pub/linux/kernel/v2.6/patch-2.6.32.4.bz2%1 # add latest fixes from stable queue, if needed # http://git.kernel.org/?p=linux/kernel/git/stable/stable-queue.git - - # revert intel powermanagement - # http://patchwork.kernel.org/patch/67768/ - revert-powermanagement-intel-2.6.32.patch%1 # add aufs2 support, in reference to: # http://aufs.sourceforge.net - aufs2-base-20091203.patch%1 - aufs2-standalone-20091203.patch%1 + aufs2-base-20100116.patch%1 + aufs2-standalone-20100116.patch%1 ) # Name of the resulting patch (will be bzipped afterwards) -PATCHNAME="patch-2.6.32.3-1-ARCH" +PATCHNAME="patch-2.6.32.4-1-ARCH" # Run this before applying patches pre_apply() { diff --git a/patches/aufs2-base-20091203.patch b/patches/aufs2-base-20100116.patch index 87980d2..b8db42f 100644 --- a/patches/aufs2-base-20091203.patch +++ b/patches/aufs2-base-20100116.patch @@ -1,4 +1,4 @@ -aufs2 base patch for linux-2.6. +aufs2 base patch for linux-2.6.32 diff --git a/fs/namei.c b/fs/namei.c index d11f404..7d28f56 100644 diff --git a/patches/aufs2-standalone-20091203.patch b/patches/aufs2-standalone-20100116.patch index a87d55d..6141578 100644 --- a/patches/aufs2-standalone-20091203.patch +++ b/patches/aufs2-standalone-20100116.patch @@ -1,4 +1,4 @@ -aufs2 standalone patch for linux-2.6. +aufs2 standalone patch for linux-2.6.32 diff --git a/fs/namei.c b/fs/namei.c index 7d28f56..0f6117c 100644 @@ -97,7 +97,7 @@ index b85e61b..a23fad4 100644 /** * ima_bprm_check - based on policy, collect/store measurement. diff --git a/security/security.c b/security/security.c -index c4c6732..854d15c 100644 +index c4c6732..092cd90 100644 --- a/security/security.c +++ b/security/security.c @@ -386,6 +386,7 @@ int security_path_mkdir(struct path *path, struct dentry *dentry, int mode) @@ -180,3 +180,11 @@ index c4c6732..854d15c 100644 int security_file_alloc(struct file *file) { +@@ -641,6 +651,7 @@ int security_file_mmap(struct file *file, unsigned long reqprot, + { + return security_ops->file_mmap(file, reqprot, prot, flags, addr, addr_only); + } ++EXPORT_SYMBOL(security_file_mmap); + + int security_file_mprotect(struct vm_area_struct *vma, unsigned long reqprot, + unsigned long prot) diff --git a/patches/revert-powermanagement-intel-2.6.32.patch b/patches/revert-powermanagement-intel-2.6.32.patch deleted file mode 100644 index 2bf4a7e..0000000 --- a/patches/revert-powermanagement-intel-2.6.32.patch +++ /dev/null @@ -1,157 +0,0 @@ ---- linux-2.6.32/drivers/gpu/drm/i915/intel_display.c~ 2009-12-03 04:51:21.000000000 +0100 -+++ linux-2.6.32/drivers/gpu/drm/i915/intel_display.c 2009-12-26 08:15:21.000000000 +0100 -@@ -3665,125 +3665,6 @@ - queue_work(dev_priv->wq, &dev_priv->idle_work); - } - --void intel_increase_renderclock(struct drm_device *dev, bool schedule) --{ -- drm_i915_private_t *dev_priv = dev->dev_private; -- -- if (IS_IGDNG(dev)) -- return; -- -- if (!dev_priv->render_reclock_avail) { -- DRM_DEBUG("not reclocking render clock\n"); -- return; -- } -- -- /* Restore render clock frequency to original value */ -- if (IS_G4X(dev) || IS_I9XX(dev)) -- pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock); -- else if (IS_I85X(dev)) -- pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock); -- DRM_DEBUG("increasing render clock frequency\n"); -- -- /* Schedule downclock */ -- if (schedule) -- mod_timer(&dev_priv->idle_timer, jiffies + -- msecs_to_jiffies(GPU_IDLE_TIMEOUT)); --} -- --void intel_decrease_renderclock(struct drm_device *dev) --{ -- drm_i915_private_t *dev_priv = dev->dev_private; -- -- if (IS_IGDNG(dev)) -- return; -- -- if (!dev_priv->render_reclock_avail) { -- DRM_DEBUG("not reclocking render clock\n"); -- return; -- } -- -- if (IS_G4X(dev)) { -- u16 gcfgc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, GCFGC, &gcfgc); -- -- /* Down to minimum... */ -- gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK; -- gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ; -- -- pci_write_config_word(dev->pdev, GCFGC, gcfgc); -- } else if (IS_I965G(dev)) { -- u16 gcfgc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, GCFGC, &gcfgc); -- -- /* Down to minimum... */ -- gcfgc &= ~I965_GC_RENDER_CLOCK_MASK; -- gcfgc |= I965_GC_RENDER_CLOCK_267_MHZ; -- -- pci_write_config_word(dev->pdev, GCFGC, gcfgc); -- } else if (IS_I945G(dev) || IS_I945GM(dev)) { -- u16 gcfgc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, GCFGC, &gcfgc); -- -- /* Down to minimum... */ -- gcfgc &= ~I945_GC_RENDER_CLOCK_MASK; -- gcfgc |= I945_GC_RENDER_CLOCK_166_MHZ; -- -- pci_write_config_word(dev->pdev, GCFGC, gcfgc); -- } else if (IS_I915G(dev)) { -- u16 gcfgc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, GCFGC, &gcfgc); -- -- /* Down to minimum... */ -- gcfgc &= ~I915_GC_RENDER_CLOCK_MASK; -- gcfgc |= I915_GC_RENDER_CLOCK_166_MHZ; -- -- pci_write_config_word(dev->pdev, GCFGC, gcfgc); -- } else if (IS_I85X(dev)) { -- u16 hpllcc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, HPLLCC, &hpllcc); -- -- /* Up to maximum... */ -- hpllcc &= ~GC_CLOCK_CONTROL_MASK; -- hpllcc |= GC_CLOCK_133_200; -- -- pci_write_config_word(dev->pdev, HPLLCC, hpllcc); -- } -- DRM_DEBUG("decreasing render clock frequency\n"); --} -- --/* Note that no increase function is needed for this - increase_renderclock() -- * will also rewrite these bits -- */ --void intel_decrease_displayclock(struct drm_device *dev) --{ -- if (IS_IGDNG(dev)) -- return; -- -- if (IS_I945G(dev) || IS_I945GM(dev) || IS_I915G(dev) || -- IS_I915GM(dev)) { -- u16 gcfgc; -- -- /* Adjust render clock... */ -- pci_read_config_word(dev->pdev, GCFGC, &gcfgc); -- -- /* Down to minimum... */ -- gcfgc &= ~0xf0; -- gcfgc |= 0x80; -- -- pci_write_config_word(dev->pdev, GCFGC, gcfgc); -- } --} -- - #define CRTC_IDLE_TIMEOUT 1000 /* ms */ - - static void intel_crtc_idle_timer(unsigned long arg) -@@ -3897,12 +3778,6 @@ - - mutex_lock(&dev->struct_mutex); - -- /* GPU isn't processing, downclock it. */ -- if (!dev_priv->busy) { -- intel_decrease_renderclock(dev); -- intel_decrease_displayclock(dev); -- } -- - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { - /* Skip inactive CRTCs */ - if (!crtc->fb) -@@ -3937,7 +3812,6 @@ - return; - - dev_priv->busy = true; -- intel_increase_renderclock(dev, true); - - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { - if (!crtc->fb) -@@ -4442,7 +4316,6 @@ - del_timer_sync(&intel_crtc->idle_timer); - } - -- intel_increase_renderclock(dev, false); - del_timer_sync(&dev_priv->idle_timer); - - mutex_unlock(&dev->struct_mutex); |